LINER LTC3706EGN-TR Secondary-side synchronous forward controller with polyphase capability Datasheet

LTC3706
Secondary-Side Synchronous
Forward Controller with
PolyPhase Capability
DESCRIPTION
FEATURES
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Secondary-Side Control for Fast Transient Response
Self-Starting Architecture Eliminates Need for
Separate Bias Regulator
Proprietary Gate Drive Encoding Scheme Reduces
System Complexity
PolyPhase® Operation Reduces CIN Requirements
Current Mode Control Ensures Current Sharing
PLL Fixed Frequency: 100kHz to 500kHz
±1% Output Voltage Accuracy
True Remote Sense Differential Amplifier
Power Good Output Voltage Monitor
High Voltage Linear Regulator Controller
Wide Supply Range: 5V to 30V
Available in a Narrow 24-Lead SSOP Package
The LTC®3706 is a PolyPhase capable secondary-side
controller for synchronous forward converters. When used
in conjunction with the LTC3705 gate driver and primaryside controller, the part creates a complete isolated power
supply that combines the power of PolyPhase operation
with the speed of secondary-side control.
The LTC3706 has been designed to simplify the design
of highly efficient, secondary-side forward converters.
Working in concert with the LTC3705, the LTC3706 forms
a robust, self-starting converter that eliminates the need
for the separate bias regulator that is commonly used in
secondary-side control applications. In addition, a proprietary scheme is used to multiplex gate drive signals
and DC bias power across the isolation barrier through a
single, tiny pulse transformer.
APPLICATIONS
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The LTC3706 provides remote sensing, accurate power
good and overvoltage monitoring circuits to support precision, high current applications. A linear regulator controller
with thermal protection is also provided to simplify the
generation of secondary-side bias voltage.
Isolated 48V Telecommunication Systems
Internet Servers and Routers
Distributed Power Step-Down Converters
Automotive and Heavy Equipment
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
PolyPhase is a registered trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6144194, other patents pending.
The LTC3706 is available in a 24-lead SSOP package.
TYPICAL APPLICATION
36V-72V to 3.3V/20A Isolated Forward Converter
VIN+
T1
•
Si7852DP
1.2Ω
MURS120
1μF
100V
s3
VOUT+
L1
1.2μH
•
Si7336ADP
s2
Si7852DP
Si7336ADP
330μF
6.3V
s3
CMPSH1-4
MURS120
2mΩ
2W
30mΩ
1W
VIN–
10μF
25V
VOUT–
CZT3019
100k
FQT7N10
365k
1%
NDRV
BOOST TG
2.2μF
25V
15k
1%
33nF
1μF
TS BG IS
FB/IN+
UVLO
VCC
2.2μF
16V
L1: COILCRAFT SER2010-122
T1: PULSE PA0807
T2: PULSE PA0297
BAS21 0.22μF
T2
•
162k
SW SG
VIN
NDRV
VCC
FS/SYNC
FB
LTC3706
ITH
PT–
RUN/SS GND PGND PHASE SLP MODE REGSD
FS/IN–
GND PGND VSLMT
FG
IS+
PT+
•
LTC3705
SS/FLT
IS–
33nF
102k
1%
680pF
20k
22.6k
1%
3706 TA01
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LTC3706
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
VCC ........................................................... –0.3V to 10V
VIN ........................................................... –0.3V to 33V
SW ............................................................... –5V to 50V
NDRV ........................................................ –0.3V to 13V
ITH, RUN/SS, VSOUT, VS+, VS–, REGSD ....... –0.3V to 7V
All Other Pins ............................................ –0.3V to 10V
Operating Temperature Range (Note 2)
LTC3706EGN ........................................ –40°C to 85°C
LTC3706IGN......................................... –40°C to 85°C
Junction Temperature (Note 3) ............................ 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
SG
1
24 VCC
FG
2
23 PGND
PGOOD
3
22 PT+
MODE
4
21 PT –
PHASE
5
20 SW
FB
6
19 VIN
ITH
7
18 NDRV
RUN/SS
8
17 REGSD
VSOUT
9
16 IS+
VS+ 10
15 IS–
VS–
14 SLP
11
GND 12
13 FS/SYNC
GN PACKAGE
24-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 130°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3706EGN#PBF
LTC3706EGN#TRPBF
LTC3706EGN
24-Lead Plastic SSOP
–40°C to 85°C
LTC3706IGN#PBF
LTC3706IGN#TRPBF
LTC3706IGN
24-Lead Plastic SSOP
–40°C to 85°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3706EGN
LTC3706EGN#TR
LTC3706EGN
24-Lead Plastic SSOP
–40°C to 85°C
LTC3706IGN
LTC3706IGN#TR
LTC3706IGN
24-Lead Plastic SSOP
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3706fb
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LTC3706
ELECTRICAL CHARACTERISTICS
The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 7V, VIN = 15V, GND = PGND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VFB
Regulated Feedback Voltage
(Note 4) ITH = 1.2V
IFB
Feedback Input Current
(Note 4)
ΔVFB(LINREG)
Feedback Voltage Line Regulation
VIN = 6V to 30V, ITH = 1.2V
MIN
TYP
MAX
UNITS
0.594
0.600
0.606
V
2
100
nA
Main Control Loop
l
0.001
l
%/V
ΔVFB(LOADREG)
Feedback Voltage Load Regulation
Measured in Servo Loop,
ITH = 0.5V to 2V
VISMAX
Maximum Current Sense Threshold
RSENSE Mode, 0V < VIS– < 5V
VIS– = VCC, 0V < VIS+ < 2V (CT Mode)
VISOC
Over-Current Shutdown Threshold
RSENSE Mode, 0V < VIS– < 5V
VIS– = VCC, 0V < VIS+ < 2V (CT Mode)
gm
Transconductance Amplifier gm
IRUN/SS(C)
Soft-Start Charge Current
IRUN/SS(D)
Soft-Start Discharge Current
VRUN/SS
RUN/SS Pin ON Threshold
tON,MIN
Minimum ON Time
FG, SG RUP
FG, SG Driver Pull-Up On Resistance
FG, SG Low
1.5
2.3
Ω
FG, SG RDOWN
FG, SG Driver Pull-Down On Resistance
FG, SG High
1.5
2.3
Ω
PT+, PT– RUP
PT+, PT– RDOWN
PT+, PT– Driver Pull-Up Resistance
PT+, PT– Low
1.5
2.3
Ω
PT+, PT– Driver Pull-Down Resistance
PT+, PT– High
1.5
2.3
Ω
ΔVFB(OV)
Output Overvoltage Threshold
VFB Rising
17
19
%
10
V
7.4
V
VRUN/SS = 2V
–0.01
–0.1
%
68
1.15
78
1.28
88
1.4
mV
V
87
1.45
100
1.65
113
1.85
mV
V
2.40
2.75
3.10
mS
–4
–5
–6
μA
0.4
0.45
3
VRUN/SS Rising
l
μA
0.5
200
15
V
ns
VCC Supply
VCCOP
Operating Voltage Range
5
VCCREG
Regulated Output Voltage
6.6
ICC
Supply Current
Operating
Shutdown
fOSC = 200kHz (Note 5)
VRUN/SS = GND
VUVLO
UV Lockout
VCC Rising
VHYS
UV Hysteresis
7.0
4.2
240
l
4.52
4.60
mA
μA
4.70
0.4
V
V
VIN Supply
VINOP
Operating Voltage Range
IIN
Supply Current
Normal Mode
Shutdown
fOSC = 200kHz
VRUN/SS = GND
UV Lockout
VIN Rising
VREGSD
REGSD Shutdown Threshold
VREGSD Rising
gm,REGSD
REGSD Transconductance
VINUVLO
5
VINHYS
30
900
460
l
3.90
4.30
V
μA
μA
4.51
V
0.2
V
4
V
5
μS
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LTC3706
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Oscillator and Phase-Locked Loop
IFS
FS/SYNC Pin Sourcing Current
20
μA
fLOW
Oscillator Low Frequency Set Point
VFS/SYNC = GND
170
200
230
kHz
fHIGH
Oscillator High Frequency Set Point
VFS/SYNC = VCC
255
300
345
kHz
Δf (RFS)
Oscillator Resistor Set Accuracy
75kΩ < RFS/SYNC < 175kΩ
–20
20
%
fPLL(MAX)
Maximum PLL Sync Frequency
500
kHz
fPLL(MIN)
Minimum PLL Sync Frequency
75
kHz
PGOOD Output
VFBH/0.6
Power Good Upper Threshold
VFB Rising
115
117
119
%
VFBL1/0.6
Power Good Lower Threshold
VFB Rising
91.5
93
94.5
%
VFBL2/0.6
Power Good Lower Threshold
VFB Falling
89.5
91
92.5
%
VS– = GND, 1V ≤ VS+ ≤ 5V
0.994
1
1.006
V/V
Differential Amplifier (VSENSE AMP)
ADA
Gain
CMRR DA
Common Mode Rejection Ratio
75
dB
RIN
Input Resistance
80
kΩ
fBW
–3dB Bandwidth
3
MHz
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3706E is guaranteed to meet the performance specifications over the 0°C to 85°C operating temperature range. Specifications
over the –40°C to 85°C operating temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3706I is guaranteed and tested over the full –40°C to 85°C
operating temperature range.
Note 3: Junction temperature TJ (in °C) is calculated from the ambient temperature TA and the average power dissipation PD (in Watts) by the formula:
TJ = TA + θJA • PD
Refer to the Applications Information section for details.
Note 4: The LTC3706 is tested in a feedback loop that servos VFB to a
voltage near the internal 0.6V reference voltage to obtain the specified ITH
voltage (VITH = 1.2V).
Note 5: Operating supply current is measured in test mode. Dynamic
supply current is higher due to the internal gate charge being delivered at
the switching frequency. See Typical Performance Characteristics.
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LTC3706
TYPICAL PERFORMANCE CHARACTERISTICS
VCC Supply Current
vs Input Voltage
VCC Regulator Output Voltage
vs Temperature
Maximum Current Sense
Threshold vs Duty Cycle
7.06
fOSC = 200kHz
ALL GATES: CLOAD = 0
100
7.04
5
4
80
7.00
VIS/VIS,MAX (%)
6
RSLP = 0
7.02
VCC OUTPUT VOLTAGE (V)
SUPPLY CURRENT (mA)
7
TA = 25°C, unless otherwise noted.
6.98
6.96
6.94
100kΩ
60
RSLP = 50k
40
6.92
6.90
20
6.88
6.86
–50
3
6
5
7
8
INPUT VOLTAGE (V)
10
9
0
–25
0
25
50
75
TEMPERATURE (°C)
100
VIS/VIS,MAX (%)
IS Pins Source Current
vs Temperature
40
20
400
265
300
260
IS PIN SOURCE CURRENT (μA)
IS PIN SOURCE CURRENT (μA)
100
200
100
CT-MODE: IIS+
0
–100
–200
–400
0
0
0.5
1.0
1.5
2.0
ITH VOLTAGE (V)
3.0
2.5
–1
0
1
5
2
3
4
IS+, IS– COMMON-MODE VOLTAGE (V)
3706 G04
460
100.0
99.5
6
25
50
75
TEMPERATURE (°C)
240
230
–50
100
125
3706 G07
–25
0
25
50
75
TEMPERATURE (°C)
125
3706 G06
5
450
440
420
–50
100
Oscillator Frequency
vs Temperature
430
0
245
PERCENT CHANGE IN FREQUENCY (%)
101.0
VRUN/SS (mV)
470
–25
250
RUN/SS ON Threshold
vs Temperature
101.5
99.0
–50
255
3706 G05
Maximum Current Sense
Threshold vs Temperature
100.5
RS-MODE: (IIS+ + IIS–)
VIS+ = VIS– = 0V
235
RS-MODE: (IIS+ + IIS–)
–300
80
60
3706 G03
IS Pins Source Current
60
40
3706 G02
Maximum Current Sense
Threshold vs ITH Voltage
80
20
0
DUTY CYCLE (%)
3706 G01
VIS/VIS,MAX (%)
125
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3706 G08
4
3
2
R = 175KΩ
fOSC = 500kHz
1
0
–1
–2
–50
R = 75KΩ
fOSC = 100kHz
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3706 G14
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LTC3706
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
REGSD Shutdown Threshold
vs Temperature
Oscillator Frequency vs RFS
600
FB Voltage vs Temperature
4.010
601.0
4.005
600.5
300
VFB (mV)
400
VREGSD (V)
FREQUENCY (kHz)
500
4.000
600.0
200
3.995
599.5
100
3.990
–50
0
50
75
100
125
150
RFS (kΩ)
200
175
–25
0
25
50
75
TEMPERATURE (°C)
100
3706 G09
599.5
4.60
5
0
10
30
15
20
25
VIN SUPPLY VOLTAGE (V)
4.45
4.40
PULL-DOWN
1.4
PULL-UP
VIN RISING
1.3
4.25
–50
1.2
–25
0
25
50
75
TEMPERATURE (°C)
100
125
5
6
7
8
VCC VOLTAGE (V)
3706 G16
9
10
3706 G12
Efficiency (Figure 5)
Load Step (Figure 5)
95
VCC = 7V
VIN = 36V
2.25
VOUT
100mV/DIV
EFFICIENCY (%)
2.00
RDS,ON (Ω)
1.5
4.35
Gate Driver On-Resistance
vs Temperature
125
1.6
4.50
3706 G11
1.75
1.50
90
VIN = 72V
IOUT
10A/DIV
85
20μs/DIV
VIN = 48V
VOUT = 3.3V
LOAD STEP = 0A TO 20A
1.25
1.00
–50
100
1.7
VCC RISING
4.55
4.30
599.0
25
50
75
TEMPERATURE (°C)
1.8
RDS,ON (Ω)
UVLO THRESHOLD VOLTAGE (V)
600.0
0
Gate Driver On-Resistance vs VCC
4.65
600.5
–25
3706 G15
Undervoltage Lockout
vs Temperature
601.0
2.50
599.0
–50
3706 G10
FB Voltage Line Regulation
VFB (mV)
125
80
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3706 G13
0
5
10
15
LOAD CURRENT (A)
20
3706 G18
25
3706 G17
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LTC3706
PIN FUNCTIONS
SG (Pin 1): Gate Drive for the “Synchronous” MOSFET.
FG (Pin 2): Gate Drive for the “Forward” MOSFET.
SLP (Pin 14): Slope Compensation Input. Place a single
resistor to ground to set the desired amount of slope
compensation.
PGOOD (Pin 3): Open-Drain Power Good Output. The FB
pin is monitored to ensure that the output is in regulation.
When the output is not in regulation, the PGOOD pin is
pulled low.
IS– (Pin 15): Negative Input to the Current Sense Circuit.
When using current sense transformers, this pin may be
tied to VCC for single-ended sensing with a 1.28V maximum
current trip level.
MODE (Pin 4): Tie to either GND or VCC to set the maximum duty cycle at either 50% or 75% respectively. Tie to
ground through either a 200k or 100k resistor (50% or
75% maximum duty cycle) to disable pulse encoding. In
this mode, normal PWM signals will be generated at the
PT+ pin, while a clock signal is generated at the PT– pin.
IS+ (Pin 16): Positive Input to the Current Sense Circuit.
Connect to the positive end of a current sense resistor or
to the output of a current sense transformer.
FB (Pin 6): The Inverting Input of the Main Loop Error
Amplifier.
REGSD (Pin 17): This pin is used to prevent overheating of the
external linear regulator pass device that generates the VCC
supply voltage from the VIN voltage. A current proportional
to the voltage across the external pass device flows out of
this pin. The IC shuts down the linear regulator when the
voltage on this pin exceeds 4V. Place a resistor (or a resistor
and capacitor in parallel) between this pin and GND to limit
the temperature rise of the external pass device.
ITH (Pin 7): The Output of the Main Loop Error Amplifier.
Place compensation components between the ITH pin
and GND.
NDRV (Pin 18): Drive Output for the External Pass Device
of the VCC Linear Regulator. Connect to the base (NPN) or
gate (NMOS) of an external N-type device.
RUN/SS (Pin 8): Combination Run Control and Soft-Start
Inputs. A capacitor to ground sets the ramp time of the
output voltage. Holding this pin below 0.4V causes the IC
to shut down all internal circuitry.
VIN (Pin 19): Connect to a higher voltage bias supply,
typically the output of a peak detected bias winding. When
not used, tie together with the VCC and NDRV pins.
PHASE (Pin 5): Control Input to the Phase Selector. This
pin determines the phasing of the controller CLK relative
to the synchronizing signal at the FS/SYNC pin.
VSOUT, VS+, VS– (Pins 9, 10, 11): VSOUT is the output of
a precision, unity-gain differential amplifier. Tie VS+ and
VS– to the output of the main DC/DC converter to achieve
true remote differential sensing. This allows DCR error
effects to be minimized.
GND (Pin 12): Signal Ground.
FS/SYNC (Pin 13): Combination Frequency Set and SYNC
pin. Tie to GND or VCC to run at 200kHz and 300kHz
respectively. Place a single resistor to ground at this pin
to set the frequency between 100kHz and 500kHz. To
synchronize, drive this pin with a clock signal to achieve
PLL synchronization from 75kHz to 500kHz. Sources
20μA of current.
SW (Pin 20): Connect to the drain of the “synchronous”
MOSFET. This input is used for adaptive shoot-through
prevention and leading edge blanking.
PT–, PT+ (Pins 21, 22): Pulse Transformer Driver Outputs.
For most applications, these connect to a pulse transformer (with a series DC blocking capacitor). The PWM
information is multiplexed together with DC power and
sent through a single pulse transformer to the primary
side. This information may be decoded by the LTC3705
gate driver and primary-side controller.
PGND (Pin 23): Gate Driver Ground Pin.
VCC (Pin 24): Main VCC Input for all Driver and Control
Circuitry.
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LTC3706
BLOCK DIAGRAM
IS+
2×
16
+
IS–
VCC
+
32×
C
–
–
15
2V
FG
ITRP
2
RESET
DOMINANT
WAIT
OVP
PGND
R
23
VCC
SG
Q
S
+
+
0.25V
–
6
ZERO
CROSSING
DETECT
BLANK
+
+
gm = 2.8mS
2.5V
–
3.2V
14
–
OVERCURRENT
SLOPE
COMP 1
OSC
AND
PLL
5
MODE
4
VCC
PT+
PGND
VCC
•
•
PT–
21
PULSE
XFMR
DRIVE
TYPE
13
PHASE
20
22
DRIVER
ENCODING
AND
LOGIC
RUN/SS
FS/SYNC
–
OC
C
EA
SLP
0.2V
SW
–
7
FB
+
OVP
C
ITH
0.60V
DMAX
SKIP
C
1
WAIT
PWM
BLANK
DMAX
DRIVE/DMAX
CONTROL
5VDC TO
30VDC
VIN
19
UVLO
4VSB
RUN/SS
REG
SOFTSTART
VCCUV
R
–
SHDN
275k
S
OC
OT LATCH
OT
5VDC TO
10VDC
VIN
VIN
+
gm = 5μS
A
–
40k
40k
10
VCC
24
4VSB
+
9
4V
VCC
REGSD
17
–
PGOOD
VCC
+
VSENSE
AMP
–
VS–
18
Q
VSOUT
VS+
NDRV
A
60k
WAIT
RESTRT1
1.24V
VREF
4VSB
SSLOW
4VSB
4VSB
+
SHDN
FB
8
VINUV
SHDN
UVLO
(4.25/4.5)
VCCUV
FB
0.6V
PGOOD/OVP
3
OVP
GND
12
3706 BD
40k
40k
11
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LTC3706
OPERATION
Main Control Loop
The LTC3706 is designed to work in a constant frequency,
current mode 2-transistor forward converter. During
normal operation, the primary-side MOSFETs (both top
and bottom) are “clocked” on together with the forward
MOSFET on the secondary side. This applies the reflected
input voltage across the inductor on the secondary side.
When the current in the inductor has ramped up to the
peak value as commanded by the voltage on the ITH pin,
the current sense comparator is tripped, turning off the
primary-side and forward MOSFETs. To avoid turning
on the synchronous MOSFET prematurely and causing
shoot-through, the voltage on the SW pin is monitored.
This voltage will usually fall below 0V soon after the
primary-side MOSFETs have turned completely off. When
this condition is detected, the synchronous MOSFET is
quickly turned on, causing the inductor current to ramp
back downwards. The error amplifier senses the output
voltage, and adjusts the ITH voltage to obtain the peak
current needed to maintain the desired main-loop output
voltage. The LTC3706 always operates in a continuous
current, synchronous switching mode. This ensures a rapid
transient response as well as a stable bias supply voltage
at light loads. A maximum duty cycle (either 50% or 75%)
is internally set via clock dividers to prevent saturation of
the main transformer. In the event of an overvoltage on
the output, the synchronous MOSFET is quickly turned on
to help protect critical loads from damage.
Gate Drive Encoding
Since the LTC3706 controller resides on the secondary side
of an isolation barrier, communication to the primary-side
power MOSFETs is generally done through a transformer.
Moreover, it is often necessary to generate a low voltage
bias supply for the primary-side gate drive circuitry. In
order to reduce the number of isolated windings present
in the system, the LTC3706 uses a proprietary scheme
to encode the PWM gate drive information and multiplex
it together with bias power for the primary-side drive
and control, using a single pulse transformer. Note that,
unlike optoisolators and other modulation techniques, this
multiplexing scheme does not introduce a significant time
delay into the system.
For most forward converter applications, the PT+ and
PT– outputs will contain a pulse-encoded PWM signal.
These outputs are driven in a complementary fashion with
an essentially constant 50% duty cycle. This results in a
stable volt-second balance as well as an efficient transfer
of bias power across the pulse transformer. As shown in
Figure 1, the beginning of the positive half-cycle coincides
with the turn-on of the primary-side MOSFETs. Likewise,
the beginning of the negative half-cycle coincides with the
maximum duty cycle (forced turn-off of primary switches).
At the appropriate time during the positive half-cycle, the
end of the “on” time (PWM going LOW) is signaled by
briefly applying a zero volt differential across the pulse
transformer. Figure 1 illustrates the operation of this
multiplexing scheme.
The LTC3705 primary-side controller and gate driver will
decode this PWM information as well as extract the power
needed for primary-side gate drive.
Self-Starting Architecture
When the LTC3706 is used in conjunction with the
LTC3705 primary-side controller and gate driver, a
complete self-starting isolated supply is formed. When
input voltage is first applied in such an application, the
LTC3705 will begin switching in an “open-loop” fashion,
causing the main output to slowly ramp upwards. This
is the primary-side soft-start mode. On the secondary
side, the LTC3706 derives its operating bias voltage from
a peak-charged capacitor. This peak-charged voltage will
rise more rapidly than the main output of the converter,
so that the LTC3706 will become operational well before
the output voltage has reached its final value.
3706fb
9
LTC3706
OPERATION
150ns
150ns
7V
the amount of slope compensation doubles when the duty
cycle exceeds 50%.
DUTY CYCLE = 0%
DUTY CYCLE = 15%
7V
Table 1
SLP PIN
SLOPE (D < 0.5)
SLOPE (D > 0.5)
GND
0.05 • ISMAX • fOSC
0.1 • ISMAX • fOSC
VCC
None
None
400kΩ to GND
0.1 • ISMAX • fOSC
0.2 • ISMAX • fOSC
Figure 1: Gate Drive Encoding Scheme (VMODE = GND)
200kΩ to GND
0.15 • ISMAX • fOSC
0.3 • ISMAX • fOSC
100kΩ to GND
0.25 • ISMAX • fOSC
0.5 • ISMAX • fOSC
When the LTC3706 has adequate operating voltage, it will
begin the procedure of assuming control from the primary
side. To do this, it first measures the voltage on the power
supply’s main output and then automatically advances its
own soft-start voltage to correspond to the main output
voltage. This ensures that the output voltage increases
monotonically as the soft-start control is transferred from
primary to secondary. The LTC3706 then begins sending
PWM signals to the LTC3705 on the primary side through a
pulse transformer. When the LTC3705 has detected a stable
signal from the secondary controller, it transfers control of
the primary switches over to the LTC3706, beginning the
secondary-side soft-start mode. The LTC3706 continues
in this mode until the output voltage has ramped up to
its final value. If for any reason, the LTC3706 either stops
sending (or initially fails to send) PWM information to the
LTC3705, the LTC3705 will detect a FAULT and initiate a
soft-start retry. (See the LTC3705 data sheet.)
50kΩ to GND
0.5 • ISMAX • fOSC
1.0 • ISMAX • fOSC
VPT1+ – VPT1–
–7V
–7V
1 CLK PER
3706 F01
1 CLK PER
Slope Compensation
Slope compensation is added at the input of the PWM
comparator to improve stability and noise margin of the
peak current control loop. The amount of slope compensation can be selected from one of five preprogrammed
values using the SLP pin as shown in Table 1. Note that
In Table 1 above, ISMAX is the maximum current limit, and fOSC is the
switching frequency.
Current Sensing and Current Limit
For current sensing, the LTC3706 supports either a current
sense resistor or a current sense transformer. The current
sense resistor may either be placed in series with the
inductor (either high side or ground lead sensing), or
in the source of the “forward” switch. If a current sense
transformer is used, the IS– input should be tied to VCC and
the IS+ pin to the output of the current sense transformer.
This causes the gain of the internal current sense amplifier
to be reduced by a factor of 16×, so that the maximum
current sense voltage (current limit) is increased from
78mV to 1.28V. An internal, adaptive leading edge blanking
circuit ensures clean operation for “switch” current sensing
applications.
Current limit is achieved in the LTC3706 by limiting the
maximum voltage excursion of the error signal (ITH voltage). Note that if slope compensation is used, the precise
value at which current limit occurs will be a function of
duty cycle (See Typical Performance Characteristics).
If a short circuit is applied, an independent overcurrent
comparator may be tripped. In this case, the LTC3706 will
enter a “hiccup” mode using the soft-start circuitry.
3706fb
10
LTC3706
OPERATION
Frequency Setting and Synchronization
Soft-Start
The LTC3706 uses a single pin to set the operating
frequency, or to synchronize the internal oscillator to a
reference clock with an on-chip phase-locked loop (PLL).
The FS pin may be tied to GND, VCC or have a single
resistor to GND to set the switching frequency. If a clock
signal (>2V) is detected at the FS pin, the LTC3706 will
automatically synchronize to the rising edge of the reference
clock. Table 2 summarizes the operation of the FS pin.
The soft-start circuitry has five functions: 1) to provide
a shutdown, 2) to provide a smooth ramp on the output
voltage during start-up, 3) to limit the output current in
a short-circuit situation by entering a hiccup mode, 4) to
limit the maximum power dissipation in the external linear
regulator via the REGSD pin, and 5) to communicate fault
and shutdown information between multiple LTC3706s in
a PolyPhase application.
For synchronization between multiple LTC3706s, the
PT+ pin of one LTC3706 can be used as a master clock
reference and tied to the FS pin of the other LTC3706s.
When the RUN/SS pin is pulled to GND, the chip is placed
into shutdown mode. If this pin is released, the RUN/SS
pin is initially charged with a 50μA current source. After
the RUN/SS pin gets above 0.5V, the chip is enabled. At
the instant that the LTC3706 is first enabled, the RUN/SS
voltage is rapidly preset to a voltage that will correspond
to the main output voltage of the DC/DC converter. (See
the Self-Starting Architecture section.) After this preset
interval has completed, the normal soft-start interval begins
and the charging current is reduced to 5μA. The external
soft-start voltage is used to internally ramp up the 0.6V
reference (positive) input to the error amplifier. When fully
charged, the RUN/SS voltage remains at 3V.
Table 2
FS PIN
SWITCHING FREQUENCY
GND
200kHz
VCC
300kHz
RFS to GND
fOSC (Hz) = 4RFS – 200k
Reference Clock
fOSC = fREF (75kHz to 500kHz)
This will cause all LTC3706’s to operate at the same frequency. The phase angle of each LTC3706 that is being
synchronized can be set by using the PHASE pin. This pin
can be tied to GND, VCC or have a single resistor to VCC
to set the phase angle (delay) of the internal oscillator
relative to the incoming sync signal on the FS pin. Any
one of five preset values can be selected as summarized
in Table 3.
Table 3
PHASE PIN
LTC3706 PHASE DELAY
GND
0°
VCC
180°
200kΩ to VCC
60°
100kΩ to VCC
90°
50kΩ to VCC
120°
In the event that the sensed switch or inductor current
exceeds the overcurrent trip threshold, an internal fault
latch is tripped. This latch is also tripped when the REGSD
voltage exceeds 4V (see the Linear Regulator section).
When such a fault is detected, the LTC3706 immediately
goes to zero duty cycle and initiates a soft-start retry.
Prior to discharging the soft-start capacitor, however, the
LTC3706 first puts a voltage pulse on the RUN/SS pin, which
trips the fault latch in any other LTC3706 that shares the
RUN/SS. This ensures an orderly shutdown of all phases
in a PolyPhase application. After the soft-start capacitor
is fully discharged, the LTC3706 attempts a restart. If the
fault is persistent, the system enters a “hiccup” mode.
3706fb
11
LTC3706
OPERATION
Note that in self-starting secondary-side control applications (with the LTC3705), the presence of the LT3706
bias voltage is dependent upon the regular switching of
the primary-side MOSFETs. Therefore, depending on the
details of the application circuit, the LTC3706 may lose
its bias voltage after a fault has been detected and before
completing a soft-start retry. In this case, the “hiccupmode” operation is actually governed by the LTC3705
soft-start circuitry. (See the LTC3705 data sheet.)
Drive Mode and Maximum Duty Cycle
Although the LTC3706 is primarily intended to be used with
the LTC3705 in 2-transistor forward applications, the MODE
pin provides the flexibility to use the LTC3706 in a wide
variety of additional applications. This pin can be used to
defeat the gate drive encoding scheme, as well as change
the maximum duty cycle from its default value of 50%.
The use of the MODE pin is summarized in Table 4.
When the gate drive encoding scheme is defeated, a
standard PWM-style signal will be present at the PT+ pin
and a reference clock (in phase with the PWM signal) will
be present at the PT– pin. These outputs can be used in
“standalone” applications (without the LTC3705) to drive
the gates of MOSFETs in a conventional manner.
Table 4
PT+/PT– Mode
(MAX DUTY CYCLE)
INTENDED
APPLICATION
GND
Encoded PWM
(DMAX = 50%)
2-Switch Forward
with LTC3705
VCC
Encoded PWM
(DMAX = 75%)
1-Switch Forward
200kΩ to GND
Standard PWM
(DMAX = 50%)
2-Switch Forward
Standalone
100kΩ to GND
Standard PWM
(DMAX = 75%)
1-Switch Forward
Standalone
MODE PIN
Power Good/Overvoltage Protection
This circuit monitors the voltage on the FB input. The
open-drain PGOOD output will be logic high if the voltage
on the FB pin is within +17%/–7% of 0.6V. If the voltage on
the FB pin exceeds 117% of 0.6V (0.7V), an overvoltage
(OVP) is detected. For overvoltage protection, the secondary-side synchronous MOSFET is turned on while all
other MOSFETs are turned off. This protection mode is
not latched, so that the overvoltage detection is cleared if
the FB voltage falls below 115% of 0.6V (0.69V).
Linear Regulator Operation
The LTC3706 provides a linear regulator controller that
drives an external N-type pass device. This controller is used
to create a 7V DC bias from the peak-charged secondary
bias voltage (8V to 30V). Internal divider resistors are used
to establish a regulation voltage of 7V at the VCC pin. An
auxiliary bias supply with a regulated voltage greater than
7V may be applied to the VCC pin to bypass (bootstrap) the
linear regulator. This improves efficiency and also helps to
avoid overheating the linear regulator pass device.
Thermal protection for the linear regulator pass device is
also provided by means of the REGSD pin. A current is
sourced from this pin that is proportional to the voltage
across the linear regulator pass device (VIN – VCC). Since
the VCC load current is essentially constant for a given
switching frequency and choice of power MOSFETs, the
power dissipated in the external pass device will only vary
with the voltage across it. Thus, a single resistor may be
placed between the REGSD pin and GND to develop a voltage that is proportional to the power in the external pass
device. An additional parallel capacitor can also be used
to account for the thermal time constant associated with
the external pass device itself. When the voltage on the
REGSD pin exceeds 4V, an overtemperature fault occurs
and the LTC3706 attempts a soft-start retry.
3706fb
12
LTC3706
OPERATION
Slave Mode Operation
When two or more LTC3706 devices are used in PolyPhase
systems, one device becomes the “master” controller, while
the others are used as “slaves.” Slave mode is activated
by connecting the FB pin to VCC. In this mode, the ITH pin
becomes a high impedance input, allowing it to be driven by
the master controller. In this way, equal inductor currents
are established in each of the individual phases. Also, in
slave mode the soft-start charge/discharge currents are
disabled, allowing the master device to control the charging
and discharging of the soft-start capacitor.
APPLICATIONS INFORMATION
Start-Up Considerations
In self-starting applications, the LTC3705 will initially begin
the soft-start of the converter in an open-loop fashion.
After bias is obtained on the secondary side, the LTC3706
assumes control and completes the soft-start interval. In
order to ensure that control is properly transferred from the
LTC3705 (primary-side) to the LTC3706 (secondary-side),
it is necessary to limit the rate of rise on the primary-side
soft-start ramp so that the LTC3706 has adequate time to
wake up and assume control before the output voltage gets
too high. This condition is satisfied for many applications
if the following relationship is maintained:
CSS,SEC ≤ CSS PRI
However, care should be taken to ensure that soft-start
transfer from primary-side to secondary-side is completed
well before the output voltage reaches its target value. A
good design goal is to have the transfer completed when
the output voltage is less than one-half of its target value.
Note that the fastest output voltage rise time during primary-side soft-start mode occurs with maximum input
voltage and minimum load current.
The open-loop start-up frequency on the LTC3705 is set
by placing a resistor from the FB/IN+ pin to GND. Although
the exact start-up frequency on the primary side is not
critical, it is generally good practice to set this approximately equal to the operating frequency on the secondary
side. The FS/IN– start-up resistor for the LTC3705 may be
selected using the following:
fPRI(Hz) =
3.2 • 1010
RFS /IN– + 10k
In the event that the secondary-side circuitry fails to
properly start up and assume control of switching, there
are several fail-safe mechanisms to help avoid overvoltage
conditions. First, the LTC3705 contains a volt-second
clamp that will keep the primary-side duty cycle at a level
that cannot produce an overvoltage condition. Second,
the LTC3705 contains a time-out feature that will detect
a FAULT if the LTC3706 fails to start up and deliver PWM
signals to the primary side. Finally, the LTC3706 has an
independent overvoltage detection circuit that will crowbar
the output of the DC/DC converter using the synchronous
MOSFET switch.
In the event that a short circuit is applied to the output of
the DC/DC converter prior to start-up, the LTC3706 will
generally not receive enough bias voltage to operate. In
this case, the LTC3705 will detect a FAULT for one of two
reasons: 1) the start-up time-out feature will be activated
since the LTC3706 never sends signals to the primary side
or 2) the primary-side overcurrent circuit will be tripped
because of current buildup in the output inductor. In either
case, the LTC3705 will initiate a shutdown followed by a
soft-start retry. See the LTC3705 data sheet for further
details.
3706fb
13
LTC3706
APPLICATIONS INFORMATION
Bias Supply Generation
Figure 2 shows a commonly used method of developing
a VCC bias supply for the LTC3706. During start-up, bias
winding 1 uses a peak detection method to rapidly develop
a VIN voltage for the LTC3706, which in turn drives the
linear regulator that generates the VCC voltage (7V). When
the main output of the converter is in regulation, winding
2 (configured as a forward-style output) is designed to
produce a regulated auxiliary voltage of approximately
7.5V to 8.5V. Since the auxiliary voltage is greater than that
of the linear regulator, the linear regulator will effectively
be shut down. Note that the output inductor L1 must be
adequately large so that its ripple current is continuous
given the amount of VCC load current, thereby providing
a stable output voltage.
BAS21
•
1mH
WINDING 2
NB2
•
1
BAS21
MBRO530
•
4.7Ω
WINDING 1
NB1
MAIN
TRANSFORMER
FMMT491A
1μF
50V
4.7μF
16V
VIN
LTC3706
REGSD NDRV
CREGSD
RREGSD
VCC
3706 F02
The turns ratio (NB1) of the bias winding 1 should be chosen to ensure that there is adequate voltage to operate the
LTC3706 over the entire range for the DC/DC converter’s
input bus voltage (VBUS). This may be calculated using:
NB1=
VCC(MIN) + 1.5V
VBUS(MIN)
VCC(MIN) can be as low as 5V (if this provides adequate
gate drive voltage to maintain acceptable efficiency) or as
high as 7V. For VCC(MIN) = 6V and VBUS = 36V to 72V, this
would mean a turns ratio of NB1 ≈ 0.21 and a VIN voltage
range at the LTC3706 of 7.5V to 15V.
Using the bias circuit of Figure 2, the linear regulator
would normally operate only for a brief interval during the
initial soft-start ramp of the main output voltage. Under
some fault conditions (e.g., output overload), the auxiliary
voltage produced by bias winding 2 may decrease below
7V, causing the linear regulator to again supply the VCC
bias current. Since the amount of power dissipation in the
linear regulator pass device may be quite high, it can take
considerable board area when the linear regulator pass
device is sized to handle this power continuously. As an
alternative, the REGSD pin may be used to effectively detect
an overtemperature condition on the linear regulator pass
device and generate a shut down (soft-start retry) before
overheating occurs. This allows for the use of a small (e.g.,
SOT-23) package for the linear regulator pass device.
Figure 2. Typical Bias Supply Configuration
3706fb
14
LTC3706
APPLICATIONS INFORMATION
The REGSD resistor should be selected based upon the
steady-state (DC) thermal impedance of the linear regulator pass device.
RREGSD = 960k
θ JA • ICC(MAX )
TRISE(MAX )
where θJA is the DC thermal impedance of the linear
regulator pass device and TRISE(MAX) is the maximum
junction temperature rise desired for the pass device.
The value for ICC(MAX) depends heavily on the particular
switching MOSFETs used, as well as on the details of
overall system design. Note that it may include the bias
current associated with the primary-side gate driver and
controller, if the LTC3705 is being used. The value for ICC
is best determined experimentally and then guard banded
appropriately to establish ICC(MAX). Using the Typical Application circuit on the first page of this data sheet as an
example, if a SOT-23 MOSFET is chosen, we might have
θJA = 150°C/W, tRISE(MAX) = 50°C and ICC(MAX) = 35mA so
that RREGSD ≈ 100kΩ. In this case, the linear regulator can
run continuously for any VIN voltage that is less than:
4V = (VIN – VCC)(5μs)(RREGSD)
⎛ 640k ⎞
VIN(MAX ) = ⎜
+ 7V
⎝ RREGSD ⎟⎠
or 13.4V. In addition, a capacitor may be added in parallel
with the REGSD resistor to delay the thermal shutdown
and thereby account for the thermal time constant of the
pass device. When using a delay capacitor, care must be
taken to ensure that the safe operating area (SOA) of the
pass device is not exceeded. The capacitor should be
chosen to provide a time constant that is somewhat faster
than the thermal time constant of the pass device in the
system. This technique will allow for much higher transient
power dissipation, which is particularly useful in larger
(PolyPhase) systems that have a higher VCC bias current.
For the above SOT-23 example, a capacitor CREGSD = 1μF
provides a linear regulator shutdown delay given by:
⎛
⎞
⎜
⎟
1
t SHDN = (CREGSD )(RREGSD ) ln ⎜
⎟
640k
⎜ 1–
⎟
⎜⎝ ( V – 7 )R
⎟
IN
REGSD ⎠
or 33ms at VIN = 30V. This delay provides ample time for
linear regulator operation during soft-start, while providing
protection for the pass device during fault conditions such
as input overvoltage or output overcurrent.
Current Sensing
The LTC3706 provides considerable flexibility in current
sensing techniques. It supports two main methods: 1)
resistive current sensing and 2) current transformer current sensing. Resistive current sensing is generally simpler,
smaller and less expensive, while current transformer
sensing is more efficient and generally appropriate for
higher (>20A) output currents. For resistive current sensing, the sense resistor may be placed in any one of three
different locations: high side inductor, low side inductor
or low side switch, as shown in Figure 3. Sensing the
3706fb
15
LTC3706
APPLICATIONS INFORMATION
inductor current (high side or low side) is generally less
noisy but dissipates more power than sensing the switch
current (Figures 3a and 3b). High side inductor current
sensing provides a more convenient layout than low side
(no split ground plane), but can only be used for output
voltages up to 5.5V, due to the common mode limitations
of the current sense inputs (IS+ and IS–). For most applications, low side switch current sensing will be a good
solution (Figure 3c).
•
IS+
•
LTC3706
For high current applications where efficiency (power dissipation) is very important, a current sense transformer
may be used. As shown in Figure 3d, the IS– pin should
be tied off to VCC when a current sense transformer is
used. This causes the IS+ pin to become a single ended
(nondifferential) current sense input with a maximum
current sense voltage of 1.28V. Figure 3d shows a typical
application circuit using a current transformer.
•
IS+
•
LTC3706
78mV MAX
78mV MAX
IS–
IS–
3706 F03a
3706 F03b
Figure 3a. High Side Inductor:
Easier Layout, Low Noise, Accurate
Figure 3b. Low Side Inductor:
Accurate, Low Noise, High VOUT Capable
•
•
•
•
1.28V MAX
TRIP
IS+
LTC3706
•
78mV MAX
IS–
IS+
LTC3706
•
5W TO
50Ω
VCC
IS–
3706 F03c
3706 F03d
Figure 3c. Switch Current Sensing: Easy Layout,
Accurate, Higher Efficiency, High VOUT Capable
Figure 3d. Current Transformer:
Highest Efficiency, High VOUT Capable
Figure 3. Current Sensing Techniques
3706fb
16
LTC3706
APPLICATIONS INFORMATION
PolyPhase Applications
LTC3705’s are interconnected, a FAULT (overcurrent, etc.)
on any one of the phases will perform a shutdown/restart
on all phases together. The LTC3705 is put into slave mode
by omitting the resistor on FS/IN–. For the LTC3706, the
master performs soft-start and voltage-loop regulation by
driving all slaves to the same current as the master using
the ITH pins. Faults and shutdowns are communicated via
the interconnection of the RUN/SS pins. The LTC3706 is
put into slave mode by tying the FB pin to VCC.
Figure 4 shows the basic connections for using the LTC3705
and LTC3706 in PolyPhase applications. One of the phases
is always identified as the “master,” while all other phases
are “slaves.” For the LTC3705 (primary side), the master
monitors the VIN voltage for undervoltage, performs the
open-loop start-up and supplies the initial VCC voltage for
the master and all slaves. The LTC3705 slaves simply stand
by and wait for PWM signals from their respective pulse
transformers. Since the SS/FLT pins of master and slave
VIN+
VOUT+
VBIAS
VIN NDRV VCC
FS/SYNC
NDRV
UVLO
FB/IN+
•
•
PT+
VCC
FB
ITH
PT–
RUN/SS
LTC3706
(MASTER)
FS/IN–
SS/FLT
LTC3705
(MASTER)
VIN–
VIN NDRV VCC
RUN/SS FS/SYNC
NDRV
SS/FLT FB/IN+
VCC
UVLO
•
•
FB
PT+
ITH
FS/IN–
LTC3705
(SLAVE)
PT–
PHASE
LTC3706
(SLAVE)
3706 F05
Figure 4. Connections for PolyPhase Operation
3706fb
17
LTC3706
TYPICAL APPLICATION
VIN+
L1 1μH
MURS120
T1
•
Si7852DP
1μF
100V
1μF
100V
s3
•
1nF
100V
1.2Ω
Si7336ADP
s2
9:2
Si7336ADP
Si7852DP
VOUT+
L2 1.2μH
10Ω
0.25W
1nF
100V
10Ω
0.25W
330mF
6.3V
s3
1μF
CMPSH1-4
MURS120
30μΩ
1W
VIN–
365k
1%
BOOST TG TS BG IS
UVLO
100Ω
L1: VISHAY IHLP-2525CZ-01
L2: COILCRAFT SER2010-122
T1: PULSE PA0807
T2: PULSE PA0297
2.2μF
25V
15k
1%
33nF
FS/IN–
470pF
0.1μF
•
5k
1:2
GND PGND VSLMT
162k
33nF
FG SW
SG
VIN
IS–
1μF
NDRV
102k
1%
VCC
FS/SYNC
IS+
PT+
•
2.2μF
16V
100Ω
1nF
T2
100Ω
LTC3705
VCC
SS/FLT
VOUT–
CZT3019
FB/IN+
1nF
10μF
25V
680pF
BAS21 0.22μF
NDRV
2mΩ
2W
100Ω
100k
FQT7N10
2.2nF
250V
FB
LTC3706
ITH
PT–
RUN/SS GND PGND PHASE SLP MODE REGSD
100k
680pF
20k
22.6k
1%
3706 F05
Figure 5. 36V-72V to 3.3V/20A Isolated Forward Converter
(See Typical Performance Characteristics)
3706fb
18
LTC3706
PACKAGE DESCRIPTION
GN Package
24-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.337 – .344*
(8.560 – 8.738)
24 23 22 21 20 19 18 17 16 15 1413
.033
(0.838)
REF
.045 p .005
.229 – .244
(5.817 – 6.198)
.254 MIN
.150 – .157**
(3.810 – 3.988)
.150 – .165
1
.0165 p .0015
2 3
4
5 6
7
8
9 10 11 12
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
.015 p .004
s 45o
(0.38 p 0.10)
.0075 – .0098
(0.19 – 0.25)
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
0o – 8o TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.008 – .012
(0.203 – 0.305)
TYP
.0250
(0.635)
BSC
GN24 (SSOP) 0204
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
3706fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3706
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Operation as Low as 2.5V Input, Boost, Flyback, SEPIC
LT1910
Protected High Side MOSFET Driver
8V to 48V Supply Range, Protected –15V to 60V Supply Transient
LTC3440
Micropower Buck-Boost DC/DC Converter
Synchronous, Single Inductor, No Schottky Diode Required
LTC3704
Positive-to-Negative DC/DC Controller
2.5V ≤ VIN ≤ 36V, No RSENSE Current Mode Operation,
Excellent Transient Response
LTC3705
Two-Switch Forward Converter Gate Driver and Controller
Use with LTC3706, Isolated Power Supplies, High Speed Gate Drivers
LTC3722
Full Bridge Controller
Synchronous; ZVS Operation; 24-Pin SSOP
No RSENSE is a trademark of Linear Technology Corporation.
3706fb
20 Linear Technology Corporation
LT 0808 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
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