4.0 Gbps Dual Driver ADATE209 >4.0 Gbps (2 V swings) 120 ps rise time/fall time (2 V swings) <1.0 W for dual driver (<500 mW/channel) −1 V to +3.5 V range Fast termination mode (VTx) Cable loss compensation FUNCTIONAL BLOCK DIAGRAM VH1 VL1 VT1 DA1 CLC1EN APPLICATIONS Automatic test equipment Semiconductor test systems Board test systems Instrumentation and characterization equipment High speed memory testing (DDR2/DDR3/DDR4) HDMI testing DROUT1 DB1 TERM1 VH2 VL2 VT2 DA2 DROUT2 DB2 TERM2 CLC2EN 07277-001 FEATURES Figure 1. GENERAL DESCRIPTION The ADATE209 is a dual pin driver designed for testing DDR2, DDR3, and DDR4. It can also be used for high speed SoC applications, such as testing PCI Express 1.0 and HDMI™. The device is a three-level driver capable of high fidelity swings from 200 mV to 4 V over a −1 V to +3.5 V range. It has rise/fall times (20% to 80%) under 120 ps for a 2 V programmed swing and 150 ps for a 3 V programmed swing and is capable of supporting data rates of 4.4 Gbps and 3.2 Gbps, respectively. The device is capable of high speed transitions into and out of termination mode. It also contains peaking/pre-emphasis circuitry. The ADATE209 is available in an 8 mm × 8 mm, 49-ball CSP_BGA. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008–2010 Analog Devices, Inc. All rights reserved. ADATE209* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DISCUSSIONS View a parametric search of comparable parts. View all ADATE209 EngineerZone Discussions. EVALUATION KITS SAMPLE AND BUY • ADATE209 Evaluation Board Visit the product page to see pricing options. DOCUMENTATION TECHNICAL SUPPORT Data Sheet • ADATE209: 4.0 Gbps Dual Driver Data Sheet Submit a technical question or find your regional support number. DESIGN RESOURCES DOCUMENT FEEDBACK • ADATE209 Material Declaration Submit feedback for this data sheet. • PCN-PDN Information • Quality And Reliability • Symbols and Footprints This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. 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ADATE209 TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................7 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions..............................8 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ........................................... 10 General Description ......................................................................... 1 Applications Information .............................................................. 15 Revision History ............................................................................... 2 Data Inputs .................................................................................. 15 Specifications..................................................................................... 3 Thermal Diode String ................................................................ 15 Electrical Characteristics ............................................................. 3 Cable Loss Compensation/Peaking Circuitry ........................ 15 Absolute Maximum Ratings............................................................ 7 Default Test Conditions ............................................................. 15 Thermal Resistance ...................................................................... 7 Outline Dimensions ....................................................................... 16 Explanation of Test Levels ........................................................... 7 Ordering Guide .......................................................................... 16 REVISION HISTORY 2/10—Rev. 0 to Rev. A Changes to Table 1 ............................................................................ 5 Added Table 2; Renumbered Sequentially .................................... 6 Removed Endnote 1 in Table 3 ....................................................... 7 Change to Applications Information Section ............................. 15 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 16 5/08—Revision 0: Initial Version Rev. A | Page 2 of 16 ADATE209 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VCC = 7.0 V, VEE = −4.5 V, GND = 0.0 V; all test conditions are as defined in Table 8, unless otherwise specified. All specified values are at TJ = 70°C, where TJ corresponds to the internal temperature sensor, unless otherwise noted. Temperature coefficients are measured at TJ = 70°C ± 20°C, unless otherwise noted. Typical values are based on design, simulation analyses, and/or limited bench evaluations. Typical values are not tested or guaranteed. Table 1. Parameter TOTAL FUNCTION DROUTx Pin Range POWER SUPPLIES Positive Supply, VCC Negative Supply, VEE Data and Termination, VDAx, VDBx, VTERMx Data and Termination, IDAx, IDBx, ITERMx Positive Supply Current, ICC Negative Supply Current, IEE Total Power Dissipation TEMPERATURE MONITORS Temperature Sensor Gain Temperature Sensor Offset DRIVER DC SPECIFICATIONS High Speed Differential Logic Input Characteristics (DAx, DBx, TERMx) Input Termination Resistance Input Voltage Differential Common-Mode Voltage Input Bias Current Pin Output Characteristics Output High Range, VHx Output Low Range, VLx Output Termination Range, VTx Output High Range, VHx Output Low Range, VLx Output Termination Range, VTx Functional Amplitude (VHx − VLx) DC Output Current-Limit Source Min Max Unit Test Level 1 +3.5 V I 7.0 −4.5 +1.3 40 7.35 −4.28 +3.3 V V V mA I I I I 76 80 0.87 100 110 1.3 mA mA W II II II 0.97 W III −4.7 3.1 mV/°C V III III Typ −1.0 6.65 −4.73 −1 50 60 0.5 45 0.25 −1.0 −10 48 55 Ω II +1.2 0.8 +3.3 +10 V V μA IV IV II +3.5 +3.4 +3.5 +4.0 +3.9 +4.0 4.5 V V V V V V V I I I I I I I 70 mA II −0.9 −1.0 −1.0 −0.9 −1.0 −1.0 0.2 50 60 Rev. A | Page 3 of 16 Test Conditions/Comments Defines PSRR conditions Defines PSRR conditions Exceeding 40 mA through any input termination resistor may cause damage to the device or cause long-term reliability concerns Quiescent; excludes current draw through data input termination resistors VLx = 0.0 V, VHx = 2.0 V; driver toggling into open circuit; excludes current draw through data input termination resistors Voltage reading at 30°C 9 mA pushed into DAxB/DBxB/TERMxB signal, 0.6 V forced on DAx/DBx/TERMx signal; DAxT, DBxT, TERMxT open; measure voltage from DAx/DBx/ TERMx signal to DAxB/DBxB/TERMxB signal, calculate resistance (ΔV/ΔI) Each pin tested at −1.0 V and +3.3 V, while other high speed pins (DAxB, DBx, DBxB, TERMx, TERMxB) are left open, termination pins (DAxT, DBxT, TERMxT) open VCC = 7.5 V, this range is not production tested VCC = 7.5 V, this range is not production tested VCC = 7.5 V, this range is not production tested Amplitude can be programmed to VHx = VLx, accuracy specifications apply when VHx − VLx ≥ 200 mV Driver high, VHx = 3.5 V, short DROUTx pin to −1.0 V, then measure current ADATE209 Parameter DC Output Current-Limit Sink Output Resistance, ±30 mA Min −70 Typ −60 Max −50 Unit mA Test Level 1 II 46.5 48.5 50.5 Ω II −150 +20 270 +150 mV μV/°C II III 0.97 −15 1.02 ±2.4 1.03 +15 %FSR mV II II mV III Absolute Accuracy VHx, VLx, VTx Offset VHx, VLx, VTx Offset Temperature Coefficient VHx, VLx, VTx Gain VHx, VLx, VTx Linearity VLx, VHx, VTx Interaction VHx, VLx, VTx DC PSRR VHx, VLx, VTx Input Bias Current DRIVER AC SPECIFICATIONS Rise/Fall Times 0.2 V Programmed Swing 0.5 V Programmed Swing 1.0 V Programmed Swing 2.0 V Programmed Swing 3.0 V Programmed Swing 4.0 V Programmed Swing Rise-to-Fall Matching 0.3 −36 +24 +36 mV/V II −10 +1 +10 μA II 90 115 90 90 110 150 190 10 130 ps ps ps ps ps ps ps V V V II/V V V V Minimum Pulse Width 0.2 V Programmed Swing 200 ps V 0.5 V Programmed Swing 180 ps V 1.0 V Programmed Swing 180 ps V 2.0 V Programmed Swing 200 ps V 3.0 V Programmed Swing 300 ps V Maximum Toggle Rate 2.5 GHz V 2.2 GHz V 1.8 GHz V Rev. A | Page 4 of 16 Test Conditions/Comments Driver high, VHx = −1.0 V, short DROUTx pin to 3.5 V, then measure current Source: driver high, VHx = 3.0 V, IDUT = 1 mA and 9 mA; sink: driver low, VLx = 0.0 V, IDUT = −1 mA and −9 mA; ΔVDROUTx/ΔIDROUTx VHx tests conducted with VLx = −1.0 V and VTx = −1.0 V; VLx tests conducted with VHx = 3.5 V and VTx = 3.5 V; VTx tests conducted with VLx = −1.0 V and VHx = +3.5 V Measured at 0.0 V, target: improve offset Measured at calibration points, 0.0 V and 2.0 V Relative to straight line from 0.0 V to 2.0 V After two-point gain/offset calibration, relative to straight line from 0.0 V to 2.0 V VLx = −1.0 V, VHx swept from −0.9 V to +3.5 V, VTx swept from −1.0 V to +3.5 V, VHx = 3.5 V, VLx swept from −1.0 V to +3.4 V, VTx swept from −0.8 V to +3.5 V, VTx = 1.5 V, VLx swept from −1.0 V to +3.5 V, VHx swept from −1.0 V to +3.5 V Change in output voltage as power supplies are moved by ±5%; measured at calibration points, 0.0 V and 2.0 V Toggle DAx inputs VHx = 0.2 V, VLx = 0.0 V, terminated, 20% to 80% VHx = 0.5 V, VLx = 0.0 V, terminated, 20% to 80% VHx = 1.0 V, VLx = 0.0 V, terminated, 20% to 80% VHx = 2.0 V, VLx = 0.0 V, terminated, 20% to 80% VHx = 3.0 V, VLx = 0.0 V, terminated, 20% to 80% VHx = 3.5 V, VLx = −0.5 V, terminated, 20% to 80% VHx = 1.0 V, VLx = 0.0 V, terminated; rise to fall within one channel Toggle both DAx and DBx inputs VHx = 0.2 V, VLx = 0.0 V, terminated, timing error less than ±25 ps VHx = 0.5 V, VLx = 0.0 V, terminated, timing error less than ±25 ps VHx = 1.0 V, VLx = 0.0 V, terminated, timing error less than ±25 ps VHx = 2.0 V, VLx = 0.0 V, terminated, timing error less than ±25 ps VHx = 3.0 V, VLx = 0.0 V, terminated, timing error less than ±25 ps VHx = 1.0 V, VLx = 0.0 V, terminated, 10% amplitude degradation VHx = 2.0 V, VLx = 0.0 V, terminated, 10% amplitude degradation VHx = 3.0 V, VLx = 0.0 V, terminated, 10% amplitude degradation ADATE209 Parameter Dynamic Performance, Drive (VHx to VLx) Propagation Delay Time Propagation Delay Temperature Coefficient Delay Matching, Edge to Edge Delay Matching Channel to Channel Delay Change vs. Duty Cycle Min Typ Max Unit Test Level1 300 660 0.7 1400 ps ps/ºC II/V III ps ps ps V II/V V 10 mV V 0.4 2 ns ns V V 110 ps V 170 ps V 720 ps V VHx = 3.0 V, VTx = 1.5 V, VLx = 0.0 V, terminated V V V μA I IV IV II VIN = 0.0 V and 3.3 V 275 ps V 18 % V −70 Preshoot and Undershoot Settling Time (VHx to VLx) To Within 3% of Final Value To Within 1% of Final Value Rise/Fall Times (VTx to/from VHx/VLx) 1.0 V Programmed Swing 2.0 V Programmed Swing Dynamic Performance, VTERM (VHx or VLx to/from VTx) Propagation Delay Time Cable Loss Compensation Logic Control Inputs, CLCxEN Logic High Logic Low ICLCxEN Compensation Constants Boost Time Constant Boost Peaking Amplifier 1 0 0.9 0 −10 ±15 ±50 ±10 ±1.2 +70 3.3 3.3 0.7 +10 See the Explanation of Test Levels section. Rev. A | Page 5 of 16 Test Conditions/Comments Toggle DAx inputs VHx = 2.0 V, VLx = 0.0 V, terminated VHx = 2.0 V, VLx = 0.0 V, terminated VHx = 2.0 V, VLx = 0.0 V, terminated, rising vs. falling VHx = 2.0 V, VLx = 0.0 V, terminated VHx = 2.0 V, VLx = 0.0 V, terminated, 5% to 95% duty cycle VHx = 2.0 V, VLx = 0.0 V, terminated Toggle DAx Inputs VHx = 2.0 V, VLx = 0.0 V, terminated VHx = 2.0 V, VLx = 0.0 V, terminated Toggle DAx inputs VHx = 1.0 V, VTx = 0.5V, VLx = 0.0 V, terminated, 20% to 80% VHx = 2.0 V, VTx = 1.0 V, VLx = 0.0 V, terminated, 20% to 80% Toggle TERMx inputs CLCxEN = 3.3 V, VHx = 1.0 V, VLx = 0.0 V, terminated CLCxEN = 3.3 V, VHx = 1.0 V, VLx = 0.0 V, terminated ADATE209 VCC = 7.5 V, VEE = −4.5 V, GND = 0.0 V; all test conditions are as defined in Table 8, unless otherwise specified. All specified values are at TJ = 70°C, where TJ corresponds to the internal temperature sensor, unless otherwise noted. Temperature coefficients are measured at TJ = 70°C ± 20°C, unless otherwise noted. Typical values are based on design, simulation analyses, and/or limited bench evaluations. Typical values are not tested or guaranteed. Table 2. Parameter TOTAL FUNCTION DROUTx Pin Range POWER SUPPLIES Positive Supply, VCC Negative Supply, VEE DRIVER DC SPECIFICATIONS Pin Output Characteristics Output High Range, VHx Output Low Range, VLx Output Termination Range, VTx Functional Amplitude (VHx − VLx) 1 Min Typ −1.0 7.125 −4.73 −0.9 −1.0 −1.0 +0.2 7.5 −4.5 Max Unit Test Level 1 +4 V I 7.875 −4.28 V V +4.0 +3.9 +4.0 +5 V V V V See the Explanation of Test Levels section. Rev. A | Page 6 of 16 I I I I Test Conditions/Comments This range is not production tested This range is not production tested This range is not production tested Amplitude can be programmed to VHx = VLx, accuracy specifications apply when VHx − VLx ≥ 200 mV, this is not production tested ADATE209 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltages Positive Supply Voltage (VCC to GND) Negative Supply Voltage (VEE to GND) Supply Voltage Difference (VCC to VEE) Reference Ground (DUTGND to GND) Input Voltages Input Common-Mode Voltage Short-Circuit Voltage (RL = 0 Ω, VDUT Continuous Short-Circuit Condition) High Speed Input Voltage (Data and Termination Inputs, DAx, DBx, and TERMx) High Speed Differential Input Voltage (DAx, DBx, TERMx to Termination Pin DAxT, DBxT, TERMxT) VHx, VLx, VTx CLCxEN DROUTx I/O Pin Current DCL Maximum Short-Circuit Current (RL = 0 Ω, VDUT = −1.5 V to +4 V; DCL Current Limit) Rating −0.5 V to +8.0 V −5.0 V to +0.5 V −1.0 V to +13 V −0.5 V to +0.5 V VEE to VCC −1.5 V to +4.0 V −1.5 V to +3.9 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for the following conditions: JEDEC 4L PCB, 50°C, and 100 LFM forced convection. θJC is specified for a 50°C cold plate and 50°C ambient temperature. Table 4. Thermal Resistance 2V Package Type 49-Ball CSP_BGA −2 V to +4.5 V −1 V to +3.5 V EXPLANATION OF TEST LEVELS I. Definition. ±100 mA II. 100% Production Tested. III. Characterized on Tester. IV. Functionally Checked During Production Test. V. Characterized on Bench. ESD CAUTION Rev. A | Page 7 of 16 θJA 48.4 θJC 3.9 Unit °C/W ADATE209 1 2 3 4 5 6 7 A GND VEE DROUT2 GND DROUT1 VEE GND B TERM2 VCC VEE GND VEE VCC TERM1 C TERM2B TERM2T VCC GND VCC TERM1T TERM1B D DA2 DA2T GND GND GND DA1T DA1 E DA2B GND VH2 GND VH1 GND DA1B F DB2 DB2T VL2 VCCTHERM VL1 DB1T DB1 G DB2B CLC2EN VT2 THERM VT1 CLC1EN DB1B Figure 2. Pin Configuration Table 5. Pin Function Descriptions Pin No. A1 A2 A3 A4 A5 A6 A7 B1 B2 B3 B4 B5 B6 B7 C1 C2 C3 C4 C5 C6 C7 D1 D2 D3 Mnemonic GND VEE DROUT2 GND DROUT1 VEE GND TERM2 VCC VEE GND VEE VCC TERM1 TERM2B TERM2T VCC GND VCC TERM1T TERM1B DA2 DA2T GND Description Ground. Negative Power Supply, −4.5 V. Driver Output, Channel 2. Ground. Driver Output, Channel 1. Negative Power Supply, −4.5 V. Ground. Termination Mode Data Input. Noninverting input for Channel 2. Positive Power Supply, 7.0 V. Negative Power Supply, −4.5 V. Ground. Negative Power Supply, −4.5 V. Positive Power Supply, 7.0 V. Termination Mode Data Input. Noninverting input for Channel 1. Termination Mode Data Input. Inverting input for Channel 2. Termination Pin for Termination Mode Data Input, Channel 2. Positive Power Supply, 7.0 V. Ground. Positive Power Supply, 7.0 V. Termination Pin for Termination Mode Data Input, Channel 1. Termination Mode Data Input. Inverting input for Channel 1. Data Input A. Noninverting input for Channel 2. Termination for Data Input A, Channel 2. Ground. Rev. A | Page 8 of 16 07277-002 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADATE209 Pin No. D4 D5 D6 D7 E1 E2 E3 E4 E5 E6 E7 F1 F2 F3 F4 F5 F6 F7 G1 G2 G3 G4 G5 G6 G7 Mnemonic GND GND DA1T DA1 DA2B GND VH2 GND VH1 GND DA1B DB2 DB2T VL2 VCCTHERM VL1 DB1T DB1 DB2B CLC2EN VT2 THERM VT1 CLC1EN DB1B Description Ground. Ground. Termination for Data Input A, Channel 1. Data Input A. Noninverting input for Channel 1. Data Input A. Inverting input for Channel 2. Ground. VH Input, Channel 2. Ground. VH Input, Channel 1. Ground. Data Input A. Inverting input for Channel 1. Data Input B. Noninverting input for Channel 2. Termination for Data Input B, Channel 2. VL Input, Channel 2. Positive Power Supply for Thermal Diode String, 7.0 V. VL Input, Channel 1. Termination for Data Input B, Channel 1. Data Input B. Noninverting input for Channel 1. Data Input B. Inverting input for Channel 2. Cable-Loss Compensation Control Pin, Channel 2. VT Input, Channel 2. Thermal Diode Connection. VT Input, Channel 1. Cable-Loss Compensation Control Pin, Channel 1. Data Input B. Inverting input for Channel 1. Rev. A | Page 9 of 16 ADATE209 TYPICAL PERFORMANCE CHARACTERISTICS 0.30 1.2 0.5V 0.25 1.0 0.8 0.4 1.970 07277-009 07277-010 07277-008 1.860 0.986 1.970 1.740 1.620 1.510 1.390 1.280 1.160 1.040 0.928 0.812 0.696 0.580 CLC ENABLED CLC DISABLED 0 4.93 TIME (ns) 07277-015 4.64 4.35 4.06 3.77 3.48 3.19 2.90 2.61 2.32 2.03 1.74 1.45 –0.2 1.16 –0.05 0.87 0 0.58 0 0 0.2 0.29 0.05 0.464 0.10 0.6 0.348 0.2V 0.232 0.15 0.116 VOLTAGE (V) VOLTAGE (V) 0.20 TIME (ns) Figure 3. Small Signal Response, VHx = 500 mV, 200 mV, VLx = 0.0 V Figure 6. VHx = 2.0 V, VLx = 0.0 V, 1.5 GHz Waveform, CLC Disabled and Enabled 1.2 1.8 1.6 CLC ENABLED CLC DISABLED 1.0 1.4 0.8 VOLTAGE (V) VOLTAGE (V) 1.2 1.0 0.8 0.6 0.4 0.6 0.4 0.2 0.2 0 0.928 0.870 0.812 0.754 0.696 0.638 0.580 0.522 0.464 0.406 0.348 0.290 0.232 0.174 0.116 0 TIME (ns) Figure 7. VHx = 2.0 V, VLx = 0.0 V, 2.0 GHz Waveform, CLC Disabled and Enabled Figure 4. Large Signal Response, VHx = 3.0 V, 2.0 V, 1.0 V, VLx = 0.0 V 2.0 0.058 TIME (ns) –0.2 07277-013 4.93 4.64 4.35 4.06 3.77 3.48 3.19 2.90 2.61 2.32 2.03 1.74 1.45 1.16 0.87 0.58 0 –0.2 0.29 0 1.4 CLC ENABLED CLC DISABLED CLC ENABLED CLC DISABLED 1.2 1.5 VOLTAGE (V) VOLTAGE (V) 1.0 1.0 0.5 0.8 0.6 0.4 0.2 0 Figure 5. Large Signal Response, VHx = 3.0 V, 2.0 V, 1.0 V, VLx = 0.0 V, CLC Disabled and Enabled Rev. A | Page 10 of 16 1.860 1.740 1.620 1.510 1.390 1.280 1.160 1.040 0.928 0.812 0.696 0.580 0.464 0.348 0.232 0 –0.2 0.116 4.93 4.64 4.35 4.06 3.77 3.48 07277-014 TIME (ns) 3.19 2.90 2.61 2.32 2.03 1.74 1.45 1.16 0.87 0.58 0 –0.5 0.29 0 TIME (ns) Figure 8. VHx = 2.0 V, VLx = 0.0 V, 1.0 GHz Waveform, CLC Disabled and Enabled ADATE209 1.2 0.7 1.0 0.6 0.5 0.4 0.6 VOLTAGE (V) 0.4 0.2 0.3 0.2 0.1 0 0 0.6 0.6 0.5 0.5 0.4 0.4 0.3 0.3 VOLTAGE (V) 0.2 0.1 1.970 1.860 1.740 1.620 1.510 1.390 1.280 1.160 1.040 0.928 0.812 0.696 0.580 0.2 0.1 0 –0.1 1.970 07277-004 1.970 07277-007 1.860 1.740 1.620 1.510 1.390 1.280 1.160 1.040 0.928 0.812 0.696 0.580 0.464 0 0.348 TIME (ns) CLC ENABLED CLC DISABLED –0.2 07277-006 4.93 4.64 4.35 4.06 3.77 3.48 3.19 2.90 2.61 2.32 2.03 1.74 1.45 1.16 0.87 0.58 0 –0.2 0.29 CLC ENABLED CLC DISABLED 0.232 –0.1 0.116 TIME (ns) Figure 10. VHx = 1.0 V, VLx = 0.0 V, 500 MHz Waveform, CLC Disabled and Enabled Figure 13. VHx = 1.0 V, VLx = 0.0 V, 1.5 GHz Waveform, CLC Disabled and Enabled 0.6 0.5 0.5 0.4 0.4 VOLTAGE (V) 0.6 0.3 0.2 0.1 0.3 0.2 0.1 0 TIME (ns) Figure 14. VHx = 1.0 V, VTx = 0.5 V, VLx = 0.0 V, Transitions Between VHx/VLx and VTx Rev. A | Page 11 of 16 1.860 1.740 1.620 1.510 1.390 1.280 1.160 1.040 0.928 0.812 0.696 0.580 0.464 0 07277-005 0.986 0.928 0.870 0.812 0.754 0.696 0.638 0.580 0.522 0.464 0.406 0.348 0.290 0.232 0.174 0.116 0 0.058 TIME (ns) Figure 11. VHx = 1.0 V, VLx = 0.0 V, 2.0 GHz Waveform, CLC Disabled and Enabled –0.1 0.348 0 CLC ENABLED CLC DISABLED 0.232 VOLTAGE (V) Figure 12. VHx = 1.0 V, VLx = 0.0 V, 1.0 GHz Waveform, CLC Disabled and Enabled 0 VOLTAGE (V) 0.464 0 TIME (ns) Figure 9. VHx = 2.0 V, VLx = 0.0 V, 500 MHz Waveform, CLC Disabled and Enabled 07277-003 TIME (ns) 0.348 –0.2 07277-011 4.620 4.240 3.850 3.470 3.080 2.700 2.310 1.930 1.540 1.160 0.770 0 0.385 –0.4 0.232 –0.1 CLC ENABLED CLC DISABLED 0.116 –0.2 0.116 VOLTAGE (V) 0.8 –0.1 CLC ENABLED CLC DISABLED ADATE209 30 1.2 1.0 TRAILING EDGE ERROR (ps) 20 0.6 0.4 0.2 POSITIVE PULSE –10 20 0 0 POSITIVE PULSE –20 10 50°C –15 70°C –25 07277-016 1 90°C –2 –1 0 1 2 3 4 4 VHx (V) Figure 16. 1 V Minimum Pulse Width (VHx = 1.0 V, VLx = 0.0 V), CLC Disabled Figure 19. Driver Linearity (VHx), VLx = −1.1 V, VTx = 1.0 V 4 30 3 20 LINEARITY ERROR (mV) NEGATIVE PULSE 10 POSITIVE PULSE –10 –20 90°C 70°C 2 50°C 1 0 –1 –2 1 PULSE WIDTH (ns) 10 07277-017 –30 0.1 –10 –20 PULSE WIDTH (ns) 0 –5 07277-019 NEGATIVE PULSE –30 0.1 07277-018 1.970 5 –10 10 Figure 18. 3 V Minimum Pulse Width (VHx = 3.0 V, VLx = 0.0 V), CLC Disabled 30 10 1 PULSE WIDTH (ns) LINEARITY ERROR (mV) TRAILING EDGE ERROR (ps) 0 –30 0.1 07277-012 1.860 1.740 1.620 1.510 1.390 1.280 1.160 1.040 0.928 0.812 0.696 0.580 0.464 0.348 0.232 0 0.116 TIME (ns) Figure 15. VHx = 2.0 V, VTx = 1.0 V, VLx = 0.0 V, Transitions Between VHx/VLx and VTx TRAILING EDGE ERROR (ps) 10 –20 0 –0.2 NEGATIVE PULSE 07277-020 VOLTAGE (V) 0.8 Figure 17. 2 V Minimum Pulse Width (VHx = 2.0 V, VLx = 0.0 V), CLC Disabled Rev. A | Page 12 of 16 –3 –2 –1 0 1 2 3 VLx (V) Figure 20. Driver Linearity (VLx), VHx = 3.6 V, VTx = 1.0 V ADATE209 1.5 3.10 90°C 1.0 3.05 3.00 70°C 0 THERM VOLTAGE (V) LINEARITY ERROR (mV) 0.5 –0.5 –1.0 –1.5 –2.0 50°C 2.95 2.90 2.85 2.80 –2.5 –2 –1 0 1 2 3 4 VTx (V) 07277-021 –3.5 2.70 0 20 40 60 80 100 120 TEMPERATURE (°C) Figure 24. Temperature Sensor Output Voltage vs. Temperature Figure 21. Driver Linearity (VTx), VHx = 2.0 V, VLx = 0.0 V 1.040 GAIN VHx CH1 GAIN VHx CH2 1.035 1.025 61.18mV/DIV GAIN (%FSR) 1.030 1.020 50 60 70 80 90 100 TEMPERATURE (°C) 07277-022 1.010 40 07277-025 1.015 Figure 22. Gain of VHx 200ps/DIV Figure 25. VHx = 1.8 V, VLx = 0.0 V, PRBS31, 1.6 Gbps, CLC Disabled 10 CH2 OFFSET 0 100mV/DIV –5 –10 CH1 OFFSET –15 –25 40 50 60 70 80 TEMPERATURE (°C) 90 100 07277-026 –20 07277-023 DRIVER OFFSET (µV) 5 200ps/DIV Figure 26. VHx = 1.8 V, VLx = 0.0 V, PRBS31, 2.1 Gbps, CLC Disabled Figure 23. Driver Offset vs. Temperature Rev. A | Page 13 of 16 07277-024 2.75 –3.0 07277-029 07277-027 50mV/DIV 100mV/DIV ADATE209 50ps/DIV Figure 29. VHx = 0.5 V, VLx = 0.0 V, PRBS31, 5.0 Gbps, CLC Disabled 07277-028 07277-030 50mV/DIV 100mV/DIV 100ps/DIV Figure 27. VHx = 1.5 V, VLx = 0.0 V, PRBS31, 3.2 Gbps, CLC Disabled 100ps/DIV 50ps/DIV Figure 28. VHx = 1.5 V, VLx = 0.0 V, PRBS31, 4.0 Gbps, CLC Disabled Figure 30. VHx = 0.5 V, VLx = 0.0 V, PRBS31, 5.0 Gbps, CLC Enabled Rev. A | Page 14 of 16 ADATE209 APPLICATIONS INFORMATION VCCTHERM DATA INPUTS 40Ω The ADATE209 contains three high speed differential inputs for each channel. Two of the inputs, combined in an on-chip exclusive-OR gate, control the VHx/VLx transitions. The exclusive-OR gate can be used as a data mux or for data inversion. The third input is used to control the transitions to the VTx level. GND ADATE209 Table 6. Logic Truth Table DAx Low High Low High X1 1 DBx Low Low High High X1 07277-032 THERM Figure 32. Thermal Diode String Schematic TERMx Low Low Low Low High DROUTx VL VH VH VL VT CABLE LOSS COMPENSATION/PEAKING CIRCUITRY X = don’t care. The ADATE209 driver does not have a high impedance mode. The high speed inputs are designed to be compatible with most types of differential inputs. Each side of the differential inputs is terminated through 50 Ω to a common point. For connection to PECL inputs, connect the DAxT/DBxT/TERMxT input termination to VCC − 2.0 V (VCC of the input signal, not of the ADATE209) or to an appropriate resistor to ground. For connection to LVDS, do not connect DAxT/DBxT/TERMxT. For connection to CML signals, either leave DAxT/DBxT/TERMxT open or connect DAxT/DBxT/TERMxT to the appropriate VCC/VDD level. DAxT, DBxT, TERMxT The ADATE209 has two different CLC/peaking modes: nominal and boost. In nominal mode, a small amount of high frequency energy is injected in the driver output signal to compensate for high frequency losses in the test interface. In boost mode, a much larger percentage of high frequency energy is injected in the driver output signal. The two modes are controlled through the CLCxEN signal. Table 7. CLCxEN Logic low Logic high CLC/Peaking Mode Nominal Boost For applications using very short path lengths, very high fidelity cables and connectors, and/or lower data rates, nominal mode should be used. For applications using lower fidelity cables and connectors (and often lower cost) and/or at higher data rates, use boost mode. DEFAULT TEST CONDITIONS Table 8 lists the default test conditions. DAx, DBx, TERMx DAxB, DBxB, TERMxB 50Ω Table 8. 07277-031 50Ω Figure 31. Input Termination Schematic Diagram THERMAL DIODE STRING Figure 32 shows a simplified schematic of the thermal diode string. To use the diode string, connect VCCTHERM to 7.0 V and measure the voltage at THERM. The nominal gain of the thermal diode string is −4.7 mV/°C. Name DB1/DB1B DB2/DB2B DA1T/DA2T/DB1T/DB2T VHx VLx VTx Rev. A | Page 15 of 16 Default Test Condition Logic high Logic high 1.3 V 2.0 V 0.0 V 1.0 V ADATE209 OUTLINE DIMENSIONS 8.10 8.00 SQ 7.90 A1 BALL CORNER A1 BALL CORNER 3.275 REF 7 6 5 4 3 2 1 A B 6.00 BSC SQ 3.225 REF C D 1.00 BSC E F G BOTTOM VIEW TOP VIEW *1.600 MAX 1.465 NOM DETAIL A 0.60 0.56 0.52 DETAIL A 0.305 REF 0.100 REF SEATING PLANE 0.68 0.63 0.58 BALL DIAMETER COPLANARITY 0.10 *COMPLIANT TO JEDEC STANDARDS MO-192-ABB-1 WITH EXCEPTION TO PACKAGE HEIGHT. 120209-B 0.55 0.50 0.45 Figure 33. 49-Ball Chip Scale Package Ball Grid Array [CSP_BGA] (BC-49-4) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADATE209BBCZ EVAL-ADATE209BBCZ 1 Temperature Range −40°C to +85°C Package Description 49-Ball Chip Scale Package Ball Grid Array [CSP_BGA] Evaluation Board Z = RoHS Compliant Part. ©2008–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07277-0-2/10(A) Rev. A | Page 16 of 16 Package Option BC-49-4