DATA SHEET LDMOS FIELD EFFECT TRANSISTOR NE55410GR N-CHANNEL SILICON POWER LDMOS FET FOR 2 W + 10 W VHF to L-BAND SINGLE-END POWER AMPLIFIER DESCRIPTION The NE55410GR is an N-channel enhancement-mode LDMOS FET designed for driver 0.1 to 2.6 GHz PA, such as, cellular base station amplifier, analog/digital TV-transmitters, and the other PA’s. This product has two different FET's on one die manufactured using our NEWMOS technology (our WSi gate lateral MOS FET), and its nitride surface passivation and quadruple layer aluminum silicon metalization offer a high degree of reliability. FEATURES • Two different FET’s (Q1 : Pout = 2 W, Q2 : Pout = 10 W) in one package • Over 25 dB gain available by connecting two FET’s in series : GL (Q1) = 13.5 dB TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz) : GL (Q2) = 11.0 dB TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz) • High 1 dB compression output power : PO (1 dB) (Q1) = 35.4 dBm TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz) : PO (1 dB) (Q2) = 40.4 dBm TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz) : ηd (Q1) = 52% TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz) • High drain efficiency : ηd (Q2) = 46% TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz) : IM3 (Q1) = −40 dBc TYP. (VDS = 28 V, IDset (Q1+Q2) = 120 mA, • Low intermodulation distortion f = 2 132.5/2 147.5 MHz, Pout = 33 dBm (2 tones) ) <R> • Single Supply (VDS : 3 V < VDS ≤ 32 V) • Excellent Thermal Stability • Surface mount type and Super low cost plastic package : 16-pin plastic HTSSOP • Integrated ESD protection • Excellent stability against HCI (Hot Carrier Injection) APPLICATION <R> • Digital cellular base station PA : W-CDMA/GSM/D-AMPS/N-CDMA/PCS etc. • UHF-band TV transmitter PA Caution Observe precautions when handling because these devices are sensitive to electrostatic discharge. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. PU10542EJ03V0DS (3rd edition) Date Published January 2007 NS CP(N) Printed in Japan 2004, 2007 The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. NE55410GR ORDERING INFORMATION Part Number NE55410GR Order Number NE55410GR-T3-AZ Package Marking 16-pin plastic HTSSOP 55410 (Pb-Free) Supplying Form • Embossed tape 12 mm wide • Pin 1 and 8 indicates pull-out direction of tape Note • Qty 1 kpcs/reel Note With regards to terminal solder (the solder contains lead) plated products (conventionally plated), contact your nearby sales office. Remark To order evaluation samples, contact your nearby sales office. Part number for sample order: NE55410GR PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM 9 S (Top View) Pin No. Pin Name Pin No. Pin Name S 1 Source 9 Source 8 2 Drain (Q2) 10 Gate (Q1) 7 3 Drain (Q2) 11 Source 6 4 Drain (Q2) 12 Drain (Q1) 5 Drain (Q2) 13 Source 6 Source 14 Gate (Q2) 2 7 Gate (Q1) 15 Gate (Q2) 1 8 Source 16 Source S Q1 10 11 S S S 12 13 S 5 4 Q2 14 3 15 16 S S S Remark All the terminals of a Q2 connected to a S circuit. Backside : Source (S) ABSOLUTE MAXIMUM RATINGS (TA = +25°C, unless otherwise specified) Parameter Symbol Test Conditions Ratings Unit Drain to Source Voltage VDS 65 V Gate to Source Voltage VGS ±7 V Drain Current (Q1) ID (Q1) 0.25 A Drain Current (Q2) ID (Q2) 1.0 A Ptot 40 W Total Device Dissipation (Tcase = 25°C) Input Power (Q1) Pin (Q1) f = 2.14 GHz, VDS = 28 V 0.3 W Input Power (Q2) Pin (Q2) f = 2.14 GHz, VDS = 28 V 1.5 W Channel Temperature Tch 150 °C Storage Temperature Tstg −65 to +150 °C 2 Data Sheet PU10542EJ03V0DS NE55410GR THERMAL RESISTANCE (TA = +25°C) Parameter Symbol Channel to Case Resistance Test Conditions Rth (ch-c) MIN. TYP. MAX. Unit − 2.5 3.0 °C/W MIN. TYP. MAX. Unit RECOMMENDED OPERATING CONDITIONS (TA = +25°C) Parameter <R> Symbol MIN. TYP. MAX. Unit Drain to Source Voltage VDS − 28 32 V Gate to Source Voltage VGS 2.7 3.3 3.7 V Input Power (Q1), CW Pin (Q1) − 15 23 dBm Input Power (Q2), CW <R> Average Output Power (Q1), CW Note <R> Average Output Power (Q2), CW Note <R> Pin (Q2) − 20 30 dBm PO (ave.) (Q1) − − 24 dBm PO (ave.) (Q2) − − 30 dBm Note When mounting on the PWB that our company recommends. ELECTRICAL CHARACTERISTICS (TA = +25°C) Parameter Symbol Test Conditions Q1 Gate to Source Leak Current IGSS (Q1) VGSS = 5V − − 1 μA Drain to Source Leakage Current IDSS (Q1) VDSS = 65 V − − 1 mA Gate Threshold Voltage Vth (Q1) VDS = 10 V, IDS = 1 mA 2.2 2.8 3.4 V Transconductance gm (Q1) VDS = 28 V, IDS = 20 mA − 0.09 − S 65 75 − V Drain to Source Breakdown Voltage BVDSS (Q1) IDSS = 10 μA Q2 Gate to Source Leak Current IGSS (Q2) VGSS = 5V − − 1 μA Drain to Source Leakage Current IDSS (Q2) VDSS = 65 V − − 1 mA Gate Threshold Voltage Vth (Q2) VDS = 10 V, IDS = 1 mA 2.0 2.6 3.2 V Transconductance gm (Q2) VDS = 28 V, IDS = 100 mA − 0.45 − S 65 75 − V Drain to Source Breakdown Voltage BVDSS (Q2) IDSS = 10 μA Data Sheet PU10542EJ03V0DS 3 NE55410GR <R> RF CHARACTERISTICS (TA = +25°C) Parameter Symbol Test Conditions MIN. TYP. MAX. Unit Gain 1 dB Compression Output Power PO (1 dB) f = 2 140 MHz, VDS = 28 V, − 35.4 − dBm IDset = 20 mA − 52 − % 12 13.5 − dB f = 2 140 MHz, VDS = 28 V, − 40.4 − dBm IDset = 100 mA − 46 − % 9.5 11 − dB f = 1 840 MHz, VDS = 28 V, − 40.5 − dBm IDset = 100 mA − 49 − % − 14 − dB Q1 Drain Efficiency Linear Gain ηd GL Note1 Q2 Gain 1 dB Compression Output Power Drain Efficiency PO (1 dB) ηd Note2 Linear Gain GL Gain 1 dB Compression Output Power PO (1 dB) Drain Efficiency Linear Gain ηd GL Note2 Q1 + Q2 Gain 1 dB Compression Output Power Drain Efficiency PO (1 dB) f = 880 MHz, VDS = 28 V, − 41.5 − dBm ηd IDset = 120 mA (Q1 + Q2) − 55 − % − 30 − dB f = 2 140 MHz, VDS = 28 V, − 40.0 − dBm IDset = 120 mA (Q1 + Q2) 34 42 − % 39 40 − dB 24 25 − dB Note3 Linear Gain GL Gain 1 dB Compression Output Power PO (1 dB) Drain Efficiency ηd Output Power Pout Linear Gain 3rd Order Intermodulation Distortion Drain Efficiency GL Note4 IM3 f = 2 132.5/2 147.5 MHz, VDS = 28 V, − −40 − dBc ηd 2 carrier W-CDMA 3GPP, Test Model1, − 21 − % 64DPCH, 67% Clipping, IDset = 120 mA (Q1 + Q2), Ave Pout = 33 dBm Notes 1. Pin = 15 dBm 2. Pin = 20 dBm 3. Pin = 5 dBm 4. Pin = 10 dBm 4 Data Sheet PU10542EJ03V0DS NE55410GR GAIN, DRAIN EFFICIENCY, vs. OUTPUT POWER 34 Gain G (dB) 32 80 f = 840 MHz 860 MHz 880 MHz 900 MHz 920 MHz 70 60 G 50 30 40 28 ηd 26 30 24 20 22 10 20 20 25 30 35 Drain Efficiency ηd (%) 36 0 45 40 Output Power Pout (dBm) 3rd/5th Order Intermodulation Distortion IM3/IM5 (dBc) TYPICAL CHARACTERISTICS (TA = +25°C, VDS = 28 V, IDset = 120 mA, unless otherwise specified) IM3/IM5 vs. 2 TONES OUTPUT POWER –10 Lower Upper –20 IM3 –30 –40 –50 IM5 –60 –70 15 CW, f = 960 MHz, 1 MHz Spacing 20 25 30 35 40 45 2 tones Output Power Pout (dBm) 30 80 28 70 60 Gain G (dB) 26 G 24 50 22 40 20 30 ηd 18 f = 2.09 GHz 2.11 GHz 2.14 GHz 2.17 GHz 2.19 GHz 35 40 16 14 20 25 30 20 Drain Efficiency ηd (%) GAIN, DRAIN EFFICIENCY, vs. OUTPUT POWER 10 0 45 IM3/IM5, DRAIN EFFICIENCY, vs. 2 TONES OUTPUT POWER –20 –25 100 Lower Upper 90 –30 80 IM3 –35 70 IM5 –40 60 –45 50 –50 40 –55 30 ηd –60 20 –65 –70 15 Drain Efficiency ηd (%) 3rd/5th Order Intermodulation Distortion IM3/IM5 (dBc) Output Power Pout (dBm) W-CDMA 3GPP, Test Model 1, 64 DPCH, 67% Clipping, Center Frequency 2.14GHz, 15 MHz spacing 10 20 25 30 35 40 0 45 2 tones Output Power Pout (dBm) Remark The graphs indicate nominal characteristics. Data Sheet PU10542EJ03V0DS 5 NE55410GR <R> S-PARAMETERS S-parameters/Noise parameters are provided on our web site in a form (S2P) that enables direct import to a microwave circuit simulator without keyboard input. Click here to download S-parameters. [RF and Microwave] → [Device Parameters] URL http://www.ncsd.necel.com/microwave/index.html 6 Data Sheet PU10542EJ03V0DS NE55410GR EVALUATION CIRCUIT (f = 840 to 960 MHz, VDS = 28 V, IDset = 120 mA) VDS (+28 V) + B 47μF 6.8 kΩ 0.22 μF 2.2 kΩ 0.001 μF NE55410GR 1 kΩ TL5 (open)7 Q1 TL4 12 RFin TL1 TL2 TL3 10 TL7 A 47 pF 15 Ω 47 pF TL6 S 3 pF 14 TL8 A TL9 TL10 TL11 TL19 2 3 4 5 Q2 15 15 pF TL12 TL14 TL15 2.2 nH 12 pF 4 pF TL18 RFout 47 pF 6 pF 9 pF TL17 TL13 S 10 Ω TL16 2 pF 2 pF S S S S S S S S 1 6 8 9 11 13 16 56 nH (Back side) 0.22 μF 18 Ω 0.047 μF Symbol 6.8 kΩ B 1 kΩ Width (mm) Length (mm) Symbol Width (mm) Length (mm) TL1 1.0 3.0 TL11 1.0 3.0 TL2 4.5 10.0 TL12 1.0 5.0 TL3 0.5 16.0 TL13 0.8 48.0 TL4 0.5 5.0 TL14 1.0 6.5 TL5 1.0 48.0 TL15 1.0 10.5 TL6 1.0 4.0 TL16 1.0 9.5 TL7 1.0 3.0 TL17 1.0 10.0 TL8 1.0 6.0 TL18 1.0 6.0 TL9 1.0 3.0 TL19 1.0 3.0 TL10 1.0 4.0 The application circuits and their parameters are for reference only and are not intended for use in actual design-ins. Data Sheet PU10542EJ03V0DS 7 NE55410GR EVALUATION CIRCUIT (f = 840 to 960 MHz, VDS = 28 V, IDset = 120 mA) VDS (Q2), +28 V VGS (Q1), +28 V 6.8 kΩ 0.22 μF 2.2 kΩ 15 Ω 47 μF 1 kΩ (Valiable) 0.22 μF RF in 47 pF 6 pF 47 pF 2 pF 55410 4 pF 12 pF 3 pF 2 pF 2.2 nH 15 pF 1.5 pF 47 pF RF out 0.001 μF 18 Ω VDS (Q1), +28 V 8 10 Ω 56 nH 1 kΩ (Valiable) 6.8 kΩ 0.047 μ F VGS (Q2), +28 V Data Sheet PU10542EJ03V0DS 9 pF NE55410GR EVALUATION CIRCUIT (f = 2 090 to 2 190 MHz, VDS = 28 V, IDset = 120 mA) VDS (+28 V) + B 22 μF 6.8 kΩ 0.22 μF TL3 0.22 μF NE55410GR 1 kΩ TL8 10 Ω RFin TL1 TL2 7 (open) TL4 TL5 TL6 Q1 12 TL7 10 TL10 TL9 TL11 A 33 pF 47 pF S 1 pF 2 pF 8.5 pF TL13 TL12 A 14 2 3 4 5 Q2 15 0.75 pF S TL15 TL17 TL18 15 pF 3 pF 1 pF TL21 RFout TL16 10 Ω 12 nH TL19 TL20 1 pF S S S S S S S S 1 6 8 9 11 13 16 TL14 (Back side) 0.22 μF 10 Ω 0.22 μF 6.8 kΩ B 1 kΩ Symbol Width (mm) Length (mm) Symbol Width (mm) Length (mm) TL1 1.0 17.0 TL12 1.0 4.0 TL2 1.0 4.0 TL13 1.0 4.5 TL3 1.0 24.5 TL14 1.0 25.0 TL4 1.0 2.5 TL15 2.5 2.5 TL5 1.0 3.0 TL16 1.0 27.0 TL6 0.5 2.5 TL17 1.0 2.0 TL7 0.5 4.5 TL18 5.0 4.0 TL8 1.0 25.5 TL19 5.0 2.0 TL9 1.0 2.5 TL20 1.0 12.5 TL10 4.5 4.5 TL21 1.0 5.5 TL11 1.0 3.5 The application circuits and their parameters are for reference only and are not intended for use in actual design-ins. Data Sheet PU10542EJ03V0DS 9 NE55410GR EVALUATION CIRCUIT (f = 2 090 to 2 190 MHz, VDS = 28 V, IDset = 120 mA) VGS (Q1), +28 V VDS (Q2), +28 V 1 kΩ (Potentiometer) 6.8 kΩ 10 Ω 0.22 μF 22 μF 0.22 μF RF in 15 pF 0.5 pF 2 pF 33 pF 3 pF 55410 <R> 1 pF 1.0 pF 0.22 μF RF out 12 nH 10 Ω 15 pF 0.75 pF 10 Ω 1 pF 0.22 μF 6.8 kΩ 1 kΩ (Potentiometer) VGS (Q2), +28 V VDS (Q1), +28 V 10 Data Sheet PU10542EJ03V0DS NE55410GR PACKAGE DIMENSIONS 16-PIN PLASTIC HTSSOP (UNIT: mm) (0.5) (0.4) 9 16 (2.7) 5.5±0.3 55410 8 NEC 0.20±0.10 0.65±0.1 (1.8) 0.20±0.10 6.4±0.3 1 (0.1) 5.2±0.2 (2.5) 0.9±0.2 (1.5) Remark ( ): Reference value LAND PATTERN (UNIT: mm) 6.40 5.20 0.20 0.28 5.50 0.65 1.50 0.20 0.50 0.24 0.50 1.00 0.28 1.15 0.28 0.24 0.50 0.40 0.10 1.50 4.00 0.48 Remarks1. Via holes : 158 holes <R> 2. Hole size : φ 0.15 mm 3. Min. spacing : 0.354 mm 4. : Solder resist or etching Data Sheet PU10542EJ03V0DS 11 NE55410GR RECOMMENDED SOLDERING CONDITIONS This product should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your nearby sales office. Soldering Method Infrared Reflow Wave Soldering Soldering Conditions Condition Symbol Peak temperature (package surface temperature) : 260°C or below Time at peak temperature : 10 seconds or less Time at temperature of 220°C or higher : 60 seconds or less Preheating time at 120 to 180°C : 120±30 seconds Maximum number of reflow processes : 3 times Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or below Peak temperature (molten solder temperature) : 260°C or below Time at peak temperature : 10 seconds or less IR260 WS260 Preheating temperature (package surface temperature) : 120°C or below Partial Heating Maximum number of flow processes : 1 time Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or below Peak temperature (terminal temperature) : 350°C or below Soldering time (per side of device) : 3 seconds or less Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or below Caution Do not use different soldering methods together (except for partial heating). 12 Data Sheet PU10542EJ03V0DS HS350 NE55410GR • The information in this document is current as of January, 2007. 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