IDT74FCT3807/A 3.3V CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES 3.3V CMOS 1-TO-10 CLOCK DRIVER IDT74FCT3807/A FEATURES: DESCRIPTION: FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION • • • • • • • • • • • • The FCT3807/A 3.3V clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. The FCT3807/A offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. 0.5 MICRON CMOS Technology Guaranteed low skew < 350ps (max.) Very low duty cycle distortion < 350ps (max.) High speed: propagation delay < 3ns (max.) Very low CMOS power levels TTL compatible inputs and outputs 1:10 fanout Maximum output rise and fall time < 1.5ns (max.) Low input capacitance: 4.5pF typical VCC = 3.3V ± 0.3V Inputs can be driven from 3.3V or 5V components Available in SSOP, SOIC, and QSOP packages O1 O2 O3 O4 O5 IN 1 20 VCC GND 2 19 O10 O1 3 18 O9 VCC 4 17 GND O2 5 16 O8 GND 6 15 VCC O3 7 14 O7 VCC 8 13 GND O4 9 12 O6 10 11 O5 IN O6 GND O7 SOIC/ SSOP/ QSOP TOP VIEW O8 O9 O 10 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES SEPTEMBER 2001 1 c 2001 Integrated Device Technology, Inc. DSC-4647/2 IDT74FCT3807/A 3.3V CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) Symbol Description VTERM(2) VTERM(3) VTERM(4) CAPACITANCE (TA = +25OC, f = 1.0MHz) Parameter(1) Max Unit Terminal Voltage with Respect to GND –0.5 to +4.6 V CIN Input Capacitance VIN = 0V 4.5 6 pF Terminal Voltage with Respect to GND –0.5 to +7 V COUT Output Capacitance VOUT = 0V 5.5 8 pF Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +60 mA Symbol Conditions Typ. Max. Unit NOTE: 1. This parameter is measured at characterization but not tested. NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. Input terminals. 4. Outputs and I/O terminals. PIN DESCRIPTION Pin Names Description IN Clock Inputs Ox Clock Outputs POWER SUPPLY CHARACTERISTICS Parameter Test Conditions(1) Min. Typ.(2) Max. Unit ∆ICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = VCC –0.6V(3) — 10 30 µA ICCD Dynamic Power Supply Current(4) VCC = Max. Input toggling VIN = VCC VIN = GND — 0.31 0.45 mA/ MHz VCC = Max. Input toggling VIN = VCC VIN = GND — 15.5 22.8 mA 50% Duty Cycle Outputs Open VIN = VCC –0.6V — 15.5 22.8 fi = 50MHz VIN = GND Symbol 50% Duty Cycle Outputs Open IC Total Power Supply Current(6) NOTES: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 3.3V, +25°C ambient. Per TTL driven input (VIN = VCC -0.6V); all other inputs at VCC or GND. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input (VIN = VCC -0.6V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fi = Input Frequency All currents are in milliamps and all frequencies are in megahertz. 2 IDT74FCT3807/A 3.3V CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified Commercial: TA = 0°C to +75°C, Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V Symbol VIH Parameter Test Conditions(1) Input HIGH Level (Input pins) Guaranteed Logic HIGH Level Max. Unit — 5.5 V — VCC + 0.5 –0.5 — 0.8 VI = 5.5V — — ±1 VI = VCC — — ±1 VI = GND — — ±1 VI = GND — — ±1 VO = VCC — — ±1 Input HIGH Level (I/O pins) VIL Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level IIH Input HIGH Current (Input pins) VCC = Max. Input HIGH Current (I/O pins) IIL Input LOW Current (Input pins) VCC = Max. Input LOW Current (I/O pins) IOZH High Impedence Output Current IOZL (3-State Output Pins) VIK Clamp Diode Voltage VCC = Max. 2 2 V µA µA — — ±1 –0.7 –1.2 V 1.5V(3) –36 –60 –110 mA 50 90 200 mA VCC–0.2 — — V Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VOH Output HIGH Voltage VCC = Min. Output LOW Voltage Typ. — VO = GND VCC = Min., IIN = –18mA IODH VOL Min. IOH = –0.1mA VIN = VIH or VIL IOH = –8mA 2.4(5) 3 — VCC = Min. IOL = 0.1mA — — 0.2 VIN = VIH or VIL IOL = 16mA — 0.2 0.4 IOL = 24mA — 0.3 0.5 — — ±1 µA IOFF Input Power Off Leakage IOS Short Circuit Current(4) VCC = Max., VO = –60 –135 –240 mA VH Input Hysteresis — — 150 — mV ICCL Quiescent Power Supply Current VCC = Max. — 0.1 10 µA ICCH VCC = 0V, VIN = 4.5V V GND(3) VIN = GND or VCC ICCZ NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = Vcc - 0.6V at rated current. 3 IDT74FCT3807/A 3.3V CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL(3,4) FCT3807 FCT3807A Symbol tPLH Parameter Propagation Delay Conditions(1) 50Ω to VCC/2 Min.(2) 1.5 Max. 3.5 Min.(2) 1.5 Max. 3 Unit ns tPHL tR Output Rise Time CL = 10pF (See figure 1) — 1.5 — 1.5 ns tF tSK(O) Output Fall Time Output skew: skew between outputs of or 10Ω AC termination, — — 1.5 0.5 — — 1.5 0.35 ns ns tSK(P) same package (same transition) Pulse skew: skew between opposite transitions CL = 50pF (See figure 2) — 0.5 — 0.35 ns of same output (|tPHL -– tPLH|) f ≤ 100MHz — 0.9 — 0.65 ns Max. 4.5 Min.(2) 1.5 Max. 4 Unit ns tSK(T) Package skew: skew between outputs of different Outputs packages at same power supply voltage, connected in temperature, package type and speed grade groups of two Symbol tPLH Parameter Propagation Delay Conditions(1) CL = 30pF tPHL tR Output Rise Time f ≤ 67MHz (See figure 3) FCT3807 Min.(2) 1.5 FCT3807A — 1.5 — 1.5 ns tSK(O) Output Fall Time Output skew: skew between outputs of — — 1.5 0.5 — — 1.5 0.35 ns ns tSK(P) same package (same transition) Pulse skew: skew between opposite transitions — 0.5 — 0.35 ns — 1 — 0.75 ns tF of same output (|tPHL -– tPLH|) tSK(T) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade FCT3807 Max. Max. Unit tPLH tPHL Propagation Delay CL = 50pF f ≤ 40MHz 1.5 4.8 1.5 4.3 ns tR tF Output Rise Time Output Fall Time (See figure 4) — — 1.5 1.5 — — 1.5 1.5 ns ns Parameter Min.(2) FCT3807A Min.(2) Symbol Conditions(1) tSK(O) Output skew: skew between outputs of same package (same transition) — 0.5 — 0.35 ns tSK(P) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) — 0.5 — 0.35 ns tSK(T) Package skew: skew between outputs of different — 1 — 0.75 ns packages at same power supply voltage, temperature, package type and speed grade NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 4 IDT74FCT3807/A 3.3V CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL(3,4) FCT3807 FCT3807A Symbol tPLH Parameter Propagation Delay Conditions(1) 50Ω to VCC/2 Min.(2) 1.5 Max. 3.5 Min.(2) 1.5 Max. 3 Unit ns tPHL tR Output Rise Time CL = 10pF (See figure 1) — 1.5 — 1.5 ns tF tSK(O) Output Fall Time Output skew: skew between outputs of or 50Ω AC termination, — — 1.5 0.6 — — 1.5 0.45 ns ns tSK(P) same package (same transition) Pulse skew: skew between opposite transitions CL = 10pF (See figure 2) — 0.6 — 0.45 ns of same output (|tPHL -– tPLH|) f ≤ 100MHz — 0.9 — 0.65 ns Max. 4.5 Min.(2) 1.5 Max. 4 Unit ns tSK(T) Package skew: skew between outputs of different Outputs packages at same power supply voltage, connected in temperature, package type and speed grade groups of two Symbol tPLH Parameter Propagation Delay Conditions(1) CL = 30pF tPHL tR Output Rise Time f ≤ 67MHz (See figure 3) FCT3807 Min.(2) 1.5 FCT3807A — 1.5 — 1.5 ns tSK(O) Output Fall Time Output skew: skew between outputs of — — 1.5 0.6 — — 1.5 0.45 ns ns tSK(P) same package (same transition) Pulse skew: skew between opposite transitions — 0.6 — 0.45 ns — 1 — 0.75 ns tF of same output (|tPHL -– tPLH|) tSK(T) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade FCT3807 Max. Max. Unit tPLH tPHL Propagation Delay CL = 50pF f ≤ 40MHz 1.5 4.8 1.5 4.3 ns tR tF Output Rise Time Output Fall Time (See figure 4) — — 1.5 1.5 — — 1.5 1.5 ns ns Parameter Min.(2) FCT3807A Min.(2) Symbol Conditions(1) tSK(O) Output skew: skew between outputs of same package (same transition) — 0.6 — 0.45 ns tSK(P) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) — 0.6 — 0.45 ns tSK(T) Package skew: skew between outputs of different — 1 — 0.75 ns packages at same power supply voltage, temperature, package type and speed grade NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 5 IDT74FCT3807/A 3.3V CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES TEST CIRCUITS VCC V CC V CC 100 Ω V IN V IN V OUT Pulse Generator V OUT Pulse Generator D.U.T. D.U.T. 50 Ω 10pF 100 Ω RT 10pF RT 220pF Figure 1. ZO = 50Ω to VCC/2, CL = 10pF Figure 2. ZO = 50Ω AC Termination, CL = 10pF The capacitor value for ac termination is determined by the operating frequency. For very low frequencies a higher capacitor value should be selected. V CC V CC V IN V IN V OUT Pulse Generator V OUT Pulse Generator D.U.T. D.U.T. 30pF RT 50pF RT CL CL Figure 3. CL = 50pF Circuit Figure 3. CL = 30pF Circuit 6V V CC GND ENABLE AND DISABLE TIME SWITCH POSITION 500 Ω V IN V OUT Pulse Generator D.U.T. 50pF RT CL 500 Ω Figure 5. Enable and Disable Time Circuit Test Switch Disable LOW Enable LOW 6V Disable HIGH Enable HIGH GND DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 6 IDT74FCT3807/A 3.3V CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES TEST WAVEFORMS 3V 1.5V INPUT INPUT 0V t PLH t PLH1 3V 1.5V 0V t PH L1 V OH t PHL V OH 2.0V 0.8V OUTPUT 1.5V V OL OUTPUT 1 t SK(o) 1.5V t SK(o) V OH V OL 1.5V VOL OUTPUT 2 tF tR t PLH2 t PHL2 t SK(o) = |t PLH2 - t PLH1 | or |t PHL2 - t PHL1 | Output Skew - tSK(O) Package Delay 3V 1.5V 0V 3V INPUT 1.5V INPUT t PH L1 t PLH1 0V V OH 1.5V V OL t PH L t PLH V OH PACKAGE 1 OUTPUT 1.5V t SK(t) t SK(t) V OL OUTPUT PACKAGE 2 OUTPUT t SK(p) = |t PHL - t PLH | t PLH2 t PH L2 t SK(t) = |t PLH2 - t PLH1 | Pulse Skew - tSK(P) or Package Skew - tSK(T) Package 1 and Package 2 are same device type and speed grade ENABLE DISA BLE 3V CONTROL INPUT 1.5V 0V t OUTPUT NORM ALLY LOW SW ITCH CLOSE D t OUTPUT NORM ALLY HIGH t PZL 3.5V 3.5V 1.5V t PZH SW ITCH OPEN PLZ 0.3V V OL 0.3V V OH PHZ 1.5V 0V 0V Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH 2. Pulse Generator for All Pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns 7 V OH 1.5V V OL |t PHL2 - t PHL1 | IDT74FCT3807/A 3.3V CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES ORDERING INFORMATION IDT74FCT XXXX Device Type X Package X Temp. Range CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 Blank I Commercial (0°C to +70°C) Industrial (-40°C to +85°C) SO PY Q Small Outline IC Shrink Small Outline IC Quarter-size Small Outline IC 3807 3807A 1-to-10 3.3V Clock Driver for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 8 for Tech Support: [email protected] (408) 654-6459