Quad, 235 MHz, DC-Coupled VGA and Differential Output Amplifier AD8264 FEATURES FUNCTIONAL BLOCK DIAGRAM COMM Multichannel data acquisition Positron emission tomography Gain trim Industrial and medical ultrasound Radar receivers VNEG OPP1 IPP1 IPN1 VGA1 + PrA 6dB – ATTENUATOR –24dB TO 0dB GNH1 OPP2 IPP2 IPN2 + 6dB – 18dB + PrA 6dB – ATTENUATOR –24dB TO 0dB GNH2 IPN3 + 6dB – 18dB + CH2 GAIN – CONTROL IPN4 VOL2 VOH2 OFS2 VGA3 + PrA 6dB – ATTENUATOR –24dB TO 0dB + 6dB – 18dB + CH3 GAIN – CONTROL VOL3 VOH3 OFS3 OPP4 IPP4 VOH1 VGA2 OPP3 IPP3 VOL1 OFS1 + CH1 GAIN CONTROL – GNH3 APPLICATIONS VPOS VGA4 + PrA 6dB – ATTENUATOR –24dB TO 0dB GNH4 + – + 6dB – 18dB CH4 GAIN CONTROL VOL4 VOH4 OFS4 VOCM GNLO 07736-001 Low noise Voltage noise: 2.3 nV/√Hz Current noise: 2 pA/√Hz Wide bandwidth Small signal: 235 MHz (VGAx); 80 MHz (differential output amplifier) Large signal: 80 MHz (1 V p-p) Gain range 0 to 24 dB (input to VGA output) 6 to 30 dB (input to differential output) Gain scaling: 20 dB/V DC-coupled Single-ended input and differential output Supplies: ±2.5 V to ±5 V Low power: 140 mW per channel @ ±3.3 V Figure 1. GENERAL DESCRIPTION The AD8264 is a 4-channel, linear-in-dB, general-purpose variable gain amplifier (VGA) with a preamplifier (preamp), and a flexible differential output buffer. Intended for a broad range of applications, dc coupling combined with wide bandwidth makes this amplifier a very good pulse processor. The gain of each channel is adjusted independently, and all channels are referenced to a single pin, GNLO. Combined with a multi-output, digital-to-analog converter (DAC), each section of the AD8264 can be used for active calibration or as a trim amplifier. Each channel includes a single-ended input preamp/VGA section to preserve the wide bandwidth and fast slew rate for lowdistortion pulse applications. A 6 dB differential output buffer with common-mode and offset adjustments enable direct coupling to most modern high speed analog-to-digital converters (ADCs), using the converter reference output for perfect dc matching levels. The gain range of the VGA section is 24 dB. Operation from a dual polarity power supply enables amplification of negative voltage pulses that are generated by current-sinking pulses into a grounded load, such as is typical of photodiodes or photomultiplier tubes (PMT). Delay-free processing of wide-band video signals is also possible. The differential output amplifier permits convenient level shifting and interfacing to singlesupply ADCs using the VOCM and OFSx pins. The −3 dB bandwidth of the preamp/VGA is dc to 235 MHz, and the bandwidth of the differential driver is 80 MHz. The floating gain control interface provides a precise linear-in-dB scale of 20 dB/V and is easy to interface to a variety of external circuits. The AD8264 is available in a 40-lead, 6 mm × 6 mm LFCSP with an operating temperature range of −40°C to +105°C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. AD8264 TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 28 Applications ....................................................................................... 1 Overview ..................................................................................... 28 Functional Block Diagram .............................................................. 1 Preamp ......................................................................................... 28 General Description ......................................................................... 1 VGA ............................................................................................. 28 Revision History ............................................................................... 2 Post Amplifier ............................................................................. 29 Specifications..................................................................................... 3 Noise ............................................................................................ 29 Absolute Maximum Ratings............................................................ 6 Applications Information .............................................................. 30 Thermal Resistance ...................................................................... 6 Maximum Power Dissipation ..................................................... 6 A Low Channel Count Application Concept Using a Discrete Reference ..................................................................................... 30 ESD Caution .................................................................................. 6 A DC Connected Concept Example ........................................ 31 Pin Configuration and Function Descriptions ............................. 7 Evaluation Board ............................................................................ 34 Typical Performance Characteristics ............................................. 8 Connecting and Using the AD8264-EVALZ .......................... 34 Test Circuits ..................................................................................... 20 Outline Dimensions ....................................................................... 38 Ordering Guide .......................................................................... 38 REVISION HISTORY 5/09—Revision 0: Initial Version Rev. 0 | Page 2 of 40 AD8264 SPECIFICATIONS VS = ±2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V, VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified. Table 1. Parameter GENERAL PERFORMANCE –3 dB Small Signal Bandwidth (VGAx) –3 dB Large Signal Bandwidth (VGAx) –3 dB Small Signal Bandwidth (Differential Output)1 –3 dB Large Signal Bandwidth (Differential Output)1 Slew Rate Input Bias Current Input Resistance Input Capacitance Input Impedance Input Voltage Noise Input Current Noise Noise Figure (Differential Output) Output-Referred Noise (Differential Output) Output Impedance Output Signal Range Output Offset Voltage DYNAMIC PERFORMANCE Harmonic Distortion HD2 HD3 HD2 HD3 HD2 HD3 HD2 HD3 HD2 HD3 HD2 HD3 Input 1 dB Compression Point Conditions VOUT = 10 mV p-p VOUT = 1 V p-p VOUT = 100 mV p-p VOUT = 2 V p-p VGAx, VOUT = 2 V p-p VGAx, VOUT = 1 V p-p Differential output, VOUT = 2 V p-p Differential output, VOUT = 1 V p-p Pins IPPx Pins IPPx at dc; ΔVIN/ΔIBIAS Pins IPPx Pins IPPx at 10 MHz VGAIN = 0.7 V, RS = 50 Ω, unterminated VGAIN = 0.7 V (Gain = 30 dB) VGAIN = −0.7 V (Gain = 6 dB) VGAx, dc to 10 MHz Differential output, dc to 10 MHz Preamp VGAx, RL ≥ 500 Ω Differential amplifier, RL ≥ 500 Ω per side Preamp offset VGAx offset, VGAIN = 0.7 V Differential output offset, VGAIN = 0.7 V VGAx = 1 V p-p, differential output = 2 V p-p (measured at VGAx) f = 1 MHz f = 10 MHz f = 35 MHz VGAx = 1 V p-p, differential output = 2 V p-p (measured at differential output) f = 1 MHz f = 10 MHz f = 35 MHz VGAIN = −0.7 V, f = 10 MHz VGAIN = +0.7 V, f = 10 MHz Rev. 0 | Page 3 of 40 Min −8 −6 −18 −38 Typ 235 150 80 80 380 290 470 220 −5 4.2 2 7.9 2.3 2 9 72 45 3.5 <1 |VS| − 1.3 |VS| − 1.3 |VS| − 0.5 |<1| |<5| |<10| Max −3 +6 +18 +38 Unit MHz MHz MHz MHz V/μs V/μs V/μs V/μs μA MΩ pF kΩ nV/√Hz pA/√Hz dB nV/√Hz nV/√Hz Ω Ω V V V mV mV mV −73 −68 −71 −61 −60 −53 dBc dBc dBc dBc dBc dBc −78 −66 −71 −43 −56 −20 7 −9.6 dBc dBc dBc dBc dBc dBc dBm 2 dBm AD8264 Parameter Two-Tone Intermodulation Distortion (IMD3) Output Third-Order Intercept Conditions VGAx = 1 V p-p, f1 = 10 MHz, f2 = 11 MHz VGAx = 1 V p-p, f1 = 35 MHz, f2 = 36 MHz VOUT = 2 V p-p, f1 = 10 MHz, f2 = 11 MHz VOUT = 2 V p-p, f1 = 35 MHz, f2 = 36 MHz VGAx = 1 V p-p, f = 10 MHz Min VGAx = 1 V p-p, f = 35 MHz VOUT = 2 V p-p, f = 10 MHz VOUT = 2 V p-p, f = 35 MHz Overload Recovery Group Delay Variation ACCURACY Absolute Gain Error 3 Gain Law Conformance 4 Channel-to-Channel Matching GAIN CONTROL INTERFACE Gain Scaling Factor Over Temperature Gain Range Gain Intercept to VGAx Over Temperature Gain Intercept to Differential Output Over Temperature GNHx Input Voltage Range Input Resistance GNHx Input Bias Current Over Temperature GNLO Input Bias Current Over Temperature Response Time OUTPUT BUFFER VOCM Input Bias Current Over Temperature VOCM Input Voltage Range Gain (VGAx to Differential Output) Over Temperature VGAIN = 0.7 V, VIN stepped from 0.1 V p-p to 1 V p-p 1 MHz < f < 100 MHz, full gain range −0.7 V < VGAIN < −0.6 V −0.6 V < VGAIN < −0.5 V −0.5 V < VGAIN < +0.5 V 0.5 V < VGAIN < 0.6 V 0.6 V < VGAIN < 0.7 V −0.5 V < VGAIN < +0.5 V, ±2.5 V ≤ VS ≤ ±5 V −0.5 V < VGAIN < +0.5 V, −40°C ≤ TA ≤ +105°C Single IC, −0.5 V < VGAIN < +0.5 V, −40°C ≤ TA ≤ +105°C Multiple ICs, −0.5 V < VGAIN < +0.5 V, −40°C ≤ TA ≤ +105°C −0.5 V < VGAIN < +0.5 V −40°C ≤ TA ≤ +105°C 0 −1.25 −1 −1.25 −3 −0.5 3 +1.25 +1 +1.25 0 dB dB dB dB dB dB dB +0.5 dB 19.5 20.0 20 ± 0.5 24 11.9 11.9 ± 0.4 17.9 17.9 ± 0.4 −VS −0.9 0.3 Rev. 0 | Page 4 of 40 ns ns dB 17.5 −40°C ≤ TA ≤ +105°C 0.2 to 2 ±0.35 ±0.25 ±0.35 −0.2 to −2 ±0.2 ±0.3 ±0.1 to ±0.25 Unit dBc dBc dBc dBc dBm dBVRMS dBm dBVRMS dBm dBVRMS dBm dBVRMS ±0.25 11.5 −40°C ≤ TA ≤ +105°C OFSx = 0 V, VGAx = 0 V Max ±1 −40°C ≤ TA ≤ +105°C −40°C ≤ TA ≤ +105°C GNLO = 0 V, no gain foldover ΔVIN/ΔIBIAS, −0.7 V < VGAIN < +0.7 V −0.7 V < VGAIN < 0.7 V −0.7 V < VGAIN < 0.7 V, −40°C ≤ TA ≤ +105°C −0.7 V < VGAIN < 0.7 V −0.7 V < VGAIN < 0.7 V, −40°C ≤ TA ≤ +105°C 24 dB gain change Typ −68 −51 −49 −34 32 19 23 10 30 17 21 8 25 −1.4 5.75 20.5 12.2 18.2 +VS 70 −0.4 −0.4 ± +0.2 −1.2 −1.2 ± +0.4 200 1.5 1.5 ± 0.3 6 6 ± 0.5 0 2.5 +1.4 6.25 dB/V dB/V dB dB dB dB dB V MΩ μA μA μA μA ns nA nA V dB dB AD8264 Parameter POWER SUPPLY Supply Voltage Power Consumption Quiescent Current Power Dissipation PSRR Conditions Min Typ ±2.5 VS = ± 2.5 V VS = ± 2.5 V, −40°C ≤ TA ≤ +105°C VS = ± 3.3 V VS = ± 3.3 V, −40°C ≤ TA ≤ +105°C VS = ± 5 V VS = ± 5 V, −40°C ≤ TA ≤ +85°C 5 VS = ± 2.5 V VS = ±3.3 V VS = ±5 V From VPOS to differential output, VGAIN = 0.7 V From VNEG to differential output, VGAIN = 0.7 V 1 Differential Output = (VOHx − VOLx). All dBm values are calculated with 50 Ω reference, unless otherwise noted. 3 Conformance to theoretical gain expression (see Equation 1 in the Theory of Operation section). 4 Conformance to best-fit dB linear curve. 5 For supplies greater than ±3.3 V, the operating temperature range is limited to −40°C ≤ TA ≤ +85°C. 2 Rev. 0 | Page 5 of 40 65 70 81 79 79 ± 25 85 85 ± 30 99 99 ± 30 395 560 990 −15 −15 Max Unit ±5 V 88 mA mA mA mA mA mA mW mW mW dB dB 95 110 AD8264 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Voltage Supply Voltage (VPOS, VNEG) Input Voltage (INPx) Gain Voltage (GNHx, GNLO) Power Dissipation Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 60 sec) Package Glass Transition Temperature (TG) θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. The θJA values in Table 3 assume a 4-layer JEDEC standard board with zero airflow. Rating ±6 V VPOS, VNEG VPOS, VNEG 2.5 W Table 3. Thermal Resistance −40°C to +105°C −65°C to +150°C 300°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Type 40-Lead LFCSP1 1 θJA 31.0 θJC 2.3 Unit °C/W 4-Layer JEDEC board (2S2P). MAXIMUM POWER DISSIPATION The maximum safe power dissipation for the AD8264 is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a temperature of 150°C for an extended period can cause changes in silicon devices, potentially resulting in a loss of functionality. ESD CAUTION Rev. 0 | Page 6 of 40 AD8264 IPP1 COMM GNH1 GNH2 GNLO VPOS VNEG OFS1 OFS2 VGA1 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 40 39 38 37 36 35 34 33 32 31 IPN1 OPP1 OPP2 IPN2 IPP2 IPP3 IPN3 OPP3 OPP4 IPN4 1 2 3 4 5 6 7 8 9 10 30 29 28 27 26 25 24 23 22 21 PIN1 INDICATOR AD8264 TOP VIEW (Not to Scale) VOL1 VOH1 VOH2 VOL2 VGA2 VGA3 VOL3 VOH3 VOH4 VOL4 NOTES 1. EXPOSED PADDLE (PIN 0) NEEDS AN ELECTRICAL CONNECTION TO GROUND. FOR PROPER RF GROUNDING AND INCREASED RELIABILITY, THE PAD MUST BE CONNECTED TO THE GROUND PLANE. 07736-003 VGA4 VOCM VPOS VNEG OFS4 OFS3 IPP4 COMM GNH4 GNH3 11 12 13 14 15 16 17 18 19 20 Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. 0 (EP), 12, 39 Mnemonic COMM 1, 4, 7, 10 IPN1, IPN2, IPN3, IPN4 OPP1, OPP2, OPP3, OPP4 IPP1, IPP2, IPP3, IPP4 GNH1, GNH2, GNH3, GNH4 VOCM VPOS VNEG OFS1, OFS2, OFS3, OFS4 VGA4, VGA3 VGA2, VGA1 VOL1, VOL2 VOL3, VOL4 VOH1, VOH2, VOH3, VOH4 GNLO 2, 3, 8, 9 5, 6, 11, 40 13, 14, 37, 38 15 16, 35 17, 34 18, 19, 32, 33 20, 25, 26, 31 21, 24, 27, 30 22, 23, 28, 29 36 Description Ground. Exposed paddle (EP, Pin 0) needs an electrical connection to ground. For proper RF grounding and increased reliability, the pad must be connected to the ground plane. Negative Preamp Inputs for Channel 1 Through Channel 4. Normally, no external connection is needed. Preamp Output for Channel 1 Through Channel 4. This pin is internally connected to the attenuator (VGA) input, and normally, no external connection is needed. Positive Preamp Input for Channel 1 Through Channel 4. High impedance. Positive Gain Control Voltage Input for Channel 1 Through Channel 4. This pin is referenced to GNLO (Pin 36). This pin sets the differential output amplifier (VOHx and VOLx) common-mode voltage. Positive Supply (Internally Tied Together). Negative Supply (Internally Tied Together). Voltage sets the differential output offset for Channel 1 through Channel 4. This is the noninverting input to the differential amplifier, and it has the same bandwidth as the inverting input (VGAx). VGA Output for Channel 1 Through Channel 4. Negative Differential Amplifier Output for Channel 1 Through Channel 4. Positive Differential Amplifier Output for Channel 1 Through Channel 4. Negative Gain Control Input (Reference for GNHx Pins). Rev. 0 | Page 7 of 40 AD8264 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V, VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified. 30 DIFFERENTIAL OUTPUT MEAN: –0.1dB SD: 0.05dB 100 80 HITS 18 VGA 12 60 6 40 0 20 –6 –0.7 VGAIN = 0V 120 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 VGAIN (V) 0 –0.6 07736-004 GAIN (dB) 24 140 –40°C –40°C +25°C +25°C +85°C +85°C +105°C +105°C –0.4 –0.2 0 0.2 Figure 6. VGA Absolute Gain Error Histogram Figure 3. Gain vs. VGAIN vs. Temperature 2.0 TA = +105°C TA = +25°C TA = –40°C 180 MAX MIN 150 1.5 0.5 MEAN: 20.1dB SD: 0.09dB 120 HITS GAIN ERROR (dB) 1.0 0.4 GAIN ERROR (dB) 07736-007 36 0 90 –0.5 60 –1.0 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 VGAIN (V) 0 19.0 07736-005 –2.0 –0.7 19.5 20.0 20.5 Figure 7. Gain Scale Factor Histogram (−0.4 V < VGAIN < +0.4 V) Figure 4. Gain Error vs. VGAIN vs. Temperature 2 80 0 HITS 60 –1 40 –2 20 –4 –0.7 –0.5 –0.3 –0.1 0.1 VGAIN (V) 0.3 0.5 0.7 0 11.7 11.8 11.9 12.0 GAIN INTERCEPT (dB) Figure 5. Gain Error vs. VGAIN at Various Frequencies to VGAx Figure 8. VGA Gain Intercept Histogram Rev. 0 | Page 8 of 40 12.1 07736-009 –3 07736-006 GAIN ERROR (dB) MEAN: 11.9dB SD: 0.08dB 1MHz 10MHz 70MHz 100MHz 150MHz 1 21.0 GAIN SCALING (dB/V) 07736-008 30 –1.5 AD8264 700 30 CH 1 TO CH 2 CH 1 TO CH 3 CH 1 TO CH 4 600 20 500 –10 200 –20 100 –30 0 –0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 GAIN ERROR MATCHING (dB) –40 100k 07736-028 HITS 300 0 CL = 0pF CL = 10pF CL = 22pF 1M 10M 100M 500M FREQUENCY (Hz) Figure 9. Channel-to-Channel Gain Match Histogram 07736-012 GAIN (dB) 10 400 30 VOUT = 0.1V p-p VGAIN = 0V Figure 12. Frequency Response to Differential Output for Various Capacitive Loads 30 PIN = –28dBm VOUT = 0.1V p-p 24 20 18 10 GAIN (dB) 6 0 –12 –18 100k 1M –10 –20 –30 10M 100M FREQUENCY (Hz) –40 100k CL = 0pF CL = 10pF CL = 22pF 1M 10M 100M FREQUENCY (Hz) Figure 10. Frequency Response vs. Gain to VGAx for Various Values of VGAIN 40 0 07736-013 –6 VGAIN = +0.7V VGAIN = +0.5V VGAIN = +0.2V VGAIN = 0V VGAIN = –0.2V VGAIN = –0.5V VGAIN = –0.7V 07736-010 GAIN (dB) 12 Figure 13. Frequency Response to Differential Output for Various Capacitive Loads with Series R = 10 Ω 20 PIN = –44dBm VOUT = 0.1V p-p 30 10 GAIN (dB) 0 –10 –20 –30 –40 100k VGAIN = +0.7V VGAIN = +0.5V VGAIN = +0.2V VGAIN = 0V VGAIN = –0.2V VGAIN = –0.5V VGAIN = –0.7V 1M 0 –10 –20 10M 100M FREQUENCY (Hz) –30 100k 07736-011 GAIN (dB) 10 CL = 0pF CL = 10pF CL = 22pF CL = 47pF 1M 10M 100M 500M FREQUENCY (Hz) Figure 14. Small Signal Frequency Response to VGAx for Various Capacitive Loads Figure 11. Frequency Response vs. Gain to Differential Output for Various Values of VGAIN Rev. 0 | Page 9 of 40 07736-014 20 AD8264 20 30 PIN = –10dBm VOUT = 0.1V p-p 24 VGAIN = +0.7V 10 VGAIN = 0V 12 0 GAIN (dB) GAIN (dB) 18 –10 6 VGAIN = –0.7V 0 –6 –12 1M 10M 100M 500M FREQUENCY (Hz) –18 100k 1M 100M 500M Figure 18. Small Signal Frequency Response vs. Gain to VGAx for Various Supply Voltages 40 PIN = –28dBm VOUT = 0.1V p-p 30 10 0 GAIN (dB) GAIN (dB) 10M FREQUENCY (Hz) Figure 15. Large Signal Frequency Response to VGAx for Various Capacitive Loads 20 VS = ±5V VS = ±3.3V VS = ±2.5V 07736-018 –30 100k CL = 47pF CL = 22pF CL = 9pF CL = 0pF 07736-015 –20 –10 VGAIN = +0.7V 20 VGAIN = 0V 10 VGAIN = –0.7V 0 –10 –20 –30 1M 10M 100M 500M FREQUENCY (Hz) –40 100k Figure 16. Small Signal Frequency Response to VGAx for Various Capacitive Loads with Series R = 10 Ω VS = ±5V VS = ±3.3V VS = ±2.5V 1M 10M 100M 500M FREQUENCY (Hz) 07736-019 –30 100k CL = 47pF CL = 22pF CL = 10pF CL = 0pF 07736-016 –20 Figure 19. Small Signal Frequency Response vs. Gain to Differential Output for Various Supply Voltages 20 36 PIN = –8dBm 30 VOUT = 0.1V p-p VGAIN = 0.7V DIFFERENTIAL OUTPUT 10 VGA –10 18 12 6 –20 –30 100k CL = 47pF CL = 22pF CL = 10pF CL = 0pF 0 1M 10M 100M 500M FREQUENCY (Hz) Figure 17. Large Signal Frequency Response to VGAx for Various Capacitive Loads with Series R = 10 Ω –6 100k VS = ±5V VS = ±3.3V VS = ±2.5V VS = ±5V VS = ±3.3V VS = ±2.5V 1M 10M 100M 500M FREQUENCY (Hz) Figure 20. Large Signal Frequency Response to VGAx and Differential Output for Various Supply Voltages Rev. 0 | Page 10 of 40 07736-020 GAIN (dB) 0 07736-017 GAIN (dB) 24 AD8264 1 5 PIN = –16dBm 4 3 DELAY (ns) GAIN (dB) 0 –1 VGAIN = 0V VGAIN = –0.7V 2 VGAIN = +0.7V 1M 10M 100M 0 1M FREQUENCY (Hz) 10M 100M 07736-024 1 100M 07736-025 –3 100k VS = ±2.5V, VOHx VS = ±3.3V, VOHx VS = ±5V, VOHx VS = ±2.5V, VOLx VS = ±3.3V, VOLx VS = ±5V, VOLx 07736-021 –2 FREQUENCY (Hz) Figure 21. Frequency Response from VOCM to VOHx and VOLx for Various Supplies Figure 24. Group Delay vs. Frequency to VGAx 8 9 VOUT = 0.1V p-p 7 –3 DELAY (ns) GAIN (dB) 3 –9 6 VGAIN = –0.7V 5 VGAIN = +0.7V VGAIN = 0V 4 –15 1M 10M 100M 500M FREQUENCY (Hz) 2 1M 07736-022 –21 100k 3 VS = ±5V VS = ±3.3V VS = ±2.5V Figure 22. Frequency Response from OFSx to Differential Output for Various Supply Voltages Figure 25. Group Delay vs. Frequency to Differential Output 15 12 PIN = –22dBm –6 1M 10M 100M FREQUENCY (Hz) Figure 23. Preamp Frequency Response to OPPx 1G 07736-023 VS = ±2.5V VS = ±3.3V VS = ±5V TA = +105°C TA = +25°C TA = –40°C MAX MIN 5 0 –5 –10 –0.7 –0.5 –0.3 –0.1 0.1 VGAIN (V) 0.3 0.5 0.7 07736-026 0 –12 100k 10 OFFSET VOLTAGE RTO (mV) 6 GAIN (dB) 10M FREQUENCY (Hz) Figure 26. Differential Output Offset Voltage vs. VGAIN vs. Temperature Rev. 0 | Page 11 of 40 AD8264 0 –5 –10 –0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 VGAIN (V) 0.1 0.1 10 100 Figure 30. Output Resistance (VOHx, VOLx) vs.Frequency 10 VGAIN = –0.4V VGAIN = 0V VGAIN = +0.4V 2000 HITS 1 FREQUENCY (MHz) OUTPUT RESISTANCE (Ω) 2500 VS = ±5V 1 Figure 27. VGAx Output Offset Voltage vs. VGAIN vs. Temperature 3000 VS = ±2.5V 10 07736-030 OUTPUT RESISTANCE (Ω) 5 100 TA = +105°C TA = +25°C TA = –40°C MAX MIN 07736-027 OFFSET VOLTAGE RTO (mV) 10 1500 1000 VS = ±5V VS = ±2.5V –20 –10 0 10 20 30 OUTPUT OFFSET VOLTAGE (mV) 1 0.1 07736-029 0 –30 700 100 Figure 31. Output Resistance (VGAx) vs. Frequency 100 VGAIN = –0.4V VGAIN = 0V VGAIN = +0.4V 80 OUTPUT NOISE (nV/√Hz) 600 500 400 300 200 60 DIFFERENTIAL OUTPUT 40 20 100 –20 –10 0 10 20 OUTPUT OFFSET VOLTAGE (mV) Figure 29. Output Offset Histogram to Differential Output 30 0 –0.7 –0.5 –0.3 –0.1 0.1 VGAIN (V) 0.3 0.5 0.7 07736-032 0 –30 VGAx 07736-095 HITS 10 FREQUENCY (MHz) Figure 28. Output Offset Histogram to VGAx 800 1 07736-031 500 Figure 32. Output Referred Noise to VGAx and Differential Output vs. VGAIN Rev. 0 | Page 12 of 40 AD8264 35 25 VGAx (TERMINATED) 20 VGAx (UNTERMINATED) 15 VGAx DIFFERENTIAL OUTPUT (UNTERMINATED) 10 1 –0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 VGAIN (V) 5 –0.7 –0.1 0.1 0.3 0.5 0.7 100 Figure 36. Noise Figure vs. VGAIN 100 –10 –20 –30 CMRR (dB) 10 –40 –50 DIFFERENTIAL OUTPUT –60 VGAx 1 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) –70 0.1 07736-034 1 1 10 FREQUENCY (MHz) Figure 34. Input Referred Noise vs. Frequency at Maximum Gain Figure 37. VOCM Common-Mode Rejection Ratio vs. Frequency 100 −30 HD2, HD3, HD2, HD3, −40 VS = ±2.5V VS = ±2.5V VS = ±5V VS = ±5V HD (dBc) −50 10 −60 −70 DIFFERENTIAL OUTPUT −80 VGAx 1 10 100 1k RSOURCE (Ω) Figure 35. Input Referred Noise vs. RSOURCE 10k −90 07736-035 1 0 400 800 1200 RLOAD (Ω) 1600 2000 07736-038 INPUT REFERRED NOISE (nV/√Hz) –0.3 VGAIN (V) Figure 33. Input Referred Noise from VGAx and Differential Output vs. VGAIN INPUT REFERRED NOISE (nV/√Hz) –0.5 07736-036 DIFFERENTIAL OUTPUT 10 DIFFERENTIAL OUTPUT (TERMINATED) 07736-037 NOISE FIGURE (dB) 30 07736-033 INPUT REFERRED NOISE (nV/√Hz) 100 Figure 38. Harmonic Distortion to VGAx vs. RLOAD and Various Supplies Rev. 0 | Page 13 of 40 AD8264 −30 HD2, HD3, HD2, HD3, −40 –30 VS = ±2.5V VS = ±2.5V VS = ±5V VS = ±5V –40 −60 –60 −70 –70 −80 –80 −90 0 10 20 30 40 50 CLOAD (pF) –90 –0.7 HD2, HD3, HD2, HD3, −40 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 VGAIN (V) Figure 39. Harmonic Distortion to VGAx vs. CLOAD −30 1MHz 10MHz 35MHz 100MHz 07736-042 HD2 (dBc) –50 07736-039 HD (dBc) −50 Figure 42. HD2 vs. VGAIN vs. Frequency to VGAx −20 VS = ±2.5V VS = ±2.5V VS = ±5V VS = ±5V −30 −40 HD3 (dBc) −60 −70 −60 −70 −80 400 800 1200 1600 2000 RLOAD (Ω) −90 –0.7 07736-040 0 −30 −40 −50 −50 HD2 (dBc) −40 −60 −80 −80 30 40 0.1 0.3 0.5 0.7 50 CLOAD (pF) 0.7 VGAx = 0.5Vp-p VGAx = 1Vp-p VGAx = 2Vp-p INPUT LIMITED −70 20 –0.1 −60 −70 07736-041 HD (dBc) HD2, VS = ±2.5V HD3, VS = ±2.5V 10 –0.3 Figure 43. HD3 vs. VGAIN vs. Frequency to VGAx −30 0 –0.5 VGAIN (V) Figure 40. Harmonic Distortion to Differential Output vs. RLOAD and Various Supplies −90 1MHz 10MHz 35MHz 100MHz 07736-043 −80 −90 −50 07736-044 HD (dBc) −50 −90 –0.7 –0.5 –0.3 –0.1 0.1 0.3 VGAIN (V) Figure 44. HD2 vs. Amplitude to VGAx Figure 41. Harmonic Distortion to Differential Output vs. CLOAD Rev. 0 | Page 14 of 40 0.5 AD8264 −40 INPUT LIMITED HD2 (dBc) −50 −60 −60 −70 −70 −80 −80 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 VGAIN (V) −90 –0.7 07736-045 HD3 (dBc) −50 −90 –0.7 VOUT = 0.5V p-p VOUT = 1V p-p VOUT = 2V p-p −40 0.5 0.7 0.7 HD3 (dBc) −50 −60 −70 −80 −80 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 VGAIN (V) −90 –0.7 07736-046 HD2 (dBc) 0.3 −40 −70 VOUT = 0.5V p-p VOUT = 1V p-p VOUT = 2V p-p –0.5 –0.3 –0.1 0.1 0.3 0.5 VGAIN (V) Figure 46. HD2 vs. VGAIN vs. Frequency to Differential Output −15 0.1 −30 1MHz 10MHz 35MHz −60 0 –0.1 Figure 48. HD2 vs. Amplitude to Differential Output −50 −90 –0.7 –0.3 VGAIN (V) Figure 45. HD3 vs. Amplitude to VGAx −30 –0.5 07736-048 −40 −30 VGAx = 0.5V p-p VGAx = 1V p-p VGAx = 2V p-p 07736-049 −30 Figure 49. HD3 vs. Amplitude to Differential Output 0 1MHz 10MHz 35MHz VOUT = 1V p-p −20 IMD3 (dBc) −45 −40 −60 −60 −80 −75 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 VGAIN (V) Figure 47. HD3 vs. VGAIN vs. Frequency to Differential Output −100 1M 10M FREQUENCY (Hz) Figure 50. IMD3 vs. Frequency to VGAx Rev. 0 | Page 15 of 40 100M 07736-050 LOW TONE, f – 50kHz HIGH TONE, f + 50kHz −90 –0.7 07736-047 HD3 (dBc) −30 AD8264 15 30 20 10 10 5 0 −5 −10 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 VGAIN (V) −15 –0.7 07736-051 0 –0.7 VGAx (VS = ±5V) DIFF OUT (VS = ±5V) VGAx (VS = ±3.3V) DIFF OUT (VS = ±3.3V) VGAx (VS = ±2.5V) DIFF OUT (VS = ±2.5V) –0.5 0.1 0.3 0.5 0.7 80 100 100 Figure 54. Input P1dB vs. VGAIN 0.10 VOUT = 1V p-p −20 VGAIN = 0.7V VOLTAGE (V) 0.05 −40 IMD3 (dBc) –0.1 VGAIN (V) Figure 51. OIP3 vs. VGAIN vs. Frequency to VGAx 0 –0.3 07736-054 INPUT-REFERRED P1dB (dBm) OIP3 (dBm) 40 20 f = 35MHz, OIP3L f = 35MHz, OIP3H f = 100MHz, OIP3L f = 100MHz, OIP3H 07736-055 f = 1MHz, OIP3L f = 1MHz, OIP3H f = 10MHz, OIP3L f = 10MHz, OIP3H 07736-056 50 −60 0 LOW TONE, f – 50kHz –0.05 −80 HIGH TONE, f + 50kHz 10M 100M FREQUENCY (Hz) –0.10 –40 07736-052 −100 1M –20 0 20 40 60 TIME (ns) Figure 52. IMD3 vs. Frequency to Differential Output Figure 55. Small Signal Pulse Response to VGAx 50 0.15 VGAIN = 0.7V 0.10 40 VOLTAGE (V) 20 0 –0.05 f = 1MHz, OIP3L f = 1MHz, OIP3H f = 10MHz, OIP3L f = 10MHz, OIP3H f = 35MHz, OIP3L f = 35MHz, OIP3H 10 0 –0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 VGAIN (V) 0.7 –0.10 07736-053 OIP3 (dBm) 0.05 30 Figure 53. OIP3 vs. Frequency to Differential Output –0.15 –40 –20 0 20 40 60 80 TIME (ns) Figure 56. Small Signal Pulse Response to Differential Output Rev. 0 | Page 16 of 40 AD8264 1.5 1.5 1.0 0.5 0.5 VOLTAGE (V) 1.0 0 1V p-p –1.5 –40 –20 0 20 40 60 1V p-p –0.5 2V p-p –1.0 0 2V p-p –1.0 80 100 TIME (ns) –1.5 –40 –20 0 20 40 60 80 100 TIME (ns) Figure 57. Large Signal Pulse Response to VGAx 07736-060 –0.5 07736-057 VOLTAGE (V) VGAIN = 0.7V Figure 60. OFSx Large Signal Pulse Response 1.5 1.0 VGAIN = 0.7V CL = 0pF CL = 10pF CL = 22pF VGAIN = 0.7V 1.0 0.5 VOLTAGE (V) 0 1V p-p –0.5 2V p-p –1.0 –1.5 –40 –20 0 20 40 60 80 100 TIME (ns) Figure 58. Large Signal Pulse Response to Differential Output 1.5 –1.0 –40 –20 0 20 40 60 80 100 TIME (ns) Figure 61. Large Signal Pulse Response to VGAx for Various Capacitive Loads 2.0 2V p-p (VOL) 2V p-p (VOH) 1V p-p (VOL) 1V p-p (VOH) 1.0 0 07736-061 –0.5 07736-058 VOLTAGE (V) 0.5 CL = 0pF CL = 10pF CL = 22pF 1.5 1.0 VOLTAGE (V) 0 –0.5 0.5 0 –0.5 –1.0 –1.0 –1.5 0 20 40 60 80 100 120 140 TIME (ns) 160 Figure 59. VOCM Large Signal Pulse Response –2.0 –40 –20 0 20 40 60 80 100 TIME (ns) Figure 62. Large Signal Pulse Response to Differential Output for Various Capacitive Loads Rev. 0 | Page 17 of 40 07736-062 –1.5 07736-059 VOLTAGE (V) 0.5 AD8264 –2.0 VGAIN = 0.7V 1.5 CL = 0pF CL = 10pF CL = 22pF –1.5 1.0 0.5 –0.5 VOTLAGE (V) VOLTAGE (V) –1.0 0 –0.5 0 –0.5 –1.0 20 40 60 80 100 TIME (ns) –1.5 0 200 400 600 800 1000 1200 07736-066 0 1200 07736-067 –20 07736-096 –2.0 –40 100M 07736-068 –1.0 –1.5 TIME (ns) Figure 63. Large Signal Pulse Response to Differential Output for Various Capacitive Loads with Series R = 10 Ω Figure 66. Preamp Overdrive Recovery 1.5 1.5 1.0 1.0 VGAIN PULSE VOTLAGE (V) 0.5 GAIN RESPONSE 0 0 –0.5 –0.5 –1.0 –1.0 –1.5 0 400 800 1200 1600 2000 TIME (ns) –1.5 07736-064 VOTLAGE (V) 0.5 0 600 800 1000 Figure 67. VGA Overdrive Recovery 1.5 0 1.0 VGAx (VGAIN = +0.7V) DIFF OUT (VGAIN = +0.7V) VGAx (VGAIN = −0.7V) DIFF OUT (VGAIN = −0.7V) –10 0.5 –20 PSRR (dB) GAIN RESPONSE 0 –0.5 –30 –40 VGAIN PULSE –50 –1.0 0 400 800 1200 1600 2000 TIME (ns) 07736-065 VOTLAGE (V) 400 TIME (ns) Figure 64. VGAx Response to Change in VGAIN –1.5 200 Figure 65. Differential Output Response to Change in VGAIN –60 100k 1M 10M FREQUENCY (Hz) Figure 68. Power Supply Rejection vs. Frequency (VPOS) Rev. 0 | Page 18 of 40 AD8264 5 135 VGAx (VGAIN = +0.7V) DIFF OUT (VGAIN = +0.7V) VGAx (VGAIN = −0.7V) DIFF OUT (VGAIN = −0.7V) 125 SUPPLY CURRENT (mA) –5 –25 –35 105 95 ±2.5V ±3.3V 85 75 –45 –55 100k 1M 10M 100M FREQUENCY (Hz) Figure 69. Power Supply Rejection vs. Frequency (VNEG) 55 –40 –15 10 35 60 85 TEMPERATURE (°C) Figure 70. Quiescent Supply Current vs. Temperature Rev. 0 | Page 19 of 40 110 07736-070 65 07736-069 PSRR (dB) –15 ±5V 115 AD8264 TEST CIRCUITS VS = ±2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V, VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified. DC METER AD8264 IPPx + IPNx – 50Ω PrA 6dB VGAx VOLx + 6dB – GNHx GNLO VOCM VOHx 500Ω 500Ω 500Ω DC METER OFSx 07736-119 VGAIN OVEN Figure 71. Gain vs. VGAIN vs. Temperature (See Figure 3 and Figure 4) NETWORK ANALYZER OSCILLOSCOPE SIGNAL GENERATOR OUT CH1 50Ω CH1 CH2 50Ω CH2 50Ω 50Ω 50Ω DIFFERENTIAL PROBE DIFFERENTIAL PROBE DIFFERENTIAL PROBE AD8264 AD8264 VGAx VGAx IPPx + 50Ω IPNx – 500Ω PrA 6dB 6dB – + IPNx – 50Ω VOLx + IPPx PrA 6dB VOLx + 500Ω 6dB – VOHx VOHx 500Ω VOCM OFSx VGAIN Figure 72. Gain Error vs. VGAIN at Various Frequencies to VGAx (See Figure 5) GNLO VOCM OFSx 07736-101 GNLO VGAIN 07736-100 GNHx GNHx Figure 74. Frequency Response vs. Gain to Differential Output for Various Values of VGAIN (See Figure 11) NETWORK ANALYZER CH1 NETWORK ANALYZER CH2 50Ω DIFFERENTIAL PROBE CH1 CH2 50Ω 50Ω AD8264 DIFFERENTIAL PROBE VGAx IPPx + 50Ω IPNx – 500Ω PrA 6dB AD8264 VOLx + VGAx 6dB – IPPx + IPNx – 50Ω VOHx PrA 6dB 6dB – GNLO VOCM OFSx 07736-072 GNHx VGAIN Figure 73. Frequency Response vs. Gain to VGAx for Various Values of VGAIN, VGAIN = GNHx – GNLO (See Figure 10) Rev. 0 | Page 20 of 40 GNHx VOLx + GNLO VOCM OFSx 500Ω VOHx CL 500Ω Figure 75. Frequency Response to Differential Output for Various Capacitive Loads (See Figure 12) CL 07736-102 50Ω AD8264 NETWORK ANALYZER CH1 NETWORK ANALYZER CH2 50Ω CH1 50Ω DIFFERENTIAL PROBE CH2 50Ω 50Ω AD8264 VGAx DIFFERENTIAL PROBE AD8264 VGAx – PrA 6dB VOLx + – GNHx GNLO VOCM 10Ω 500Ω 6dB VOHx – PrA 6dB 10Ω GNHx CL VOHx GNLO VS OFSx VOCM VGAIN VSUPPLY Figure 79. Frequency Response vs. Gain to VGAx for Various Supply Voltages (See Figure 18) NETWORK ANALYZER NETWORK ANALYZER CH2 50Ω 6dB – Figure 76. Frequency Response to Differential Output for Various Capacitive Loads with Series R = 10 Ω (See Figure 13) CH1 VOLx + CL 500Ω OFSx 50Ω IPNx 07736-078 + IPNx + 07736-103 IPPx 50Ω IPPx CH1 50Ω CH2 50Ω 50Ω DIFFERENTIAL PROBE DIFFERENTIAL PROBE AD8264 VGAx + IPNx – 500Ω PrA 6dB AD8264 CL VGAx VOLx + 6dB – IPPx + IPNx – 50Ω VOHx PrA 6dB VOLx + 500Ω 6dB – GNLO VOCM OFSx 500Ω GNHx 07736-076 GNHx VGAIN VOCM OFSx VS VSUPPLY Figure 80. Frequency Response vs. Gain to Differential Output for Various Supply Voltages (See Figure 19) NETWORK ANALYZER NETWORK ANALYZER CH2 50Ω GNLO VGAIN Figure 77. Frequency Response to VGAx for Various Capacitive Loads (See Figure 14) CH1 VOHx 07736-104 IPPx 50Ω CH1 50Ω CH2 50Ω 50Ω DIFFERENTIAL PROBE DIFFERENTIAL PROBE 10Ω VGAx IPPx 50Ω IPNx + – 500Ω PrA 6dB AD8264 CL VGAx VOLx + IPPx + IPNx – 6dB – VOHx PrA 6dB VOLx + 500Ω 6dB – GNLO VOCM OFSx 500Ω GNHx 07736-077 GNHx VOHx VGAIN GNLO VOCM 50Ω Figure 78. Frequency Response to VGAx for Various Capacitive Loads with Series R =10 Ω (See Figure 16) OFSx VS VSUPPLY 07736-105 AD8264 Figure 81. VOCM Frequency Response to Differential Output (See Figure 21) Rev. 0 | Page 21 of 40 AD8264 NETWORK ANALYZER CH1 CH2 50Ω SPECTRUM ANALYZER 50Ω CH1 DIFFERENTIAL PROBE CH2 50Ω AD8264 50Ω VGAx IPPx + IPNx – PrA 6dB AD8264 VOLx + – VOHx IPPx + IPNx – PrA 6dB 6dB OFSx – AD8129 VOHx 10× VS VSUPPLY 50Ω GNHx GNLO VOCM OFSx 07736-112 VOCM 07736-106 GNLO 10× VOLx + 500Ω GNHx AD8129 VGAx 500Ω 6dB VGAIN Figure 85. Output Referred Noise vs. VGAIN (See Figure 32) Figure 82. OFSx Frequency Response to Differential Output (See Figure 22) SPECTRUM ANALYZER 220Ω CH1 CH2 AD8264 IPPx IPNx + – VGAx PrA 6dB VOLx + 6dB – GNHx GNLO VOCM VOHx 50Ω 500Ω 50Ω 50Ω 500Ω 500Ω AD8264 DC METER AD8129 10× VGAx IPPx IPNx OFSx + – PrA 6dB VOLx + 6dB – AD8129 VOHx 10× OVEN GNLO VOCM Figure 86. Input Referred Noise vs. Frequency (See Figure 34) Figure 83. Output Offset Voltage vs. VGAIN vs. Temperature (See Figure 26 and Figure 27) NOISE METER NETWORK ANALYZER CH1 50Ω NOISE SOURCE CH2 50Ω OFSx 07736-113 GNHx 07736-110 VGAIN 50Ω AD8264 VGAx AD8264 + – PrA 6dB IPNx – PrA 6dB 6dB – VOLx + VOLx + – GNHx VOHx GNLO VOCM OFSx VGAIN GNLO VOCM OFSx VS VSUPPLY 07736-111 GNHx VOHx 6dB Figure 87. Noise Figure vs. VGAIN (See Figure 36) Figure 84. Output Resistance vs. Frequency (See Figure 30 and Figure 31) Rev. 0 | Page 22 of 40 07736-115 IPPx + 50Ω VGAx 50Ω IPNx IPPx AD8264 SPECTRUM ANALYZER 220Ω CH1 CH2 50Ω 50Ω 50Ω 0.1µF AD8129 10× AD8264 VGAx RS IPPx + IPNx – PrA 6dB VOLx + 6dB – GNHx GNLO 50Ω 0.1µF 10× 50Ω 0.1µF 1kΩ OFSx VOCM AD8129 VOHx 1kΩ 07736-114 50Ω Figure 88. Input Referred Noise vs. RSOURCE (See Figure 35) SPECTRUM ANALYZER NETWORK ANALYZER SIGNAL GENERATOR OUT CH1 CH2 50Ω 50Ω DIFFERENTIAL PROBE LPF AD8264 AD8264 VGAx VGAx IPPx + IPNx – 50Ω PrA 6dB IPPx VOLx + IPNx – PrA 6dB VOCM VOHx VOHx OFSx GNHx GNLO VOCM OFSx 07736-116 GNLO CL 6dB – 500Ω GNHx VOLx + 500Ω 6dB – + 50Ω 10Ω 07736-118 50Ω CH1 50Ω Figure 89. VOCM Common-Mode Rejection vs. Frequency (See Figure 37) Figure 91. Harmonic Distortion to VGAx vs. CLOAD (Figure 39) SPECTRUM ANALYZER OUT SIGNAL GENERATOR CH1 50Ω 50Ω OUT 500Ω SPECTRUM ANALYZER SIGNAL GENERATOR CH1 50Ω 50Ω LPF AD8264 VGAx IPNx – 50Ω PrA 6dB VGAx 6dB GNLO VOCM OFSx AD8264 VOLx + IPPx + IPNx – 50Ω – GNHx 450Ω LPF VOHx PrA 6dB GNHx Figure 90. Test Circuit Harmonic Distortion to VGAx vs. RLOAD and Various Supplies (See Figure 38) AD8130 6dB – VS VSUPPLY VOLx + GNLO VOCM OFSx 1× VOHx VS RL VSUPPLY RL 07736-128 + 07736-117 IPPx Figure 92. Harmonic Distortion to Differential Output vs. RLOAD and Various Supplies (See Figure 40) Rev. 0 | Page 23 of 40 AD8264 OUT SPECTRUM ANALYZER SIGNAL GENERATOR CH1 50Ω CH1 50Ω SPECTRUM ANALYZER SIGNAL GENERATOR OUT 50Ω 50Ω 350Ω LPF 450Ω AD8264 AD8264 VGAx VGAx IPNx – PrA 6dB VOLx + 6dB – GNLO GNHx VOCM VOHx AD8130 – PrA 6dB VOLx + AD8130 6dB – 1× CL OFSx GNHx CL GNLO VOCM OFSx VS VGAIN Figure 95. HD2 and HD3 to Differential Output (See Figure 46 through Figure 49) SPECTRUM ANALYZER SIGNAL GENERATOR 1× VOHx 10Ω Figure 93. Harmonic Distortion to Differential Output vs. CLOAD (See Figure 41) OUT IPNx 50Ω 10Ω 07736-131 + + 07736-129 IPPx 50Ω IPPx SPECTRUM ANALYZER CH1 CH1 50Ω 50Ω 50Ω OUT SIGNAL GENERATOR 50Ω 450Ω LPF AD8264 VGAx IPPx + IPNx – 50Ω PrA 6dB SIGNAL GENERATOR VOLx + OUT 450Ω AD8264 50Ω VGAx IPPx + IPNx – 50Ω PrA 6dB VOLx + 6dB – 50Ω VOHx 6dB – GNHx VOHx GNLO VOCM OFSx VGAIN GNLO VOCM OFSx 07736-130 GNHx VGAIN Figure 94. HD2 and HD3 to VGAx (See Figure 42 Through Figure 45) Figure 96. IMD3 and OIP3 to VGAx (See Figure 50 and Figure 51) SPECTRUM ANALYZER CH1 50Ω 450Ω AD8264 50Ω VGAx IPPx SIGNAL GENERATOR OUT + 50Ω IPNx – 10Ω PrA 6dB 6dB – 50Ω GNHx VOLx + GNLO VOCM OFSx VOHx 500Ω Figure 97. IMD3 and OIP3 to Differential Output (See Figure 52 and Figure 53) Rev. 0 | Page 24 of 40 AD8130 1× 10Ω 500Ω 07736-133 OUT SIGNAL GENERATOR 50Ω 07736-132 LPF AD8264 NETWORK ANALYZER OSCILLOSCOPE CH2 CH1 CH3 CH1 50Ω 50Ω DIFFERENTIAL PROBE 500Ω AD8264 DIFFERENTIAL PROBE AD8264 VGAx IPPx + IPNx – 50Ω PrA 6dB VOLx + VGAx – + IPNx – 50Ω PrA 6dB VOLx + 500Ω 6dB – VOHx 500Ω GNHx 500Ω 6dB IPPx PULSE GENERATOR VOHx GNLO VOCM OFSx OUT 07736-120 50Ω 50Ω 50Ω 50Ω 500Ω GNLO VOCM OFSx 07736-134 GNHx VGAIN Figure 101. VOCM Pulse Response (See Figure 59) Figure 98. Input P1dB vs. VGAIN (See Figure 54) OSCILLOSCOPE OSCILLOSCOPE PULSE GENERATOR OUT CH1 50Ω CH2 50Ω CH1 50Ω 50Ω DIFFERENTIAL PROBE DIFFERENTIAL PROBE DIFFERENTIAL PROBE AD8264 VGAx AD8264 VGAx IPNx – 50Ω PrA 6dB VOLx + – PrA 6dB 6dB – VOCM GNHx PULSE GENERATOR OFSx 07736-135 GNLO VOHx GNLO VOCM Figure 102. OFSx Pulse Response (See Figure 60) OSCILLOSCOPE PULSE GENERATOR OUT CH1 50Ω CH2 50Ω PULSE GENERATOR 50Ω 50Ω DIFFERENTIAL PROBE AD8264 AD8264 VGAx VGAx IPNx – 50Ω PrA 6dB IPPx 6dB IPNx 500Ω GNHx GNLO VOCM CL 500Ω 6dB VOHx OFSx VOLx + VOHx OFSx 07736-136 VOCM – PrA 6dB – 500Ω GNLO + 50Ω VOLx + – GNHx CH1 50Ω DIFFERENTIAL PROBE DIFFERENTIAL PROBE + OFSx 50Ω OSCILLOSCOPE IPPx VOHx OUT 50Ω Figure 99. Pulse Response to VGAx, VGAIN = 0.7 V (See Figure 55 and Figure 57) OUT VOLx + 6dB – GNHx IPNx 07736-121 + + 50Ω 500Ω Figure 100. Pulse Response to Differential Outputs, VGAIN = 0.7 V (See Figure 56 and Figure 58) Figure 103. Pulse Response to VGAx for Various Capacitive Loads, VGAIN = 0.7 V (See Figure 61) Rev. 0 | Page 25 of 40 07736-122 IPPx IPPx AD8264 OSCILLOSCOPE OUT PULSE GENERATOR OUT DIFFERENTIAL PROBE 50Ω 50Ω CH1 50Ω CH1 SIGNAL GENERATOR OSCILLOSCOPE 50Ω OPPx AD8264 DIFFERENTIAL PROBE VGAx AD8264 VGAx + 50Ω – IPNx PrA 6dB VOCM VOLx + 6dB – VOHx CL OFSx GNHx GNLO VOCM OFSx 07736-123 GNLO PrA 6dB VOHx 500Ω GNHx – CL 500Ω 6dB – IPNx 50Ω VOLx + + 07736-126 IPPx IPPx Figure 104. Pulse Response to Differential Output for Various Capacitive Loads, VGAIN = 0.7 V (See Figure 62) Figure 107. Preamp Overdrive Recovery (See Figure 66) OSCILLOSCOPE OSCILLOSCOPE PULSE GENERATOR OUT CH1 50Ω 50Ω 50Ω 50Ω DIFFERENTIAL PROBE DIFFERENTIAL PROBE AD8264 VGAx AD8264 VGAx IPPx + PrA 6dB 50Ω – IPNx VOLx + VOHx CL VOCM OFSx OSCILLOSCOPE CH1 SIGNAL GENERATOR CH2 50Ω 50Ω 50Ω DIFFERENTIAL PROBE AD8264 VGAx IPPx + IPNx – 50Ω PrA 6dB 500Ω 6dB – 500Ω VOLx + VOHx 500Ω GNHx VOCM OFSx OUT 50Ω 07736-125 PULSE GENERATOR GNLO PrA 6dB VOLx + 6dB VOHx CL Figure 105. Pulse Response to Differential Output for Various Capacitive Loads with Series R = 10 Ω, VGAIN = 0.7 V (See Figure 63) OUT – – 07736-124 GNLO IPNx 10Ω 500Ω GNHx + 50Ω 10Ω 500Ω 6dB – IPPx Figure 106. Gain Response to VGAx or Differential Output (See Figure 64 and Figure 65) Rev. 0 | Page 26 of 40 GNHx GNLO VOCM OFSx Figure 108. VGA Overdrive Recovery, VGAIN = 0.7 V (See Figure 67) 07736-127 OUT CH1 SIGNAL GENERATOR AD8264 OSCILLOSCOPE CH2 CH3 50Ω 50Ω 50Ω DMM (+1) DIFFERENTIAL PROBE AD8264 IPPx + IPNx – 50Ω PrA 6dB VPOS VOLx – IPPx + IPNx – 50Ω 500Ω 6dB VNEG AD8264 VGAx 500Ω + DMM (–1) VOHx PrA 6dB 6dB VOCM OFSx – VOHx VS VSUPPLY GNHx GNLO VOCM OFSx 07736-108 VGAIN GNLO VOLx + 500Ω GNHx VGAx Figure 110. Quiescent Supply Current (See Figure 70) Figure 109. PSRR (See Figure 68 and Figure 69) Rev. 0 | Page 27 of 40 07736-109 CH1 AD8264 THEORY OF OPERATION OVERVIEW VGA The AD8264 is a dc-coupled quad channel VGA with a fixed gain-of-2 (6 dB) preamplifier and a single-ended-to-differential output amplifier with level shift capability that can be used as an ADC driver. Figure 111 shows a representative block diagram of a single channel; all four channels are identical. The supply can operate from ±2.5 V to ±5 V. The primary application is as a pulse processor for medical positron emission tomography (PET) imaging; however, the part is useful for any dc-coupled application that can benefit from variable gain. The VGA has a voltage feedback architecture and uses analog control to vary the gain. Its low gain range helps to maintain low offset and is intended for gain trim applications. The offset of the preamp and the VGA are trimmed; therefore, the maximum input referred offset is <0.5 mV over temperature (see Figure 26). Keeping the gain of each stage relatively low also allows the bandwidth to stay high. The signal chain consists of three fundamental stages: the preamplifier, the variable gain amplifier, and the differential output buffer amplifier. The preamplifier has an internally fixed gain-of-2 (6 dB). The VGA comprises an attenuator that provides 0 dB to 24 dB of attenuation, followed by a fixed gain 18 dB (8×) amplifier. The single-ended VGA output is connected directly to the noninverting input of the differential output (post) amplifier, which has a differential fixed gain-of-2 (6 dB). The gain range from the preamp input to the VGA output is 0 dB to 24 dB. The aggregate gain range from preamp input to the differential postamplifier output is 6 dB to 30 dB. The ideal gain equation for the gain from the single-ended input to the output is VGAIN = VGNHx − VGNLO (1) dB Gain = 20 × VGAIN + ICPT V (2) The ideal value for ICPT, or the intercept, is defined at VGAIN = 0 V. The ICPT for the VGA output and differential amplifier outputs equals 12.1 dB and 18.1 dB, respectively. The actual intercept varies with any additional gain or loss along the signal path. The measured values are both approximately 0.2 dB low. PREAMP The preamplifier is a current feedback amplifier, designed to drive the internal 100 Ω gain setting resistors and the resistive attenuator, which together result in a nominal load to the preamplifier of about 113 Ω. Normally, the negative preamp input, IPNx, is not connected externally. The positive input IPPx is the high impedance input of the current feedback amp. Note that, at the largest supply voltage of ±5 V, the input signal can become so large that the preamplifier output cannot deliver the required current to drive the 113 Ω load and, therefore, limits at 6 V p-p. This means that the input limits at 3 V p-p. The gain of the VGA is adjusted using the fully differential control inputs, GNHx and GNLO. The GNLO pin is internally connected to all four channels and must be biased externally. Under typical conditions, the GNLO pin is grounded. The gain high control pins (GNHx) are independent for each channel. The gain slope is nominally 20 dB/V. With GNLO connected to ground, each GNHx input can have a voltage applied from VNEG to VPOS without gain foldover. To make use of the full gain range of the VGA, the nominal gain control voltage needed at GNHx is ±0.65 V relative to the voltage applied to GNLO. At the lowest supply voltage of ±2.5 V, the pin GNLO should always be grounded. With increasing supply, the common-mode range of the gain control interface increases. This means that GNLO can be anywhere within ±1.2 V at ±3.3 V supplies and ±2.8 V at ±5 V supplies. Table 5. Gain Control Input Range Supply Voltage (V) ±5 ±3.3 ±2.5 GNLO Voltage Range (V) ±2.8 ±1.2 0 VGAIN Range (V) ±0.65 ±0.65 ±0.65 For example, at ±3.3 V supplies, the outputs of a single-supply unipolar DAC, such as the 10-bit, 4-channel AD5314, can be used to drive the GNHx pins directly, in conjunction with using the ADR318 1.8 V reference to bias the GNLO pin at VREF/2 = 0.9. Because the GNLO pin sources only about 1.2 μA for the four channels (~300 nA per channel, the same as for the GNHx pins), a simple resistive divider is generally adequate to set the voltage at the GNLO input. The short-circuit input referred noise at maximum VGA gain is about 2.3 nV/√Hz, and this accounts for all of the amplifiers and gain setting resistors. When measuring the input referred noise from the VGA output, the number is slightly lower at 2.1 nV/√Hz because the noise of the postamplifier is not included in the noise calculation. Rev. 0 | Page 28 of 40 AD8264 COMPOSITE GAIN IS +6dB TO +30dB OPPx NONINVERTING AMPLIFIER INPUT IPPx 1 IPNx INVERTING AMPLIFIER INPUT (NOT USED) POWER SUPPLIES 100Ω VGAx FIXED GAIN VGA AMPLIFIER 18dB (8×) PREAMP 6dB (2×) SINGLE-ENDED HS VGA OUTPUT 3 DIFFERENTIAL OUTPUT AMPLIFIER 6dB (2×) 1kΩ + ATTENUATOR – –24dB TO 0dB 2kΩ 747Ω VOLx 2 100Ω VPOS VNEG PREAMP OUTPUT (NOT USED) INTERPOLATOR 107Ω GAIN INTERFACE VOHx DIFFERENTIAL VGA OUTPUT 2kΩ BIAS 1kΩ COMM GNHx GNLO DIFFERENTIAL GAIN CONTROL INPUTS 2 DIFFERENTIAL OUTPUT NEVER LIMITS BECAUSE VGA LIMITS FIRST. DIFFERENTIAL OUTPUT SWING = 2x VGA OUT 5.2V p-p MAX @ ±2.5V 8V p-p MAX @ ±3.5V TO ±3.3V 15V p-p MAX @ ±5V 73nV/√Hz OFSx OUTPUT COMMON-MODE VOLTAGE ADJUSTMENT OFFSET ADJUST 3 2.6V p-p MAX @ ±2.5V 4V p-p MAX @ ±3.5V TO ±3.3V 7.5V p-p MAX @ ±5V 34nV/√Hz 07736-081 1 1.2V p-p MAX @ ±2.5V 2V p-p MAX @ ±3.5V TO ±3.3V 3V p-p MAX@ ±5V (PREAMP DRIVE LIMITED) 2.3nV/√Hz VOCM Figure 111. Single-Channel Block Diagram POST AMPLIFIER From the preamp input to the VGA output (VGAx), the gain is noninverting. As can be seen in Figure 111, the VGAx pins drive the positive input of the differential amplifier. The gain is inverting from the input of the preamp to the output pin at VOLx, and the gain is noninverting to the output VOHx. Other than the input from VGAx, each differential amplifier has two additional inputs: VOCM and OFSx. A common VOCM pin is shared among all four postamplifiers, while separate OFSx pins are provided for each channel. VOCM Pin The VOCM pin sets the common-mode voltage of the differential output and must be biased by an external voltage. When driving a dc-coupled ADC, the voltage typically comes from the ADC reference, as shown in the Applications Information section. If dc level shift is not necessary, the VOCM pin is connected to ground. OFSx Pins The OFSx pins are the inverting inputs of the differential post amplifiers and can be used to prebias a differential dc offset at the output. This is very useful when the input is a unipolar pulse because the user can set up the gain and the offset in such a way as to optimally map a unipolar pulse into the full-scale input of an ADC, while dc coupling throughout. If dc offset is not desired, then the OFSx pins should be connected to ground. However, the OFSx pins can also be used as separate inputs if the user wants this function. NOISE At maximum gain, the preamplifier is the primary contributor of noise and results in a differential output referred noise of roughly 73 nV/√Hz. The noise at the VGAx outputs is 34 nV/√Hz, and because of the gain-of-2, the VGA output noise is amplified by 6 dB to 68 nV/√Hz. The differential amplifier, including the gain setting resistors, contributes another 26 nV/√Hz, and the rms sum results in a total noise of 73 nV/√Hz. At the lowest gain, the noise at the VGA output is approximately 19 nV/√Hz, and when multiplied by two, it results in 38 nV/√Hz at the differential output; again, rms summing this with the 26 nV/√Hz of the differential amplifier causes the total output referred noise to be approximately 46 nV/√Hz. The input referred noise to the preamplifier at maximum gain is 2.3 nV/√Hz and increases with decreasing gain. Note that all noise numbers include the necessary gain setting resistors. Rev. 0 | Page 29 of 40 AD8264 APPLICATIONS INFORMATION A LOW CHANNEL COUNT APPLICATION CONCEPT USING A DISCRETE REFERENCE Figure 112 also includes the DAC output equation, which indicates that the output can vary between 0 V and VREF = 1.25 V. The AD8264 is particularly well suited for use in the analog front end of medical PET imaging systems. Figure 112 shows how the AD8264 may be used with the AD5314 (a 4-channel, 10-bit DAC) and the AD9222/AD9228 (an octal or quad, 12-bit ADC, respectively). The DAC sets the gain of the AD8264. Note that the full gain span of 24 dB is achieved with this setup because the gain control input range of the AD8264 is very close to 1.25 V. The GNLO pin must offset by 1.25/2 = 625 mV because the gain control input is bipolar around the voltage applied at GNLO. This is done with two 1 kΩ, 1% resistors. The approximately 1 μA of bias current flowing from the GNLO pin does not contribute a significant error because the basic gain error of the AD8264 is the limiting factor. The output of the AD8264 is ideal to drive an ADC like the 1.8 V quad-channel AD9228. If eight channels are needed, two AD8264s with the octal AD9222 ADC achieve the same thing. The same resistive divider can be used for two AD8264s because the bias current flowing is now ~2 μA, but this still only introduces an error of 1 mV with ideally matched resistors. With 20 dB/V gain scaling, this is a gain error of only 0.02 dB, which is much smaller than the fundamental gain error of the AD8264 (typically ~0.2 dB). The single-ended-to-differential amplifier of the AD8264 amplifies the VGA output signal by 6 dB and can provide the required dc bias of the AD9222/AD9228, as shown in Figure 112. The ADC is connected with the default internal reference because the SENSE pin is grounded. With this connection, the AD9222/ AD9228 VREF pin is an output that provides 1 V; this is then connected to the VOCM input of the AD8264, which sets the output common-mode voltage of the VOHx and VOLx pins to 1 V. This voltage is very close to the recommended optimal value of VDD/2 = 0.9 V. With this configuration, the ADC inputs are set to a full-scale (FS) of 2 V p-p. The ADR127 1.25 V precision reference with an input of 3.3 V can supply −2 mA to +5 mA from −40°C to +125°C, which is sufficient to drive both the resistive divider and the REFIN pin of the AD5314. The AD5314 is based on the string DAC concept, which means that the REFIN pin looks like a resistor that is nominally 45 kΩ; this results in a current draw of 1.25V/45 kΩ = 28 μA. Even at the lowest specified resistance of 37 kΩ, this is still only a current of 34 μA. Therefore, the total current draw from the ADR127 is the 625 μA of the resistive divider plus ~30 μA, which equals ~655 μA, well below the 5 mA maximum current. Note that the ADC VREF should not drive many loads; therefore, for multiple AD8264s, the VREF should be buffered. ADR127 NC 6 3 VIN 0.1µF NC 5 VOUT 4 1.25V V ×D VOUT = REFIN 2N 1µF +3.3V 10µF 625mV RS VPOS IPPx RTERM GNLO AD8264 0.1µF GND VOUTD VGA OUTPUTS TO OTHER SIGNAL PROCESSING RFILT 0.1µF VOUTB VOUTC ~250nA EACH VGAx –3.3V VOUTA GNH1 GNH2 GNH3 GNH4 VNEG VOCM OFSx VOHx VOLx 10µF DAC AD5314 ~1µA 1kΩ 1% +3.3V REFIN VDD 1kΩ 1% VOUT RANGE = 0V TO 1.25V EACH +1.8V FS = 2V p-p CFILT RFILT OUTPUT COMMON-MODE VOLTAGE = 1V VOHx = 1V, VOLx = 1V; VOFS = 0V VIN – x VDD ADC AD9222/ AD9228 GND VIN + x VREF SENSE SENSE GROUNDED: VREF = 1V 07736-082 2 GND 625µA 1 NC +3.3V Figure 112. Application Concept of the AD8264 with the AD5314 10-Bit DAC and the AD9222/AD9228 12-Bit ADC Rev. 0 | Page 30 of 40 AD8264 Figure 113 shows how the AD8264 is connected in a PET application. The PMT generates a negative-going current pulse that results in a voltage pulse at the preamplifier input and a differential output pulse on VOLx and VOHx. A DC CONNECTED CONCEPT EXAMPLE The dc connected concept example in Figure 113 is an application with the 40-channel AD5381, 3 V, 12-bit DAC. The main difference between this example and Figure 112 is that, for the same ADR127 1.25 V reference, the full-scale output of the DAC is from 0 V to 2 × VREFIN = 2.5 V. Two options for gain control include the following: • Use the same circuit as in Figure 112 but use only half the DAC output voltage from 0 V to 1.25 V. This is the simplest solution, requiring the fewest extra components. Note that the overall gain resolution increases by one bit to 11 bits over the 10-bit AD5314. Ground GNLO and scale the DAC output so that the GNHx inputs vary from −0.652 V to +0.625 V. Figure 113 shows a possible circuit implementation using a divider between the DAC output and a −1.25 V reference. The full-scale input of the converter is 0 V to 2 V, with a commonmode of 1 V. Match the VOCM voltage of the AD8264 to the ADC common mode (VREF = 1 V), and the two devices can be connected directly using an appropriate level of the antialiasing filter. The PMT signal is 0 V to −0.1 V. With a gain of 20× (26 dB), the AD8264 output signal range is 2 V p-p. Prebias the signal negative by −0.5 V using the AD8264 OFSx inputs, which sets VOHx = 1.5 V and VOLx = 0.5 V for VOCM = 1 V. The output is perfectly matched to the input of the ADC. GNLO cannot simply be increased to 1.25 V because, for a given supply voltage, GNLO has a limited voltage range to achieve the full gain span (see Table 5). However, a third possibility is to use another voltage that is between 1.2 V and 625 mV on GNLO, such as 1 V. In this case, the DAC must vary from 0.375 V to 1.625 V to achieve the fully specified gain range. Note that, by connecting VOLx to the positive ADC input and VOHx to the negative ADC input, the negative input pulse is inverted automatically. The VGAx output is still a negative pulse, amplified by 20 dB for this example. Note the gain limits when the differential gain control exceeds ±0.625 V, either to 6 dB or to 30 dB. If the differential gain control input voltage is exceeded, no gain foldover occurs. ADR127 +3.3V 1 NC NC 6 2 GND NC 5 3 VIN VOUT 4 0.1µF VREF = 1.25V VOUT = 1µF +3.3V 10µF REFIN VDD EXAMPLE 0V SCALE CIRCUIT –0.1V 2N VARIES FROM 12.5 TO 32.5µA TO 9 OTHER AD8264s GND VOUT39 +3.3V VPOS IPPx 100Ω GNLO AD8264 PMT SCALE CIRCUIT SCALE CIRCUIT SCALE CIRCUIT SCALE CIRCUIT VGA OUTPUTS TO OTHER SIGNAL PROCESSING VGAx VNEG VOCM OFSx VOHx VOLx RFILT VIN + x CFILT VOFS = –0.5V 10µF ADC VDD AD9222/ AD9228 GND 0.1µF 49.9kΩ 1% 0.1µF SCALE CIRCUIT +3.3V +1.8V 49.9kΩ 1% GNH1 10µF 0.1µF AD8663 –3.3V VIN – x VREF SENSE RFILT OUTPUT COMMON-MODE VOLTAGE = 1V VOHx = 1.5V, VOLx = 0.5V; VOFx = –0.5V 49.9kΩ 1% –1.25V FS = 2V p-p –3.3V 49.9kΩ GNH4 ~250nA 1% –625mV TO 49.9kΩ +625mV 1% VREF = 1.25V 49.9kΩ 1% ~250nA EACH GNH1 GNH2 GNH3 GNH4 VOLTAGE FROM DAC AD5381 = 0 TO 2.5V VOUT0 VOUT39 VOUT RANGE = 0V TO 1.25V EACH VOUT0 VOUT1 VOUT2 VOUT4 DAC AD5381 2 × VREFIN × D 0.1µF SENSE GROUNDED: VREF = 1V Figure 113. Concept Application of AD8264 with 40-Channel AD5381 12-Bit, 3 V DAC and AD9222/AD9228 12-Bit ADC Rev. 0 | Page 31 of 40 07736-083 • To fully appreciate the advantages of the AD8264, note the common-mode and polarity conversion afforded. The AD9228, as with most modern ADCs, is a low voltage, single-polarity device. Recall that the PMT is a high voltage device that yields a negative pulse. To map the pulse to the input range of the ADC, the pulse must be inverted, shifted, and amplified to the full input range of the ADC. This is done by using the gain control, signal offset, and common-mode features of the AD8264. AD8264 VOUT RANGE = 0V TO 1.25V EACH +3.3V +3.3V VOUT0 VOUT1 VOUT3 VOUT4 DVDD AVDDx PARALLEL INTERFACE TO PC CONTROL DAC AD5381 TO 9 OTHER AD8264s EVAL BOARD VOUT39 +2.5V +3.3V GNH1 VPOS GNH2 GNH3 GNH4 DGND AGNDx VNEG VOHx EVAL BOARD GNLO VPOS –INx VOLx AD8264 VGA IPPx TO SWITCHING POWER SUPPLY –3.3V VGA OUTPUTS TO OTHER SIGNAL PROCESSING +INx USB 2.0 TO PC ADI VISUAL ANALOG ANALYSIS SOFTWARE ADC AD9228 EVAL KIT VGAx OFSx VOCM +1.0V VREF GNLO = 625mV OFSx = −0.5V VOCM = 1.0V –0.1V PULSE GENERATOR INx 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 50 100 150 200 SAMPLES 250 07736-084 0V VOLTAGE (V) INPUT EXAMPLES REFIN (ON BOARD) 300 07736-085 Figure 114. Evaluation Setup for DC-Coupled Analog Front-End Pulse Processing Application Using the AD8264 Figure 115. AD5381 Evaluation Software A convenient method of verifying and customizing the signal chains shown in Figure 112 or Figure 113 is by ordering the corresponding evaluation boards available on www.analog.com. The AD8264-EVALZ is a platform through which the user can quickly become familiar with the features and performance capabilities of the AD8264. See the Evaluation Board section for more information. The EVAL-AD5381EB (40-channel DAC) includes a parallel PC interface and software evaluation program to control the DAC. The AD5381evaluation software allows the user to configure and program such DAC parameters as input codes, offset level, and output range based on a 2.5 V or 1.25 V reference. For example, as shown in Figure 114, the reference can be set to 1.25 V, with a 0 V to 1.25 V output range to drive the GNHx inputs. The ADC evaluation kit includes the AD9228-65EBZ board and HSC-ADC-FIFO5 board to decode the ADC output. It also leverages the capabilities of VisualAnalog®, powerful simulation and data analysis software that enables the user to run FFTs and to do real-time capture of the output levels. Rev. 0 | Page 32 of 40 AD8264 +3.3V +3.3V DVDD AVDDx PARALLEL INTERFACE TO PC CONTROL DAC AD5381 VOUT RANGE = 0V TO 1.25V EACH VOUT0 VOUT1 VOUT3 VOUT4 TO 9 OTHER AD8264S EVAL BOARD VOUT39 +2.5V +3.3V GNH1 VPOS GNH2 GNH3 GNH4 DGND AGNDx VNEG VOHx EVAL BOARD GNLO VPOS –INx VOLx AD8264 VGA IPPx TO SWITCHING POWER SUPPLY –3.3V VGA OUTPUTS TO OTHER SIGNAL PROCESSING +INx USB 2.0 TO PC ADI VISUAL ANALOG ANALYSIS SOFTWARE ADC AD9228 EVAL KIT VGAx OFSx VOCM +1.0V VREF GNLO = 625mV INx AC SOURCE VOCM = 1.0V 0 –15 –30 –45 –60 –75 –90 –105 –120 –135 –150 + 2 1.5M 3.0M 4.5M 6.0M 7.5M 9.0M 10.5M Figure 116. Evaluation Setup for AC Signal Processing Application Using the AD8264 Rev. 0 | Page 33 of 40 3 4 07736-086 INPUT EXAMPLES REFIN (ON BOARD) AD8264 EVALUATION BOARD Analog Devices, Inc. provides evaluation boards to customers as a support service so that the circuit designer can become familiar with the device in the most efficient way possible. The AD8264 evaluation board provides a fast, easy, and convenient means to assess the performance of the AD8264 before going through the hassle and expense of design and layout of a custom board. The board is shipped fully assembled and tested, and it provides basic functionality as shipped. Standard connectors enable the user to attach standard lab test equipment without having to wait for the rest of the design to be completed. Figure 117 shows a digital image of the top view, and Figure 118 shows the schematic diagram of the AD8264 evaluation board. CONNECTING AND USING THE AD8264-EVALZ The printed circuit board (PCB) artwork for all conductor and silkscreen layers is shown in Figure 119 to Figure 124. A description of a typical test setup can be found in the Applications Information section. The PCB artwork can be used as a guide for circuit layout and placement of parts. This is particularly useful for multiple function circuits with many pins, requiring multiple passive components. Apply input signals to any of the preamps at the SMA connectors, IN1 through IN4. These connectors are terminated with 50 Ω to accommodate typical signal generator analyzer voltage source impedances. The gain of the AD8264 preamps is fixed at 6 dB (2×) and can be monitored at the SMA connectors, OP1_2 and OP3_4, if desired. Note that there are output selector switches for each pair of preamps and 453 Ω resistors in series with the preamp outputs. The AD8264 operates with bipolar power supplies from ±2.5 V dc to ±5 V dc. Make sure the current capacity is ≥400 mA. Connect a ground reference from the supplies to any of the black test loops, the positive supply to the red test loop (+V), and the negative supply to the blue test loop (−V). 07736-087 Notice that the board is shipped with jumpers installed on the 2-pin headers marked GN1_2, GN3_4, OFS_12, OFS_34, and VOCM. If these jumpers are missing, the offset and commonmode functions float high, substantially increasing the quiescent current of the board. Figure 117. Digital Image of the AD8264-EVALZ (Top View) Rev. 0 | Page 34 of 40 AD8264 GN12 +V –V + C34 10µF R10 DNI GNLO IN_1 R51 0Ω 3 IN4 VGA1 OFS2 OFS1 PIN 0: EXPOSED PADDLE 6 IPP3 VGA3 7 IPN3 VOL3 8 VOH3 9 OPP4 VOH4 IPN4 R29 DNI 11 R72 0Ω 12 13 R80 0Ω R12 DNI 14 R79 0Ω 15 16 17 18 R70 0Ω C23 0.1µF R28 DNI C22 0.1µF C21 0.1µF OFS3 10 VGA4 OPP3 IN_4 R17 49.9Ω VNEG VGA2 OFS4 OPP34 VPOS 5 IPP2 OP34 R19 DNI GNLO VOL2 IPP4 OP3_4 R6 453Ω IPN2 VNEG R20 DNI VOH2 PIN 0 EXPOSED PADDLE VPOS R25 DNI OPP2 19 R71 0Ω R1 453Ω VGA1 31 VOH1 VOCM R46 49.9Ω 4 35 VGA1 R47 R48 0Ω 0Ω 34 33 32 OPP1 GNH3 R78 0Ω OFS_12 VOL1 GNH4 R23 R22 DNI DNI IN_3 IN3 C19 0.1µF R9 DNI IPN1 COMM IN_2 2 COMM IPP1 1 R31 DNI IN2 C20 0.1µF 36 GNH2 40 R24 DNI R45 49.9Ω R49 R86 0Ω 0Ω 39 38 37 GNH1 OPP12 R73 0Ω L2 FB C24 0.1µF R11 49.9Ω OP1_2 C33 + 10µF L1 FB R32 DNI GN1_2 R7 OP12 453Ω OFS12 +V GND1 GND2 GND3 GND4 GND5 GND6 IN1 –V VOL4 30 R55 0Ω 29 R56 0Ω 28 R58 0Ω 27 R57 0Ω VOUT_1 VOUT_2 26 VGA2 R69 453Ω 25 VGA3 R67 453Ω VGA2 24 R66 0Ω 23 R65 0Ω 22 R63 0Ω 21 R64 0Ω VOUT_4 R8 453Ω VGA4 20 VGA3 VOUT_3 VGA4 R16 DNI OFS_34 GN3_4 L3 FB VOCM GN34 L4 FB +V –V OFS34 07736-088 VOCM Figure 118. AD8264-EVALZ Schematic The SMA connectors, VGA1 through VGA4, enable signal monitoring at these nodes, with 453 Ω resistors for protecting the device. These resistors can be shorted at the discretion of the user if wide bandwidth is desired. The differential outputs are provided with 0.1” spacing 2-pin headers, which fit the low capacitance Tektronix differential scope probe P6045 model. Note that the gain control input of the AD8264 is differential. Each channel has its own gain control pin (GNHx); however, pairs of pins are connected together on the evaluation board and connected to a test loop. The 2-pin headers are provided for jumpers to connect the gain pins to ground, preventing the quiescent gain control voltage at the GNHx pins from floating high. The low sides of the gain controls for each channel are internally connected in the AD8264, and a 2-pin header with jumper is provided to connect this pin (GNLO) to ground as well. A similar arrangement of 2-pin headers is provided for the output offset voltage. As shipped, the offset pins are connected to ground, preventing the pins from floating high. For connecting to an ADC, remove the jumpers at the OF1_2 and OF3_4 headers and connect the appropriate offset voltage at the test loops, OF12 and OF34. If the VOCM pin is buffered, it can be connected to the reference of the ADC. Rev. 0 | Page 35 of 40 07736-091 07736-089 AD8264 07736-090 07736-092 Figure 121. Component Side Silk Screen Figure 119. Component Side Assembly Figure 122. Secondary Side Copper Figure 120. Component Side Copper Rev. 0 | Page 36 of 40 Figure 123. Ground Plane 07736-094 07736-093 AD8264 Figure 124. Power Plane Rev. 0 | Page 37 of 40 AD8264 OUTLINE DIMENSIONS 6.00 BSC SQ 0.60 MAX 0.60 MAX TOP VIEW 0.50 BSC 5.75 BSC SQ 0.50 0.40 0.30 12° MAX 0.05 MAX 0.02 NOM 0.30 0.23 0.18 1 4.25 4.10 SQ 3.95 EXPOSED PAD (BOT TOM VIEW) 21 20 11 10 0.25 MIN 4.50 REF 0.80 MAX 0.65 TYP SEATING PLANE 40 0.20 REF COPLANARITY 0.08 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 072108-A PIN 1 INDICATOR 1.00 0.85 0.80 PIN 1 INDICATOR 31 30 COMPLIANT TO JEDEC STANDARDS MO-220-VJJD-2 Figure 125. 40-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 6 mm × 6 mm Body, Very Thin Quad (CP-40-1) Dimensions shown in millimeters ORDERING GUIDE Model AD8264ACPZ 1 AD8264ACPZ-R71 AD8264ACPZ-RL1 AD8264-EVALZ1 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 40-Lead LFCSP_VQ 40-Lead LFCSP_VQ, 7” Tape and Reel 40-Lead LFCSP_VQ, 13” Tape and Reel Evaluation Board Z = RoHS Compliant Part. Rev. 0 | Page 38 of 40 Package Option CP-40-1 CP-40-1 CP-40-1 Branding H1V H1V H1V AD8264 NOTES Rev. 0 | Page 39 of 40 AD8264 NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07736-0-5/09(0) Rev. 0 | Page 40 of 40