Revised April 2000 DM74S138 • DM74S139 Decoder/Demultiplexer General Description Features These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. ■ Designed specifically for high speed: The DM74S138 decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs. Two active-LOW and one active-HIGH enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. ■ Typical propagation delay time (3 levels of logic) Memory decoders Data transmission systems ■ DM74S138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception ■ DM74S139 contains two fully independent 2-to-4-line decoders/demultiplexers ■ Schottky clamped for high performance DM74S138 8 ns DM74S139 7.5 ns ■ Typical power dissipation DM74S138 245 mW DM74S139 300 mW The DM74S139 comprises two separate two-line-to-fourline decoders in a single package. The active-LOW enable input can be used as a data line in demultiplexing applications. All of these decoders/demultiplexers feature fully buffered inputs, presenting only one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and simplify system design. Ordering Code: Order Number Package Number Package Description DM74S138N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM74S139N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide © 2000 Fairchild Semiconductor Corporation DS006466 www.fairchildsemi.com DM74S138 • DM74S139 Decoder/Demultiplexer August 1986 DM74S138 • DM74S139 Connection Diagrams DM74S138 DM74S139 Function Tables DM74S138 Inputs Enable G1 DM74S139 Inputs Outputs Select Enable G2* C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Outputs Select G B A Y0 Y1 Y2 Y3 X H X X X H H H H H H H H H X X H H H H L X X X X H H H H H H H H L L L L H H H H L L L L L H H H H H H H L L H H L H H H L L L H H L H H H H H H L H L H H L H H L L H L H H L H H H H H L H H H H H L H L L H H H H H L H H H H H L H L L H H H H L H H H H L H L H H H H H H L H H H L H H L H H H H H H L H H L H H H H H H H H H H L * G2 = G2A + G2B H = HIGH level L = LOW level X = don’t care (either LOW or HIGH logic level) Logic Diagrams DM74S138 www.fairchildsemi.com DM74S139 2 Supply Voltage Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 7V Input Voltage 5.5V 0° C to +70°C Operating Free Air Temperature Range −65° C to +150° C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max 4.75 5 5.25 Units VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −1 mA IOL LOW Level Output Current 20 mA TA Free Air Operating Temperature 70 °C V 2 V 0 Electrical Characteristics over recommended operating free air temperature (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −18 mA VOH HIGH Level VCC = Min, IOH = Max Output Voltage VIL = Max, VIH = Min VOL LOW Level VCC = Min, IOL = Max Output Voltage VIH = Min, VIL = Max Min Typ (Note 2) Max −1.2 2.7 3.4 Units V V 0.5 V mA II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 IIH HIGH Level Input Current VCC = Max, VI = 2.7V 50 µA IIL LOW Level Input Current VCC = Max, VI = 0.5V −2 mA IOS Short Circuit Output Current VCC = Max (Note 3) −100 mA ICC Supply Current (DM74S138) VCC = Max (Note 4) 49 74 mA ICC Supply Current (DM74S139) VCC = Max (Note 4) 60 90 mA −40 Note 2: All typicals are at VCC = 5V, TA = 25°C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 4: ICC is measured with all outputs enabled and OPEN. 3 www.fairchildsemi.com DM74S138 • DM74S139 Absolute Maximum Ratings(Note 1) DM74S138 • DM74S139 DM74S138 Switching Characteristics at VCC = 5V and TA = 25°C RL = 280Ω Symbol tPLH Parameter Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output CL = 15 pF CL = 50 pF From (Input) Levels To (Output) of Delay Select to Output 2 7 9 ns Select to Output 2 10.5 14 ns Select to Output 3 12 14 ns Select to Output 3 12 15 ns Enable to Output 2 8 10 ns Enable to Output 2 11 14 ns Enable to Output 3 11 13 ns Enable to Output 3 11 14 ns Min Max Min Units Max DM74S139 Switching Characteristics at VCC = 5V and TA = 25°C RL = 280Ω Symbol tPLH Parameter Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output www.fairchildsemi.com CL = 15 pF CL = 50 pF From (Input) Levels To (Output) of Delay Select to Output 2 7.5 10 ns Select to Output 2 10 13 ns Select to Output 3 12 13 ns Select to Output 3 12 15 ns Enable to Output 2 8 10 ns Enable to Output 2 10 13 ns 4 Min Max Min Units Max DM74S138 • DM74S139 Decoder/Demultiplexer Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com