Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC (Commercial & Automotive Grade) Overview KEMET’s Ceramic Chip Capacitor Array in C0G dielectric is an advanced passive technology where multiple capacitor elements are integrated into one common monolithic structure. Array technology promotes reduced placement costs and increased throughput. This is achieved by alternatively placing one device rather than two or four discrete devices. Use of capacitor arrays also saves board space which translates into increased board density and more functions per board. Arrays consume only a portion of the space required for standard chips resulting in savings in inventory and pick/place machine positions. KEMET’s C0G dielectric features a 125°C maximum operating temperature and is considered “stable. "The Electronics Industries Alliance (EIA) characterizes C0G dielectric as a Class I material. Components of this classification are temperature compensating and are suited for resonant circuit applications or those where Q and stability of capacitance characteristics are required. C0G exhibits no change in capacitance with respect to time and voltage and boasts a negligible change in capacitance with reference to ambient temperature. Capacitance change is limited to ±30 ppm/ºC from −55°C to +125°C. For added reliability, KEMET's Flexible Termination technology has been incorporated in order to provides superior flex performance. This technology was developed to address flex cracks, which are the primary failure mode of MLCCs and typically the result of excessive tensile and shear stresses produced during board flexure and thermal cycling. Flexible Termination technology inhibits the transfer of board stress to the rigid body of the MLCC, therefore mitigating flex cracks which can result in low IR or short circuit failures. KEMET automotive grade array capacitors meet the demanding Automotive Electronics Council's AEC-Q200 qualification requirements. Click image above for interactive 3D content Ordering Information CA 06 4 Open PDF in Adobe Reader for full functionality X 104 K Ceramic Case Size Number of Specification/ Capacitance Capacitance Series Code (pF) Tolerance Array (L" x W")1 Capacitors 05 = 0508 06 = 0612 2=2 4=4 X = Flexible Termination Two significant digits + number of zeros J = ±5% K = ±10% M = ±20% 4 G A C TU Rated Voltage (VDC) Dielectric Failure Rate/ Design Termination Finish2 Packaging/ Grade (C-Spec) G = C0G A = N/A 8 = 10 4 = 16 3 = 25 5 = 50 1 = 100 2 = 200 C = 100% Matte Sn L = SnPb (5% minimum Pb content) See "Packaging C-Spec Ordering Options Table" below All previous reference to metric case dimension "1632" has been replaced with an inch standard reference of "0612". Please reference all new designs using the "0612" nomenclature. "CA064" replaces "C1632" in the ordering code. 2 Additional termination finish options may be available. Contact KEMET for details. 2 SnPb termination finish option is not available on automotive grade product. 1 One world. One KEMET © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 1 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Packaging C-Spec Ordering Options Table Packaging/Grade Ordering Code (C-Spec) Packaging Type Commercial Grade1 Bulk Bag 7" Reel/Unmarked 13" Reel (Embossed Plastic Tape)/Unmarked Not Required (Blank) TU 7210 Automotive Grade2 7" Reel 13" Reel/Embossed Plastic/Unmarked AUTO AUTO7210 Default packaging is "Bulk Bag". An ordering code C-Spec is not required for "Bulk Bag" packaging. The terms "Marked" and "Unmarked" pertain to laser marking option of capacitors. All packaging options labeled as "Unmarked" will contain capacitors that have not been laser marked. The option to laser mark is not available on these devices. For more information see "Capacitor Marking". 2 Reeling tape options (Paper or Plastic) are dependent on capacitor case size (L" x W") and thickness dimension. See "Chip Thickness/Tape & Reel Packaging Quantities" and "Tape & Reel Packaging Information". 2 For additional Information regarding "AUTO" C-Spec options, see "Automotive C-Spec Information". 2 All Automotive packaging C-Specs listed exclude the option to laser mark components. The option to laser mark is not available on these devices. For more information see "Capacitor Marking". 1 1 Benefits • • • • • • • −55°C to +125°C operating temperature range Superior flex performance (up to 5 mm) Saves both circuit board and inventory space Reduces placement costs and increases throughput Lead (Pb)-free, RoHS and REACH compliant EIA 0508 (2-element) and 0612 (4-element) case sizes DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, and 200 V • • • • Capacitance offerings ranging from 10 pF to 2,200 pF Available capacitance tolerances of ±5%, ±10%, and ±20% Non-polar device, minimizing installation concerns 100% pure matte tin-plated termination finish allowing for excellent solderability • SnPb termination finish option available upon request (5% Pb minimum) • Commercial and Automotive (AEC–Q200) grades available Applications Typical applications include those that can benefit from board area savings, cost savings and overall volumetric reduction such as telecommunications, computers, handheld devices and automotive. Flexible termination technology benefits applications subject to high levels of board flexure or temperature cycling. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 2 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Automotive C-Spec Information KEMET Automotive Grade products meet or exceed the requirements outlined by the Automotive Electronics Council. Details regarding test methods and conditions are referenced in document AEC–Q200, Stress Test Qualification for Passive Components. These products are supported by a Product Change Notification (PCN) and Production Part Approval Process warrant (PPAP). Automotive products offered through our distribution channel have been assigned an inclusive ordering code C-Spec, “AUTO”. This C-Spec was developed in order to better serve small and medium sized companies that prefer an automotive grade component without the requirement to submit a customer Source Controlled Drawing (SCD) or specification for review by a KEMET engineering specialist. This C-Spec is therefore not intended for use by KEMET’s OEM Automotive customers and are not granted the same “privileges” as other automotive C-Specs. Customer PCN approval and PPAP request levels are limited (see details below). Product Change Notification (PCN) The KEMET Product Change Notification system is used to communicate primarily the following types of changes: • Product/process changes that affect product form, fit, function, and/or reliability • Changes in manufacturing site • Product obsolescence Process/Product change Obsolescence* Days prior to implementation KEMET assigned Yes (with approval and sign off) Yes 180 days Minimum AUTO Yes (without approval) Yes 90 days Minimum 1 1 Customer Notification due to: KEMET Automotive C-Spec KEMET assigned C-Specs require the submittal of a customer SCD or customer specification for review. For additional information contact KEMET. Production Part Approval Process (PPAP) The purpose of the Production Part Approval Process is: • To ensure that supplier can meet the manufacturability and quality requirements for the purchased parts. • To provide the evidence that all customer engineering design record and specification requirements are properly understood and fulfilled by the manufacturing organization. • To demonstrate that the established manufacturing process has the potential to produce the part 1 2 3 4 5 KEMET assigned ● ● ● ● ● AUTO ○ 1 1 PPAP (Product Part Approval Process) Level KEMET Automotive C-Spec ○ KEMET assigned C-Specs require the submittal of a customer SCD or customer specification for review. For additional information contact KEMET. ● Part Number specific PPAP available ○ Product family PPAP only © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 3 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Dimensions – Millimeters (Inches) 0508 (2-CAP) 0612 (4-CAP) Top View Top View Profile View Profile View BW BW P L T P Ref L CL W BL CL P Ref T BL W P EIA Size Code Metric Size Code L Length W Width BW Bandwidth BL Bandlength 0508 1220 1.30 (0.051) ±0.15 (0.006) 2.10 (0.083) ±0.15 (0.006) 0.53 (0.021) ±0.08 (0.003) 0612 1632 1.60 (0.063) ±0.20 (0.008) 3.20 (0.126) ±0.20 (0.008) 0.40 (0.016) ±0.20 (0.008) 0.30 (0.012) ±0.20 (0.008) See Table 2 for Thickness 0.30 (0.012) ±0.20 (0.008) T Thickness P Pitch P Reference 1.00 (0.039) ±0.10 (0.004) 0.50 (0.020) ±0.10 (0.004) 0.80 (0.031) ±0.10 (0.004) 0.40 (0.016) ±0.05 (0.002) Qualification/Certification Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are referenced in Table 4, Performance & Reliability. Automotive Grade products meet or exceed the requirements outlined by the Automotive Electronics Council. Details regarding test methods and conditions are referenced in document AEC–Q200, Stress Test Qualification for Passive Components. For additional information regarding the Automotive Electronics Council and AEC–Q200, please visit their website at www.aecouncil.com. Environmental Compliance Lead (Pb)-free, RoHS, and REACH compliant without exemptions (excluding SnPb termination finish option). © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 4 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Electrical Parameters/Characteristics Item Parameters/Characteristics Operating Temperature Range Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC) Aging Rate (Maximum % Capacitance Loss/Decade Hour) Dielectric Withstanding Voltage (DWV) 1 2 Dissipation Factor (DF) Maximum Limit at 25ºC 3 Insulation Resistance (IR) Limit at 25°C −55°C to +125°C ±30 ppm/ºC 0% 250% of rated voltage (5±1 seconds and charge/discharge not exceeding 50 mA) 0.1% 1,000 megohm microfarads or 100 GΩ (Rated voltage applied for 120±5 seconds at 25°C) DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the capacitor. 2 Capacitance and dissipation factor (DF) measured under the following conditions: 1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF 1 kHz ±50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF 3 To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits. Capacitance and Dissipation Factor (DF) measured under the following conditions: Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as Automatic Level Control (ALC). The ALC feature should be switched to "ON." 1 Post Environmental Limits High Temperature Life, Biased Humidity, Moisture Resistance Dielectric Rated DC Voltage Capacitance Value Dissipation Factor (Maximum %) Capacitance Shift C0G All All 0.5 0.3% or ±0.25 pF Insulation Resistance 10% of Initial Limit © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 5 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Table 1 – Capacitance Range/Selection Waterfall (0508 – 0612 Case Sizes) Case Size/ Series Capacitance Capacitance Voltage Code Code Rated Voltage (VDC) 10 pF 12 pF 15 pF 18 pF 22 pF 27 pF 33 pF 39 pF 47 pF 56 pF 68 pF 82 pF 100 pF 120 pF 150 pF 180 pF 220 pF 270 pF 330 pF 390 pF 470 pF 560 pF 680 pF 820 pF 1,000 pF 1,100 pF 1,200 pF 1,300 pF 1,500 pF 1,600 pF 1,800 pF 2,000 pF 2,200 pF 100 120 150 180 220 270 330 390 470 560 680 820 101 121 151 181 221 271 331 391 471 561 681 821 102 112 122 132 152 162 182 202 222 Capacitance Capacitance Code J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J C0508X (CA052X 2-Cap Case Size) C0612X (CA064X 4-Cap Case Size) 8 4 3 5 1 8 4 3 5 1 2 10 16 25 50 100 10 16 25 50 100 200 Capacitance Tolerance Product Availability and Chip Thickness Codes See Table 2 for Chip Thickness Dimensions K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA 16 25 50 100 200 4 3 5 1 2 M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA PA Rated Voltage (VDC) 10 16 25 50 100 10 Voltage Code 8 4 3 5 1 8 Case Size/Series C0508X (CA052X 2-Cap Case Size) C0612X (CA064X 4-Cap Case Size) KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage capability within the same form factor (configuration and dimensions). These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 6 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Table 2A – Chip Thickness/Tape & Reel Packaging Quantities Paper Quantity Plastic Quantity Thickness Code Case Size Thickness ± Range (mm) 7" Reel 13" Reel 7" Reel 13" Reel PA MA 0508 0612 0.80 ± 0.10 0.80 ± 0.10 0 0 0 0 4,000 4,000 10,000 10,000 Package quantity based on finished chip thickness specifications. Table 2B – Bulk Packaging Quantities Loose Packaging Packaging Type Bulk Bag (default) Packaging C-Spec N/A 2 Case Size Packaging Quantities (pieces/unit packaging) 1 EIA (in) Metric (mm) 0402 0603 0805 1206 1210 1808 1812 1825 2220 2225 1005 1608 2012 3216 3225 4520 4532 4564 5650 5664 Minimum Maximum 50,000 1 20,000 The "Packaging C-Spec" is a 4 to 8 digit code which identifies the packaging type and/or product grade. When ordering, the proper code must be included in the 15th through 22nd character positions of the ordering code. See "Ordering Information" section of this document for further details. Commercial Grade product ordered without a packaging C-Spec will default to our standard "Bulk Bag" packaging. Contact KEMET if you require a bulk bag packaging option for Automotive Grade products. 2 A packaging C-Spec (see note 1 above) is not required for "Bulk Bag" packaging (excluding Anti-Static Bulk Bag and Automotive Grade products). The 15th through 22nd character positions of the ordering code should be left blank. All product ordered without a packaging C-Spec will default to our standard "Bulk Bag" packaging. 1 © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 7 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Table 3 – Chip Capacitor Array Land Pattern Design Recommendations per IPC-7351 EIA SIZE CODE METRIC SIZE CODE Density Level A: Maximum (Most) Land Protrusion (mm) C Y X P V1 Density Level B: Median (Nominal) Land Protrusion (mm) V2 C Y X P V1 Density Level C: Minimum (Least) Land Protrusion (mm) V2 C Y X P V1 V2 0508/CA052 1220 1.60 1.00 0.55 1.00 3.50 3.30 1.50 0.90 0.50 1.00 2.90 2.80 1.40 0.75 0.45 1.00 2.40 2.50 0612/CA064 1632 1.80 1.10 0.95 0.50 0.80 3.30 3.90 0.85 0.40 0.80 2.80 3.60 0.50 0.80 3.90 4.40 1.80 1.70 Density Level A: For low-density product applications. Provides a wider process window for reflow solder processes. Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reflow solder processes. Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualification testing based on the conditions outlined in IPC Standard 7351 (IPC–7351). Image below based on Density Level B for an EIA 0612 case size. V2 P X Y V1 C Grid Placement Courtyard © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 8 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Soldering Process Recommended Soldering Technique: • Solder reflow only Recommended Reflow Soldering Profile: KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual), convection, IR or vapor phase reflow techniques. Preheating of these components is recommended to avoid extreme thermal stress. KEMET’s recommended profile conditions for convection and IR reflow reflect the profile conditions of the IPC/ J-STD-020 standard for moisture sensitivity testing. These devices can safely withstand a maximum of three reflow passes at these conditions. Termination Finish SnPb 100% Matte Sn Ramp-Up Rate (TL to TP) 100°C 150°C 60 – 120 seconds 3°C/second maximum 150°C 200°C 60 – 120 seconds 3°C/second maximum Liquidous Temperature (TL) 183°C 217°C Time Above Liquidous (tL) 60 – 150 seconds 60 – 150 seconds Peak Temperature (TP) 235°C 260°C Preheat/Soak Temperature Minimum (TSmin) Temperature Maximum (TSmax) Time (tS) from TSmin to TSmax TP TL Temperature Profile Feature tP Maximum Ramp Up Rate = 3ºC/sec Maximum Ramp Down Rate = 6ºC/sec tL Tsmax Tsmin 25 ts 25ºC to Peak Time Time Within 5°C of Maximum Peak Temperature (tP) 20 seconds 30 seconds maximum maximum 6°C/second 6°C/second Ramp-Down Rate (TP to TL) maximum maximum Time 25°C to Peak 6 minutes 8 minutes Temperature maximum maximum Note 1: All temperatures refer to the center of the package, measured on the capacitor body surface that is facing up during assembly reflow. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 9 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Table 4 – Performance & Reliability: Test Methods and Conditions Stress Reference Test or Inspection Method Terminal Strength JIS–C–6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds. Board Flex JIS–C–6429 Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for C0G. Flexible termination system – 3.0 mm (minimum). Magnification 50 X. Conditions: Solderability J–STD–002 a) Method B, 4 hours at 155°C, dry heat at 235°C b) Method B at 215°C category 3 c) Method D, category 3 at 260°C Temperature Cycling JESD22 Method JA–104 Biased Humidity MIL–STD–202 Method 103 Moisture Resistance Thermal Shock High Temperature Life Storage Life Vibration Mechanical Shock Resistance to Solvents MIL–STD–202 Method 106 MIL–STD–202 Method 107 MIL–STD–202 Method 108 /EIA–198 MIL–STD–202 Method 108 MIL–STD–202 Method 204 MIL–STD–202 Method 213 MIL–STD–202 Method 215 1,000 Cycles (−55°C to +125°C). Measurement at 24 hours +/− 4 hours after test conclusion. Load Humidity: 1,000 hours 85°C/85% RH and rated voltage. Add 100 K ohm resistor. Measurement at 24 hours +/− 4 hours after test conclusion. Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor. Measurement at 24 hours +/− 4 hours after test conclusion. t = 24 hours/cycle. Steps 7a and 7b not required. Measurement at 24 hours +/− 4 hours after test conclusion. −55°C/+125°C. Note: Number of cycles required – 300, maximum transfer time – 20 seconds, dwell time – 15 minutes. Air – Air. 1,000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 2 X rated voltage applied. 150°C, 0 VDC for 1,000 hours. 5 g's for 20 min., 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB 0.031" thick 7 secure points on one long side and 2 secure points at corners of opposite sides. Parts mounted within 2" from any secure point. Test from 10 – 2,000 Hz Figure 1 of Method 213, Condition F. Add aqueous wash chemical, OKEM Clean or equivalent. Storage & Handling Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term storage. In addition, packaging materials will be degraded by high temperature–reels may soften or warp and tape peel force may increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum storage humidity not exceed 70% relative humidity. Temperature fluctuations should be minimized to avoid condensation on the parts and atmospheres should be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of receipt. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 10 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Construction Detailed Cross Section Inner Electrodes (Ni) Termination Finish (100% Matte Sn / SnPb - 5% Pb min) Barrier Layer (Ni) Epoxy Layer (Ag) End Termination/ External Electrode (Cu) End Termination/ Dielectric Material (CaZrO3) External Electrode (Cu) Epoxy Layer (Ag) Barrier Layer (Ni) Termination Finish (100% Matte Sn / SnPb - 5% Pb min) Inner Electrodes (Ni) Capacitor Marking (Optional): Laser marking option is not available on: • • • • C0G, Ultra Stable X8R and Y5V dielectric devices EIA 0402 case size devices EIA 0603 case size devices with Flexible Termination option. KPS Commercial and Automotive grade stacked devices. These capacitors are supplied unmarked only. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 11 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Tape & Reel Packaging Information KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on reeling quantities for commercial chips. Bar Code Label Anti-Static Reel ® Embossed Plastic* or Punched Paper Carrier. ET KEM Chip and KPS Orientation in Pocket (except 1825 Commercial, and 1825 and 2225 Military) Sprocket Holes Embossment or Punched Cavity 8 mm, 12 mm or 16 mm Carrier Tape 178 mm (7.00") or 330 mm (13.00") Anti-Static Cover Tape (.10 mm (.004") Maximum Thickness) *EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only. Table 5 – Carrier Tape Configuration, Embossed Plastic & Punched Paper (mm) EIA Case Size Tape Size (W)* Embossed Plastic 7" Reel 13" Reel Pitch (P1)* Punched Paper 7" Reel 13" Reel Pitch (P1)* 01005 – 0402 8 2 2 0603 8 2/4 2/4 0805 8 4 4 4 4 1206 – 1210 8 4 4 4 4 1805 – 1808 12 4 4 ≥ 1812 12 8 8 KPS 1210 12 8 8 KPS 1812 & 2220 16 12 12 Array 0508 & 0612 8 4 4 *Refer to Figures 1 & 2 for W and P1 carrier tape reference locations. *Refer to Tables 6 & 7 for tolerance specifications. New 2 mm Pitch Reel Options* Packaging Ordering Code (C-Spec) Packaging Type/Options C-3190 C-3191 C-7081 C-7082 Automotive grade 7" reel unmarked Automotive grade 13" reel unmarked Commercial grade 7" reel unmarked Commercial grade 13" reel unmarked * 2 mm pitch reel only available for 0603 EIA case size. 2 mm pitch reel for 0805 EIA case size under development. Benefits of Changing from 4 mm to 2 mm Pitching Spacing • Lower placement costs • Double the parts on each reel results in fewer reel changes and increased efficiency • Fewer reels result in lower packaging, shipping and storage costs, reducing waste © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 12 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Figure 1 – Embossed (Plastic) Carrier Tape Dimensions P2 T T2 ØDo [10 pitches cumulative tolerance on tape ± 0.2 mm] Po E1 Ao F Ko B1 E2 Bo S1 W P1 T1 Center Lines of Cavity ØD Cover Tape B 1 is for tape feeder reference only, including draft concentric about B o. 1 Embossment For cavity size, see Note 1 Table 4 User Direction of Unreeling Table 6 – Embossed (Plastic) Carrier Tape Dimensions Metric will govern Constant Dimensions — Millimeters (Inches) Tape Size D0 8 mm 12 mm 1.5 +0.10/-0.0 (0.059 +0.004/0.0) 16 mm D1 Minimum Note 1 1.0 (0.039) 1.5 (0.059) R Reference S1 Minimum T Note 2 Note 3 Maximum 25.0 (0.984) 1.75 ±0.10 4.0 ±0.10 2.0 ±0.05 0.600 0.600 (0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002) (0.024) (0.024) 30 (1.181) E1 P0 P2 T1 Maximum 0.100 (0.004) Variable Dimensions — Millimeters (Inches) Tape Size Pitch 8 mm Single (4 mm) 12 mm Single (4 mm) & Double (8 mm) 16 mm Triple (12 mm) B1 Maximum Note 4 4.35 (0.171) 8.2 (0.323) 12.1 (0.476) E2 Minimum 6.25 (0.246) 10.25 (0.404) 14.25 (0.561) F P1 3.5 ±0.05 4.0 ±0.10 (0.138 ±0.002) (0.157 ±0.004) 5.5 ±0.05 8.0 ±0.10 (0.217 ±0.002) (0.315 ±0.004) 7.5 ±0.05 12.0 ±0.10 (0.138 ±0.002) (0.157 ±0.004) T2 Maximum 2.5 (0.098) 4.6 (0.181) 4.6 (0.181) W Maximum 8.3 (0.327) 12.3 (0.484) 16.3 (0.642) A0,B0 & K0 Note 5 1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and hole location shall be applied independent of each other. 2. The tape with or without components shall pass around R without damage (see Figure 6). 3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b). 4. B1 dimension is a reference dimension for tape feeder clearance only. 5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that: (a) the component does not protrude above the top surface of the carrier tape. (b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed. (c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3). (d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4). (e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket. (f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 13 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Figure 2 – Punched (Paper) Carrier Tape Dimensions T Po ØDo [10 pitches cumulative tolerance on tape ± 0.2 mm] A0 F P1 T1 T1 Top Cover Tape W E2 B0 Bottom Cover Tape E1 G Cavity Size, See Note 1, Table 7 Center Lines of Cavity Bottom Cover Tape User Direction of Unreeling Table 7 – Punched (Paper) Carrier Tape Dimensions Metric will govern Constant Dimensions — Millimeters (Inches) Tape Size D0 E1 P0 P2 T1 Maximum G Minimum 8 mm 1.5 +0.10 -0.0 (0.059 +0.004 -0.0) 1.75 ±0.10 (0.069 ±0.004) 4.0 ±0.10 (0.157 ±0.004) 2.0 ±0.05 (0.079 ±0.002) 0.10 (0.004) Maximum R Reference Note 2 0.75 (0.030) 25 (0.984) Variable Dimensions — Millimeters (Inches) Tape Size Pitch 8 mm Half (2 mm) 8 mm Single (4 mm) E2 Minimum F P1 T Maximum W Maximum A0 B 0 6.25 (0.246) 3.5 ±0.05 (0.138 ±0.002) 2.0 ±0.05 (0.079 ±0.002) 4.0 ±0.10 (0.157 ±0.004) 1.1 (0.098) 8.3 (0.327) 8.3 (0.327) Note 1 1. The cavity defined by A0, B0 and T shall surround the component with sufficient clearance that: a) the component does not protrude beyond either surface of the carrier tape. b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed. c) rotation of the component is limited to 20° maximum (see Figure 3). d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4). e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements. 2. The tape with or without components shall pass around R without damage (see Figure 6). © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 14 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Packaging Information Performance Notes 1. Cover Tape Break Force: 1.0 Kg minimum. 2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be: Tape Width Peel Strength 8 mm 0.1 to 1.0 Newton (10 to 100 gf) 12 and 16 mm 0.1 to 1.3 Newton (10 to 130 gf) The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180° from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute. 3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA Standards 556 and 624. Figure 3 – Maximum Component Rotation ° T Maximum Component Rotation Top View Maximum Component Rotation Side View Typical Pocket Centerline Tape Maximum Width (mm) Rotation ( 8,12 20 16 – 200 10 Bo ° T) Typical Component Centerline Ao Figure 4 – Maximum Lateral Movement 8 mm & 12 mm Tape 0.5 mm maximum 0.5 mm maximum ° s Tape Width (mm) 8,12 16 – 56 72 – 200 Maximum Rotation ( 20 10 5 Figure 5 – Bending Radius Embossed Carrier 16 mm Tape ° S) Punched Carrier 1.0 mm maximum 1.0 mm maximum R © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com Bending Radius R C1016_C0G_ARRAY_SMD • 10/14/2016 15 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Figure 6 – Reel Dimensions Full Radius, See Note W3 (Includes flange distortion at outer edge) Access Hole at Slot Location (Ø 40 mm minimum) W2 D A (See Note) N C (Arbor hole diameter) B (see Note) (Measured at hub) W1 (Measured at hub) If present, tape slot in core for tape start: 2.5 mm minimum width x 10.0 mm minimum depth Note: Drive spokes optional; if used, dimensions B and D shall apply. Table 8 – Reel Dimensions Metric will govern Constant Dimensions — Millimeters (Inches) Tape Size A B Minimum C D Minimum 8 mm 178 ±0.20 (7.008 ±0.008) or 330 ±0.20 (13.000 ±0.008) 1.5 (0.059) 13.0 +0.5/-0.2 (0.521 +0.02/-0.008) 20.2 (0.795) 12 mm 16 mm Variable Dimensions — Millimeters (Inches) Tape Size N Minimum W1 W2 Maximum W3 50 (1.969) 8.4 +1.5/-0.0 (0.331 +0.059/-0.0) 12.4 +2.0/-0.0 (0.488 +0.078/-0.0) 16.4 +2.0/-0.0 (0.646 +0.078/-0.0) 14.4 (0.567) 18.4 (0.724) 22.4 (0.882) Shall accommodate tape width without interference 8 mm 12 mm 16 mm © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 16 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) Figure 7 – Tape Leader & Trailer Dimensions Embossed Carrier Carrier Tape Punched Carrier 8 mm & 12 mm only END Round Sprocket Holes START Top Cover Tape Elongated Sprocket Holes (32 mm tape and wider) Trailer 160 mm Minimum Components 100 mm Minimum Leader 400 mm Minimum Top Cover Tape Figure 8 – Maximum Camber Elongated sprocket holes (32 mm & wider tapes) Carrier Tape Round Sprocket Holes 1 mm Maximum, either direction Straight Edge 250 mm © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 17 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade) KEMET Electronic Corporation Sales Offices For a complete list of our global sales offices, please visit www.kemet.com/sales. Disclaimer All product specifications, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for checking and verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed. All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied. Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such applications, but are not intended to constitute – and KEMET specifically disclaims – any warranty concerning suitability for a specific customer application or use. The Information is intended for use only by customers who have the requisite experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no obligation or liability for the advice given or results obtained. Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage. Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other measures may not be required. KEMET is a registered trademark of KEMET Electronics Corporation. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1016_C0G_ARRAY_SMD • 10/14/2016 18