LINER LT3085 800ma single resistor rugged linear regulator with monitor Datasheet

LT3089
800mA Single Resistor
Rugged Linear Regulator
with Monitors
DESCRIPTION
FEATURES
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Extended Safe Operating Area
Maximum Output Current: 800mA
Stable with or without Input/Output Capacitors
Wide Input Voltage Range: 1.2V to 36V
Single Resistor Sets Output Voltage
Output Current Monitor: IMON = IOUT/5000
Junction Temperature Monitor: 1µA/°C
Output Adjustable to 0V
50µA SET Pin Current: 1% Initial Accuracy
Output Voltage Noise: 27µVRMS
Parallel Multiple Devices for Higher Current or
Heat Spreading
Programmable Current Limit
Reverse-Battery and Reverse-Current Protection
<1mV Load Regulation Typical Independent of VOUT
<0.001%/V Line Regulation Typical
Available in Thermally-Enhanced 12-Lead 4mm ×
4mm DFN, 16-Lead TSSOP, and 7-Lead DD-Pak
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The LT3089’s precision 50µA reference current source
allows a single resistor to program output voltage to
any level between zero and 34.5V. The current reference
architecture enables load regulation to be independent of
output voltage. The LT3089 is stable with or without input
and output capacitors.
The output current monitor (IOUT/5000) and die junction
temperature output (1µA/°C) provide system monitoring and debug capability. In addition, a single resistor
programs current limit.
Internal protection circuitry includes reverse-battery and
reverse-current protection, current limiting and thermal limiting. The LT3089 is offered in the 12-lead 4mm × 4mm DFN
and 16-lead TSSOP (both with exposed pad for improved
thermal performance), and 7-lead DD-Pak power package.
APPLICATIONS
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The LT®3089 is an 800mA low dropout linear regulator
designed for rugged industrial applications. Key features of
the IC are the extended safe operating area (SOA), output
current monitor, temperature monitor and programmable
current limit. The LT3089 can be paralleled for higher
output current or heat spreading. The device withstands
reverse input and reverse output-to-input voltages without
reverse current flow.
All Surface Mount Power Supply
Rugged Industrial Power Supply
Post Regulator for Switching Supplies
Low Output Voltage Supply
Intrinsic Safety Applications
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
SET Pin Current
50.5
Wide Safe Operating Area Supply
50.4
VIN
1µA/°C
50µA
+
–
IMON
TEMP
SET
1k
1k
30.1k
OUT
ILIM
10µF*
4.12k
499Ω*
IOUT
1.5V
0.75A
3089 TA01a
*OPTIONAL
SET PIN CURRENT (µA)
ILOAD/5000
50.3
IN
LT3089
ILOAD = 3mA
50.2
50.1
50.0
49.9
49.8
49.7
49.6
49.5
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3089 TA01b
3089f
For more information www.linear.com/LT3089
1
LT3089
ABSOLUTE MAXIMUM RATINGS
(Note 1) All voltages Relative to VOUT.
IN Pin to OUT Pin Differential Voltage......................±40V
SET Pin Current (Note 6)......................................±25mA
SET Pin Voltage (Relative to OUT, Note 6)............... ±10V
TEMP Pin Voltage (Relative to OUT)..................1V, –40V
ILIM Pin Voltage (Relative to OUT)..........................±0.2V
IMON Pin Voltage (Relative to OUT)....................1V, –40V
Output Short-Circuit Duration........................... Indefinite
Operating Junction Temperature Range (Note 2)
E-, I-Grades........................................ –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
FE, R Packages Only.......................................... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
OUT
1
16 OUT
OUT
2
15 IN
3
14 IN
OUT
1
12 IN
OUT
2
11 IN
OUT
OUT
3
10 IN
OUT
4
OUT
4
9 IN
OUT
5
ILIM
6
11 TEMP
SET
7
10 IMON
OUT
8
9
13
OUT
ILIM
5
8 TEMP
SET
6
7 IMON
DF PACKAGE
12-LEAD (4mm × 4mm) PLASTIC DFN
TJMAX = 125°C, θJA = 41°C/W, θJC = 1.6°C/W
EXPOSED PAD (PIN 13) IS OUT, MUST BE SOLDERED TO PCB
17
OUT
13 IN
12 IN
FRONT VIEW
TAB IS
OUT
NC
IN
TEMP
OUT
IMON
SET
ILIM
R PACKAGE
7-LEAD PLASTIC DD
OUT
FE PACKAGE
16-LEAD PLASTIC TSSOP
TJMAX = 125°C, θJA = 35°C/W, θJC = 2.3°C/W
EXPOSED PAD (PIN 17) IS OUT, MUST BE SOLDERED TO PCB
7
6
5
4
3
2
1
TJMAX = 125°C, θJA = 34°C/W, θJC = 3°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3089EDF#PBF
LT3089EDF#TRPBF
3089
12-Lead (4mm × 4mm) Plastic DFN
–40°C to 125°C
LT3089IDF#PBF
LT3089IDF#TRPBF
3089
12-Lead (4mm × 4mm) Plastic DFN
–40°C to 125°C
LT3089EFE#PBF
LT3089EFE#TRPBF
3089FE
16-Lead Plastic TSSOP
–40°C to 125°C
LT3089IFE#PBF
LT3089IFE#TRPBF
3089FE
16-Lead Plastic TSSOP
–40°C to 125°C
LT3089ER#PBF
LT3089ER#TRPBF
LT3089R
7-Lead Plastic DD-Pak
–40°C to 125°C
LT3089IR#PBF
LT3089IR#TRPBF
LT3089R
7-Lead Plastic DD-Pak
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
2
3089f
For more information www.linear.com/LT3089
LT3089
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. (Note 2)
PARAMETER
CONDITIONS
ISET
SET Pin Current
VOS
Offset Voltage
(VOUT – VSET)
ISET Load Regulation
VOS Load Regulation
(Note 7)
MIN
TYP
MAX
UNITS
VIN = 2V, ILOAD = 3mA
2V ≤ VIN ≤ 36V, 3mA ≤ ILOAD ≤ 800mA
l
49.5
48.75
50
50
50.5
51.25
µA
µA
VIN = 2V, ILOAD = 3mA
VIN = 2V, ILOAD = 3mA
l
–1.5
–3.5
0
0
1.5
3.5
mV
mV
∆ILOAD = 3mA to 800mA
∆ILOAD = 3mA to 800mA
Line Regulation
∆ISET
∆VOS
–0.1
nA
DF, FE Packages
l
–0.5
–3
mV
R Package
l
–1.5
–4
mV
∆VIN = 2V to 36V, ILOAD = 3mA
∆VIN = 2V to 36V, ILOAD = 3mA
1.5
0.001
nA/V
mV/V
Minimum Load Current (Note 3)
2V ≤ VIN ≤ 36V
l
1.1
3
Dropout Voltage (Note 4)
ILOAD = 100mA
ILOAD = 800mA
l
1.21
1.47
1.65
VIN = 5V, VSET = 0V, VOUT = –0.1V
l
0.8
1
l
155
175
l
130
160
Internal Current Limit
ILIM Programming Ratio
ILIM Minimum Output Current Resistance
mA
V
V
A
210
mA/kΩ
190
µA
300
IMON Full-Scale Output Current
ILOAD = 800mA
IMON Scale Factor
100mA ≤ ILOAD ≤ 800mA
Ω
200
IMON Operating Range
l
VOUT – 40V
µA/A
VOUT + 0.4V
TJ > 5°C
TEMP Output Current Absolute Error (Note 9)
0°C <TJ ≤ 125°C
125°C <TJ ≤ 150°C
Reference Current RMS Output Noise (Note 5)
10Hz ≤ f ≤ 100kHz
5.7
nARMS
Error Amplifier RMS Output Noise (Note 5)
ILOAD = 800mA, 10Hz ≤ f ≤ 100kHz, COUT =10µF,
CSET = 0.1µF
27
µVRMS
Ripple Rejection
VRIPPLE = 0.5VP-P, ILOAD = 0.1A, CSET = 0.1µF,
COUT=10µF, VIN = VOUT(NOMINAL) + 3V
f = 120Hz
f = 10kHz
f = 1MHz
90
75
20
dB
dB
dB
Thermal Regulation, ISET
10ms Pulse
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Unless otherwise specified, all voltages are with respect to VOUT.
The LT3089 is tested and specified under pulse load conditions such
that TJ ≈ TA. The LT3089E is tested at TA = 25°C and performance is
guaranteed from 0°C to 125°C. Performance of the LT3089E over the
full –40°C and 125°C operating temperature range is assured by design,
characterization, and correlation with statistical process controls. The
LT3089I is guaranteed over the full –40°C to 125°C operating junction
temperature range. High junction temperatures degrade operating
lifetimes. Operating lifetime is degraded at junction temperatures greater
than 125°C.
Note 3: Minimum load current is equivalent to the quiescent current of
the part. Since all quiescent and drive current is delivered to the output
of the part, the minimum load current is the minimum current required to
maintain regulation.
1
V
TEMP Output Current (Note 9)
–10
–15
75
µA/°C
10
15
0.003
µA
µA
%/W
Note 4: For the LT3089, dropout is specified as the minimum input-tooutput voltage differential required supplying a given output current.
Note 5: Adding a small capacitor across the reference current resistor
lowers output noise. Adding this capacitor bypasses the resistor shot
noise and reference current noise; output noise is then equal to error
amplifier noise (see Applications Information section).
Note 6: Diodes with series 400Ω resistors clamp the SET pin to the
OUT pin. These diodes and resistors only carry current under transient
overloads.
Note 7: Load regulation is Kelvin sensed at the package.
Note 8: This IC includes overtemperature protection that protects the
device during momentary overload conditions. Junction temperature
exceeds the maximum operating junction temperature when
overtemperature protection is active. Continuous operation above the
specified maximum operating junction temperature may impair device
reliability.
Note 9: The TEMP pin output current represents the average die junction
temperature. Due to power dissipation and thermal gradients across the
die, the TEMP pin output current measurement does not guarantee that
absolute maximum junction temperature is not exceeded.
3089f
For more information www.linear.com/LT3089
3
LT3089
TYPICAL PERFORMANCE CHARACTERISTICS
SET Pin Current
SET Pin Current
50.5
2.0
N = 1297
ILOAD = 3mA
50.4
TJ = 25°C unless otherwise specified.
ILOAD = 3mA
1.5
OFFSET VOLTAGE (mV)
50.3
SET PIN CURRENT (µA)
Offset Voltage (VOUT – VSET)
50.2
50.1
50.0
49.9
49.8
49.7
1.0
0.5
0
–0.5
–1.0
–1.5
49.6
49.5
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
49
49.5
50
50.5
SET PIN CURRENT DISTRIBUTION (µA)
–2.0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
51
3089 G02
3089 G01
Offset Voltage
1.0
N = 1297
3089 G03
Offset Voltage (VOUT
OUT – VSET
SET)
0.4
ILOAD = 3mA
0.8
0.0
OFFSET VOLTAGE (mV)
0.6
OFFSET VOLTAGE (mV)
Offset Voltage (VOUT
OUT – VSET
SET)
0.4
0.2
0.0
–0.2
–0.4
–0.4
TJ = 125°C
–0.8
TJ = 25°C
–1.2
–0.6
–0.8
–1
0
1
VOS DISTRIBUTION (mV)
–1.0
2
0
6
12
18
24
30
INPUT–TO–OUTPUT DIFFERENTIAL (V)
3089 G04
0
0.1
0.2
0.3 0.4 0.5 0.6
LOAD CURRENT (A)
–25
–1.0
–50
–1.5
–75
–2.0
–100
–2.5
–125
∆ILOAD = 3mA to 800mA
–150
–3.0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
MINIMUM LOAD CURRENT (mA)
–0.5
1.7
1.25
1.6
1.00
0.50
VIN – VOUT = 36V
VIN – VOUT = 2V
0.25
1.5
1.4
1.3
1.2
TJ = –50°C
TJ = 25°C
TJ = 125°C
1.1
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3089 G08
3089 G07
0.8
Dropout Voltage
1.50
0.75
0.7
3089 G06
Minimum Load Current
0
SET PIN CURRENT LOAD REGULATION (nA)
OFFSET VOLTAGE LOAD REGULATION (mV)
–1.6
3089 G05
Load Regulation
0
4
36
DROPOUT VOLTAGE (V)
–2
1.0
0
0.1
0.2
0.3 0.4 0.5 0.6
LOAD CURRENT (A)
0.7
0.8
3089 G09
3089f
For more information www.linear.com/LT3089
LT3089
TYPICAL PERFORMANCE CHARACTERISTICS
Internal Current Limit
1.50
1.6
1.25
1.5
ILOAD = 800mA
1.4
1.3
1.2
ILOAD = 3mA
1.0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
1.00
0.75
0.50
Programmable
Programmable Current
Current Limit
Limit
0.6
0.4
0.2
0
RILIM = 3.01k
0.4
RILIM = 1.50k
0.2
VIN = 7V
VOUT = 0V
6
12
18
24
30
INPUT–TO–OUTPUT DIFFERENTIAL (V)
0.6
0.4
RILIM
1.50k
0.95
RILIM
3.01k
RILIM
4.53k
0.4
0.2
0.2
0
1
2
3
4
RILIM (kΩ)
3089 G13
TEMP
TEMP Pin
Pin Current
Current
200
160
RSET = 20k
TJ = 25°C
1.00
0.8
0
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
TJ = 25°C
VIN = 7V
VOUT = 0V
1.0
36
Programmable
ProgrammableCurrent
CurrentLimit
Limit
1.05
OUTPUT VOLTAGE (V)
RILIM = 4.53k
0
3089 G12
Programmable Current Limit
1.2
PROGRAMMED CURRENT LIMIT (A)
PROGRAMMED CURRENT LIMIT (A)
0.8
3089 G11
1.0
5
0
6
0
0.25
0.50
0.75
OUTPUT CURRENT (A)
1
3089 G15
3089 G14
IMON
MON Pin Current
25
Pin Line
Line Regulation
Regulation
IIMON
MON Pin
180
140
160
100
80
60
40
20
IMON PIN CURRENT (µA)
120
IMON PIN CURRENT (µA)
TEMP PIN CURRENT (µA)
1.0
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3089 G10
0.6
VIN = 7V
VOUT = 0V
0.25
1.1
0.8
Internal Current Limit
1.2
CURRENT LIMIT (A)
1.7
CURRENT LIMIT (A)
DROPOUT VOLTAGE (V)
Dropout Voltage
TJ = 25°C unless otherwise specified.
140
120
100
80
60
40
20
15
10
5
20
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3089 G16
0
0
0.1
0.2
0.3 0.4 0.5 0.6
LOAD CURRENT (A)
0.7
0.8
3089 G17
0
ILOAD = 100mA
0
6
12
18
24
30
36
INPUT–TO–OUTPUT DIFFERENTIAL VOLTAGE (V)
3089 G18
3089f
For more information www.linear.com/LT3089
5
LT3089
TYPICAL PERFORMANCE CHARACTERISTICS
Linear Regulator
Linear Regulator
Load Transient Response
OUTPUT VOLTAGE
DEVIATION (mV)
–50
100
0
VIN = 3V
VOUT = 1V
COUT = 2.2µF
CSET = 0.1µF
0
∆ILOAD = 5mA TO 100mA
–100
0
–200
∆ILOAD = 100mA TO 800mA
1.0
0.5
0
20 40 60 80 100 120 140 160 180 200
TIME (µs)
0
20 40 60 80 100 120 140 160 180 200
TIME (µs)
Linear Regulator
Load
LoadTransient
TransientResponse
Response
0
10 20 30 40 50 60 70 80 90 100
TIME (µs)
Current Source
Line
Line Transient
Transient Response
Response
INPUT
VOLTAGE (V)
6
RSET = 20k
RLOAD = 1.25Ω
COUT = 2.2µF
CSET = 0.1µF
5
4
3
RSET = 6.04k
ROUT = 3.01Ω
COUT = 0
CSET = 30pF
5
4
3
tr = tf = 1µs
0.5
0
0
–20
–40
10 20 30 40 50 60 70 80 90 100
TIME (µs)
0
5
3
INPUT
VOLTAGE (V)
RSET = 6.04k
ROUT = 0.6Ω
COUT = 0
CSET = 30pF
500mA CURRENT SOURCE CONFIGURATION
520
95
90
10 15 20 25 30 35 40 45 50
TIME (µs)
4
3
3
2
RSET = 20k
RLOAD = 1.25Ω
COUT = 2.2µF CERAMIC
CSET = 0
1
10 20 30 40 50 60 70 80 90 100
TIME (µs)
3089 G25
OUTPUT
VOLTAGE (V)
OUTPUT
VOLTAGE (V)
0
0.5
0
–0.5
0
5
10 15 20 25 30 35 40 45 50
TIME (µs)
3089 G26
2
RSET = 20k
RLOAD = 1.25Ω
COUT = 2.2µF CERAMIC
CSET = 0.1µF
1
0
1.0
490
10 20 30 40 50 60 70 80 90 100
TIME (µs)
Linear Regulator
Turn-On
Turn–OnResponse
Response
4
0
510
500
0
3089 G24
Linear Regulator
Turn-On
Turn–OnResponse
Response
6
4
100
3089 G23
Current Source
Line Transient Response
5
105
OUTPUT
CURRENT (mA)
1.0
20
3089 G22
INPUT
VOLTAGE (V)
∆ILOAD = 5mA TO 100mA
3089 G21
INPUT
VOLTAGE (V)
LOAD
CURRENT (mA)
–400
OUTPUT
CURRENT (mA)
–100
100mA CURRENT SOURCE CONFIGURATION
∆ILOAD = 100mA TO 800mA
OUTPUT VOLTAGE
DEVIATION (mV)
OUTPUT VOLTAGE
DEVIATION (mV)
0
–200
6
tr = tf = 1µs
0
6
600
200
100
Linear Regulator
LineTransient
TransientResponse
Response
Line
VIN = 3V
VOUT = 1V
COUT = 0
CSET = 30pF
VIN = 3V
VOUT = 1V
COUT = 0
CSET = 30pF
–100
3089 G20
3089 G19
400
0
INPUT
VOLTAGE (V)
100
100
–200
LOAD
CURRENT (mA)
–100
–100
LOAD
CURRENT (mA)
200
LOAD
CURRENT (mA)
OUTPUT VOLTAGE
DEVIATION (mV)
0
200
VIN = 3V
VOUT = 1V
COUT = 2.2µF
CSET = 0.1µF
OUTPUT VOLTAGE
DEVIATION (mV)
300
50
480
Linear Regulator
Load Transient
Transient Response
Response
Load
Load Transient Response
100
0
TJ = 25°C unless otherwise specified.
1.0
0.5
0
–0.5
0
2
4
6
8 10 12 14 16 18 20
TIME (ms)
3089 G27
3089f
For more information www.linear.com/LT3089
LT3089
TYPICAL PERFORMANCE CHARACTERISTICS
Current Source
Turn-On
Turn–OnResponse
Response
4
3
3
RSET = 6.04k
ROUT = 3.01Ω
COUT = 0
CSET = 30pF
1
100
50
0
0
1000
RSET = 6.04k
ROUT = 0.6Ω
COUT = 0
CSET = 30pF
2
1
500mA CURRENT SOURCE CONFIGURATION
600
400
10 20 30 40 50 60 70 80 90 100
TIME (µs)
0
30
ILOAD = 100mA
ILOAD = 500mA
ILOAD = 800mA
10
0
10
100
1k
10k 100k
FREQUENCY (Hz)
80
60
40
VIN = VOUT + 5V
VIN = VOUT + 2V
VIN = VOUT + 1.5V
20
1M
10M
0
10
100
VOUT
RTEST
0
0.5
1
1.5
2 2.5 3 3.5
RTEST (kΩ)
4
4.5
5
3089 G30
Output Impedance
CURRENT SOURCE CONFIGURATION
1M
100k
10k
1k
100
ISOURCE = 10mA
ISOURCE = 100mA
ISOURCE = 500mA
10
1k
10k 100k
FREQUENCY (Hz)
1M
3089 G31
10M
1
10
100
1k
10k 100k
FREQUENCY (Hz)
3089 G32
1M
10M
3089 G33
Ripple Rejection (10kHz)
Ripple Rejection (120Hz)
95
70
90
RIPPLE REJECTION (dB)
20
VIN
10M
OUTPUT IMPEDANCE (Ω)
40
SET PIN = 0V
300
0
COUT = 2.2µF CERAMIC
CSET = 0.1µF
ILOAD = 100mA
100
RIPPLE REJECTION (dB)
50
RIPPLE REJECTION (dB)
RIPPLE REJECTION (dB)
60
400
10 20 30 40 50 60 70 80 90 100
TIME (µs)
Ripple
Ripple Rejection
Rejection
70
500
100
120
COUT = 2.2µF CERAMIC
CSET = 0.1µF
VIN = VOUT(NOMINAL) + 2V
80
600
3089 G29
Ripple Rejection
90
700
200
3089 G28
100
800
200
0
VIN = 5V
VIN = 36V
900
0
100mA CURRENT SOURCE CONFIGURATION
OUTPUT
CURRENT (mA)
OUTPUT
CURRENT (mA)
0
Residual Output Voltage with
Less
Less Than
Than Minimum
Minimum Load
Load
OUTPUT VOLTAGE (mV)
4
INPUT
VOLTAGE (V)
INPUT
VOLTAGE (V)
Current Source
Turn-On
Turn–On Response
Response
2
TJ = 25°C unless otherwise specified.
85
80
75
70
VIN = VOUT(NOMINAL) + 2V
RIPPLE = 500mVP–P
f = 120Hz
ILOAD = 100mA
COUT = 2.2µF
CSET = 0.1µF
65
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
65
60
55
VIN = VOUT(NOMINAL) + 2V
RIPPLE = 500mVP–P
f = 10kHz
ILOAD = 100mA
COUT = 2.2µF
CSET = 0.1µF
50
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3089 G34
3089 G35
3089f
For more information www.linear.com/LT3089
7
LT3089
TYPICAL PERFORMANCE CHARACTERISTICS
Ripple Rejection
Ripple Rejection
Rejection (1MHz)
(1MHz)
Ripple
45
90
80
RIPPLE REJECTION (dB)
RIPPLE REJECTION (dB)
43
41
39
VIN = VOUT(NOMINAL) + 2V
RIPPLE = 500mVP–P
f = 1MHz
ILOAD = 100mA
COUT = 2.2µF
CSET = 0.1µF
37
TJ = 25°C unless otherwise specified.
ILOAD = 800mA
CLOAD = 2.2µF
70
60
50
40
30
10kHz
100kHz
1MHz
20
35
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
10
1 1.5 2 2.5 3 3.5 4 4.5 5
INPUT–TO–OUTPUT DIFFERENTIAL VOLTAGE (V)
3089 G36
3089 G37
10Hz to 100kHz
Output Voltage Noise
Noise Spectral Density
1000
10
100
REFERENCE CURRENT NOISE
SPECTRAL DENSITY (pA/√Hz)
ERROR AMPLIFIER NOISE
SPECTRAL DENSITY (nV/√Hz)
100
CSET = 0.1µF
COUT = 4.7µF
ILOAD = 800mA
VOUT
100µV/DIV
NOISE INDEPENDENT
OF OUTPUT VOLTAGE
1ms/DIV
10
10
100
1k
10k
FREQUENCY (Hz)
3089 G39
1
100k
3089 G38
8
3089f
For more information www.linear.com/LT3089
LT3089
PIN FUNCTIONS
IN: Input. This pin supplies power to regulate internal
circuitry and supply output load current. For the device
to operate properly and regulate, the voltage on this pin
must be between the dropout voltage and 36V above the
OUT pin (depending on output load current, see Dropout
Voltage Specifications).
OUT: Output. This is the power output of the device. The
LT3089 requires a 3mA minimum load current for proper
output regulation.
TEMP: Temperature Output. This pin delivers a current
proportional to the internal average junction temperature.
Current output is 1µA/°C for temperatures above 5°C. The
TEMP pin output current typically equals 25µA at 25°C.
The output of the TEMP pin is valid for voltages from VOUT
+ 0.4V to VOUT – 40V. If unused, connect this pin to OUT.
ILIM: Current Limit Program. A resistor between this pin
and OUT programs output current limit to a level proportional to resistor value. Connect this resistor directly to
OUT at the pins of the package. The typical ratio of current
limit to resistor value is 175mA/kΩ with a 300Ω offset.
If programmable current limit is not used, leave this pin
open; the internal current limit of the LT3089 is still active,
keeping the device inside safe operating limits. External
voltage drops between the current limit resistor and VOUT
will affect the current limit. Keep drops below 1mV.
IMON: Output Current Monitor. The IMON pin sources a
current typically equal to ILOAD/5000 or 200µA per amp of
output current. Terminating this pin with a resistor to GND
produces a voltage proportional to ILOAD. For example,
at ILOAD = 800mA, IMON typically sources 160µA. With
a 1k resistor to GND, this produces 160mV. The output
of the IMON pin is valid for voltages from VOUT + 0.4V to
VOUT – 40V. If unused, connect this pin to OUT.
SET: Set. This pin is the error amplifier’s noninverting
input and also sets the operating bias point of the circuit.
A fixed 50μA current source flows out of this pin. A single
external resistor programs VOUT. Output voltage range is
0V to 34.5V.
Exposed Pad/Tab: Output. The exposed pad of the DF
and FE packages and the tab of the R package are tied
internally to OUT. As such, tie them directly to OUT (Pins
1-4/Pins 1-5, 8, 9, 16/Pin 4) at the PCB. The amount of
copper area and planes connected to OUT determine the
effective thermal resistance of the packages.
NC: No Connection. No connect pins have no connection
to internal circuitry and may be tied to IN, OUT, GND or
floated.
BLOCK DIAGRAM
IN
50µA
+
CURRENT
MONITOR
IMON = ILOAD/5000
IMON
TEMPERATURE
DEPENDENT
CURRENT SOURCE
1µA/°C
TEMP
–
PROGRAMMABLE
CURRENT LIMIT
SET
ILIM
OUT
3089 BD
3089f
For more information www.linear.com/LT3089
9
LT3089
APPLICATIONS INFORMATION
Introduction
The LT3089 regulator is easy to use and has all the protection features expected in high performance regulators.
Included are short-circuit protection, reverse-input protection and safe operating area protection, as well as thermal
shutdown with hysteresis. Safe operating area (SOA) for
the LT3089 is extended, allowing for use in harsh industrial and automotive environments where sudden spikes
in input voltage lead to high power dissipation.
The LT3089 fits well in applications needing multiple rails.
This new architecture adjusts down to zero with a single
resistor, handling modern low voltage digital ICs as well
as allowing easy parallel operation and thermal management without heat sinks. Adjusting to zero output allows
shutting off the powered circuitry.
A precision “0” TC 50μA reference current source connects
to the noninverting input of a power operational amplifier.
The power operational amplifier provides a low impedance
buffered output to the voltage on the noninverting input.
A single resistor from the noninverting input to ground
sets the output voltage. If this resistor is set to 0Ω, zero
output voltage results. Therefore, any output voltage can
be obtained between zero and the maximum defined by
the input power supply is obtainable.
The benefit of using a true internal current source as the
reference, as opposed to a bootstrapped reference in older
regulators, is not so obvious in this architecture. A true
reference current source allows the regulator to have gain
and frequency response independent of the impedance on
the positive input. On older adjustable regulators, such as
the LT1086 loop gain changes with output voltage and
bandwidth changes if the adjustment pin is bypassed to
ground. For the LT3089, the loop gain is unchanged with
output voltage changes or bypassing. Output regulation
is not a fixed percentage of output voltage, but is a fixed
fraction of millivolts. Use of a true current source allows
all of the gain in the buffer amplifier to provide regulation,
and none of that gain is needed to amplify up the reference
to a higher output voltage.
10
The LT3089 has many additional features that facilitate
monitoring and control. Current limit is externally programmable via a single resistor between the ILIM pin and
OUT. Shorting this resistor out disables all output current
to the load, only bias currents remain.
The IMON pin produces a current output proportional to
load current. For every 100mA of load current, the IMON
pin sources 20µA of current. This can be sensed using an
external resistor to monitor load requirements and detect
potential faults. The IMON pin can operate at voltages above
OUT, so it operates even during a short-circuit condition.
One additional monitoring function is the TEMP pin, a current source that is proportional to average die temperature.
For die temperatures above 0°C, the TEMP pin sources a
current equal to 1µA/°C. This pin operates normally during
output short-circuit conditions.
Programming Linear Regulator Output Voltage
The LT3089 generates a 50μA reference current that flows
out of the SET pin. Connecting a resistor from SET to
ground generates a voltage that becomes the reference
point for the error amplifier (see Figure 1). The reference
voltage equals 50µA multiplied by the value of the SET
pin resistor. Any voltage can be generated and there is
no minimum output voltage for the regulator.
LT3089
IN
CIN
50µA
+
–
SET
OUT
VOUT = 50µA • RSET
CSET
RSET
COUT
RLOAD
3089 F01
Figure 1. Basic Adjustable Regulator
3089f
For more information www.linear.com/LT3089
LT3089
APPLICATIONS INFORMATION
Table 1 lists many common output voltages and the closest standard 1% resistor values used to generate that
output voltage.
Regulation of the output voltage requires a minimum load
current of 3mA. For true zero voltage output operation,
return this 3mA load current to a negative output voltage.
Table 1. 1% Resistors for Common Output Voltages
VOUT (V)
RSET (kΩ)
1
20
1.2
24.3
1.5
30.1
1.8
35.7
2.5
49.9
3.3
66.5
5
100
With the 50µA current source used to generate the reference
voltage, leakage paths to or from the SET pin can create
errors in the reference and output voltages. High quality
insulation should be used (e.g., Teflon, Kel-F); cleaning of
all insulating surfaces to remove fluxes and other residues
is required. Surface coating may be necessary to provide
a moisture barrier in high humidity environments.
Minimize board leakage by encircling the SET pin and
circuitry with a guard ring operated at a potential close
to itself. Tie the guard ring to the OUT pin. Guarding both
sides of the circuit board is required. Bulk leakage reduction
depends on the guard ring width. 50nA of leakage into or
out of the SET pin and its associated circuitry creates a
0.1% reference voltage error. Leakages of this magnitude,
coupled with other sources of leakage, can cause significant offset voltage and reference drift, especially over the
possible operating temperature range. Figure 2 depicts an
example guard ring layout.
If guard ring techniques are used, this bootstraps any
stray capacitance at the SET pin. Since the SET pin is
a high impedance node, unwanted signals may couple
into the SET pin and cause erratic behavior. This will
be most noticeable when operating with minimum
output capacitors at full load current. The easiest way
to remedy this is to bypass the SET pin with a small
amount of capacitance from SET to ground, 10pF to
20pF is sufficient.
Configuring the LT3089 as a Current Source
Setting the LT3089 to operate as a 2-terminal current
source is a simple matter. The 50µA reference current from
the SET pin is used with one resistor to generate a small
voltage, usually in the range of 100mV to 1V (200mV is a
level that rejects offset voltage, line regulation, and other
errors without being excessively large). This voltage is
then applied across a second resistor that connect from
OUT to the first resistor. Figure 3 shows connections and
formulas to calculate a basic current source configuration.
IN
LT3089
OUT
IOUT ≥ 3mA
50µA
VSET = 50µA • RSET
+
–
SET
OUT
+
VSET
SET PIN
ROUT
IOUT
3089 F02
Figure 2. Guard Ring Layout Example of DF Package
VSET 50µA • RSET
=
ROUT
ROUT
3089 F03
RSET
–
GND
IOUT =
Figure 3. Using the LT3089 as a Current Source
3089f
For more information www.linear.com/LT3089
11
LT3089
APPLICATIONS INFORMATION
Again, the lower current levels used in the LT3089 necessitate attention to board leakages as error sources (see the
Programming Linear Regulator Output Voltage section).
In a current source configuration, programmable current limit and current monitoring functions are often
unused. When not used, tie IMON to OUT and leave ILIM
open. The TEMP pin is still available for use, if unused tie
TEMP to OUT.
Selecting RSET and ROUT in Current Source Applications
In Figure 3, both resistors RSET and ROUT program the
value of the output current. The question now arises: the
ratio of these resistors is known, but what value should
each resistor be?
The first resistor to select is RSET. The value selected should
generate enough voltage to minimize the error caused by
the offset between the SET and OUT pins. A reasonable
starting level is ~200mV of voltage across RSET (RSET equal
to 4.02k). Resultant errors due to offset voltage are a few
percent. The lower the voltage across RSET becomes, the
higher the error term due to the offset.
From this point, selecting ROUT is easy, as it is a straightforward calculation from RSET. Take note, however, resistor
errors must be accounted for as well. While larger voltage
drops across RSET minimize the error due to offset, they
also increase the required operating headroom.
Obtaining the best temperature coefficient does not require
the use of expensive resistors with low ppm temperature
coefficients. Instead, since the output current of the LT3089
is determined by the ratio of RSET to ROUT, those resistors should have matching temperature characteristics.
Less expensive resistors made from the same material
provide matching temperature coefficients. See resistor
manufacturers’ data sheets for more details.
Higher output currents necessitate the use of higher wattage resistors for ROUT. There may be a difference between
the resistors used for ROUT and RSET. A better method to
maintain consistency in resistors is to use multiple resistors in parallel to create ROUT, allowing the same wattage
and type of resistor as RSET.
12
Programming Current Limit Externally
A resistor placed between ILIM and OUT on the LT3089
externally sets current limit to a level lower than the internal
current limit. Connect this resistor directly at the OUT pins
for best accuracy. The value of this resistor calculates as:
RILIM = ILIMIT/175mA/kΩ + 300Ω
The resistor for a 0.5A current limit is: RILIM = 0.5A/175mA/
kΩ + 300Ω = 3.16k. Tolerance over temperature is ±15%,
so current limit is normally set 20% above maximum load
current. The 300Ω offset resistance built in to the programmable current limit allows for lowering the maximum
output current to only bias currents (see curve of Minimum
Load Current in Typical Performance Characteristics) using external switches.
The LT3089’s internal current limit overrides the programmed current limit if the input-to-output voltage differential in the power transistor is excessive. The internal
current limit is ≈1A with a foldback characteristic dependent
on input-to-output differential voltage, not output voltage
per se (see Typical Performance Characteristics).
Stability and Input Capacitance
The LT3089 does not require an input capacitor to maintain stability. Input capacitors are recommended in linear
regulator configurations to provide a low impedance input
source to the LT3089. If using an input capacitor, low
ESR, ceramic input bypass capacitors are acceptable for
applications without long input leads. However, applications connecting a power supply to an LT3089 circuit’s
IN and GND pins with long input wires combined with
low ESR, ceramic input capacitors are prone to voltage
spikes, reliability concerns and application-specific board
oscillations. The input wire inductance found in many
battery-powered applications, combined with the low ESR
ceramic input capacitor, forms a high Q LC resonant tank
circuit. In some instances this resonant frequency beats
against the output current dependent LDO bandwidth and
interferes with proper operation. Simple circuit modifications/solutions are then required. This behavior is not
indicative of LT3089 instability, but is a common ceramic
input bypass capacitor application issue.
3089f
For more information www.linear.com/LT3089
LT3089
APPLICATIONS INFORMATION
The self-inductance, or isolated inductance, of a wire is
directly proportional to its length. Wire diameter is not a
major factor on its self-inductance. For example, the selfinductance of a 2-AWG isolated wire (diameter = 0.26") is
about half the self-inductance of a 30-AWG wire (diameter
= 0.01"). One foot of 30-AWG wire has about 465nH of
self inductance.
One of two ways reduces a wire’s self-inductance. One
method divides the current flowing towards the LT3089
between two parallel conductors. In this case, the farther
apart the wires are from each other, the more the selfinductance is reduced; up to a 50% reduction when placed
a few inches apart. Splitting the wires basically connects
two equal inductors in parallel, but placing them in close
proximity gives the wires mutual inductance adding to
the self-inductance. The second and most effective way
to reduce overall inductance is to place both forward and
return current conductors (the input and GND wires) in
very close proximity. Two 30-AWG wires separated by
only 0.02", used as forward and return current conductors, reduce the overall self-inductance to approximately
one-fifth that of a single isolated wire.
If wiring modifications are not permissible for the applications, including series resistance between the power supply
and the input of the LT3089 also stabilizes the application.
As little as 0.1Ω to 0.5Ω, often less, is effective in damping the LC resonance. If the added impedance between
the power supply and the input is unacceptable, adding
ESR to the input capacitor also provides the necessary
damping of the LC resonance. However, the required ESR
is generally higher than the series impedance required.
Stability and Frequency Compensation for Linear
Regulator Configurations
The LT3089 does not require an output capacitor for
stability. LTC recommends an output capacitor of 10μF
with an ESR of 0.5Ω or less to provide good transient
performance in linear regulator configurations. Larger
values of output capacitance decrease peak deviations and
provide improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT3089, increase the effective output capacitor value. For improvement in transient
performance, place a capacitor across the voltage setting
resistor. Capacitors up to 1μF can be used. This bypass
capacitor reduces system noise as well, but start-up time
is proportional to the time constant of the voltage setting
resistor (RSET in Figure 1) and SET pin bypass capacitor.
Stability and Frequency Compensation for Current
Source Configurations
The LT3089 does not require input or output capacitors
for stability in many current-source applications. Clean,
tight PCB layouts provide a low reactance, well controlled
operating environment for the LT3089 without requiring
capacitors to frequency compensate the circuit. Figure 3
highlights the simplicity of using the LT3089 as a current
source.
Some current source applications use a capacitor connected in parallel with the SET pin resistor to lower the
current source’s noise. This capacitor also provides a
soft-start function for the current source. See Quieting the
Noise section for further details. When operating without
output capacitors, the high impedance nature of the SET
pin as the input of the error amplifier allows signal from
the output to couple in, showing as high frequency ringing during transients. Bypassing the SET resistor with a
capacitor in the range of 20pF to 30pF dampens the ringing.
Depending on the pole introduced by a capacitor or other
complex impedances presented to the LT3089, external
compensation may be required for stability. Techniques
are discussed to achieve this in the following paragraphs.
Linear Technology strongly recommends testing stability
in situ with final components before beginning production.
Although the LT3089’s design strives to be stable without
capacitors over a wide variety of operating conditions, it is
not possible to test for all possible combinations of input
and output impedances that the LT3089 will encounter.
These impedances may include resistive, capacitive, and
inductive components and may be complex distributed
networks. In addition, the current source’s value will differ between applications and its connection may be GND
referenced, power supply referenced, or floating in a signal
line path. Linear Technology strongly recommends that
stability be tested in situ for any LT3089 application.
3089f
For more information www.linear.com/LT3089
13
LT3089
APPLICATIONS INFORMATION
In LT3089 applications with long wires or PCB traces, the
inductive reactance may cause instability. In some cases,
adding series resistance to the input and output lines (as
shown in Figure 4) may sufficiently dampen these possible
high-Q lines and provide stability. The user must evaluate
the required resistor values against the design’s headroom
constraints. In general, operation at low output current
levels (<20mA) automatically requires higher values of
programming resistors and may provide the necessary
damping without additional series impedance.
If the line impedances in series with the LT3089 are
complex enough such that series damping resistors are
not sufficient, a frequency compensation network may be
necessary. Several options may be considered.
Figure 5 depicts the simplest frequency compensation
networks as a single capacitor across the two terminals
of the current source. Some applications may use the
capacitance to stand off DC voltage but allow the transfer
of data down a signal line.
For some applications, pure capacitance may be unacceptable or present a design constraint. One circuit
example typifying this is an “intrinsically-safe” circuit in
which an overload or fault condition potentially allows the
capacitor’s stored energy to create a spark or arc. For applications where a single capacitor is unacceptable, Figure
5 alternately shows a series RC network connected across
the two terminals of the current source. This network has
the added benefit of limiting the discharge current of the
capacitor under a fault condition, preventing sparks or
arcs. In many instances, a series RC network is the best
solution for stabilizing the application circuit. Typical resistor values will range from 100Ω to 5k. Once again, Linear
Technology strongly recommends testing stability in situ
for any LT3089 application across all operating conditions,
especially ones that present complex impedance networks
at the input and output of the current source.
If an application refers the bottom of the LT3089 current
source to GND, it may be necessary to bypass the top
of the current source with a capacitor to GND. In some
cases, this capacitor may already exist and no additional
capacitance is required. For example, if the LT3089 was
used as a variable current source on the output of a power
supply, the output bypass capacitance would suffice to
provide LT3089 stability. Other applications may require
the addition of a bypass capacitor. A series RC network
may also be used as necessary, and depends on the application requirements.
LONG LINE
REACTANCE/INDUCTANCE
IN
LT3089
RCOMP
RSERIES
50µA
IN
LT3089
CCOMP OR
+
–
50µA
+
–
SET
RSET
SET
OUT
RSET
CCOMP
OUT
ROUT
3089 F05
ROUT
Figure 5. Compensation from Input to Output
of Current Source Provides Stability
3089 F04
RSERIES
LONG LINE
REACTANCE/INDUCTANCE
Figure 4. Adding Series Resistance Decouples
and Dampens Long Line Reactances
14
3089f
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LT3089
APPLICATIONS INFORMATION
In some extreme cases, capacitors or series RC networks
may be required on both the LT3089’s input and output to
stabilize the circuit. Figure 6 depicts a general application
using input and output capacitor networks rather than
an input-to-output capacitor. As the input of the current
source tends to be high impedance, placing a capacitor
on the input does not have the same effect as placing a
capacitor on the lower impedance output. Capacitors in the
range of 0.1µF to 1µF usually provide sufficient bypassing
on the input, and the value of input capacitance may be
increased without limit. Pay careful attention to using low
ESR input capacitors with long input lines (see the Stability and Input Capacitance section for more information).
VIN
RIN
IN
LT3089
CIN
50µA
+
–
SET
RSET
OUT
ROUT
IOUT
COUT OR
ROUT
COUT
3089 F06
Figure 6. Input and/or Output Capacitors May
Be Used for Compensation
Using Ceramic Capacitors
Give extra consideration to the use of ceramic capacitors.
Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature
and applied voltage. The most common dielectrics used
are specified with EIA temperature characteristic codes of
Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are
good for providing high capacitances in a small package,
but they tend to have strong voltage and temperature
coefficients as shown in Figures 7 and 8. When used with
a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an
effective value as low as 1μF to 2μF for the DC bias voltage
applied and over the operating temperature range. The X5R
and X7R dielectrics result in more stable characteristics
and are more suitable for use as the output capacitor.
The X7R type has better stability across temperature,
while the X5R is less expensive and is available in higher
values. Care still must be exercised when using X5R and
X7R capacitors. The X5R and X7R codes only specify
operating temperature range and maximum capacitance
change over temperature. Capacitance change due to DC
bias with X5R and X7R capacitors is better than Y5V and
Z5U capacitors, but can still be significant enough to drop
capacitor values below appropriate levels. Capacitor DC
bias characteristics tend to improve as component case
size increases, but expected capacitance at operating
voltage should be verified.
40
20
X5R
0
–20
–40
Y5V
–60
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
CHANGE IN VALUE (%)
CHANGE IN VALUE (%)
20
50
25
75
0
TEMPERATURE (°C)
–40
–60
Y5V
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–50 –25
X5R
–20
100
125
–100
0
3089 F07
Figure 7. Ceramic Capacitor Temperature Characteristics
2
4
8
6
10 12
DC BIAS VOLTAGE (V)
14
16
3089 F08
Figure 8. Ceramic Capacitor DC Bias Characteristics
3089f
For more information www.linear.com/LT3089
15
LT3089
APPLICATIONS INFORMATION
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress. In a
ceramic capacitor, the stress can be induced by vibrations
in the system or thermal transients.
LT3089
IN
50µA
+
–
OUT
SET
Paralleling Devices
Higher output current is obtained by paralleling multiple
LT3089s together. Tie the individual SET pins together and
tie the individual IN pins together. Connect the outputs in
common using small pieces of PC trace as ballast resistors
to promote equal current sharing. PC trace resistance in
milliohms/inch is shown in Table 2. Ballasting requires
only a tiny area on the PCB.
LT3089
IN
VIN
4.8V TO 40V
50µA
+
–
1µF
SET
33k
Table 2. PC Board Trace Resistance
WEIGHT (oz)
10mil WIDTH
1
54.3
2
27.1
Trace resistance is measured in mΩ/in.
OUT
20mΩ
10µF
VOUT
3.3V
1.6A
3089 F09
20mil WIDTH
27.1
13.6
The worst-case room temperature offset, only ±1.5mV
between the SET pin and the OUT pin, allows the use of
very small ballast resistors.
As shown in Figure 9, each LT3089 has a small 20mΩ
ballast resistor, which at full output current gives better
than 80% equalized sharing of the current. The external
resistance of 20mΩ (10mΩ for the two devices in parallel) only adds about 16mV of output regulation drop at an
output of 1.6A. Even with an output voltage as low as 1V,
this only adds 1.6% to the regulation. Of course, paralleling
more than two LT3089s yields even higher output current.
Spreading the devices on the PC board also spreads the
heat. Series input resistors can further spread the heat if
the input-to-output difference is high.
If the increase in load regulation from the ballast resistors is unacceptable, the IMON output can be used to
compensate for these drops (see Using IMON Cancels
Ballast Resistor Drop in the Typical Applications section).
Regulator paralleling without the use of ballast resistors is
accomplished by comparing the IMON outputs of regulators (see Load Current Sharing Without Ballasting in the
Typical Applications section).
16
20mΩ
Figure 9. Parallel Devices
Quieting the Noise
The LT3089 offers numerous noise performance advantages. Every linear regulator has its sources of noise. In
general, a linear regulator’s critical noise source is the
reference. In addition, consider the error amplifier’s noise
contribution along with the resistor divider’s noise gain.
Many traditional low noise regulators bond out the voltage
reference to an external pin (usually through a large value
resistor) to allow for bypassing and noise reduction. The
LT3089 does not use a traditional voltage reference like
other linear regulators. Instead, it uses a 50µA reference
current. The 50µA current source generates noise current
levels of 18pA/√Hz (5.7nARMS over a 10Hz to 100kHz
bandwidth). The equivalent voltage noise equals the RMS
noise current multiplied by the resistor value.
The SET pin resistor generates spot noise equal to √4kTR
(k = Boltzmann’s constant, 1.38 • 10–23J/°K, and T is absolute temperature) which is RMS summed with the voltage
noise. If the application requires lower noise performance,
bypass the voltage setting resistor with a capacitor to GND.
Note that this noise-reduction capacitor increases start-up
time as a factor of the RC time constant.
3089f
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LT3089
APPLICATIONS INFORMATION
The LT3089 uses a unity-gain follower from the SET pin
to the OUT pin. Therefore, multiple possibilities exist
(besides a SET pin resistor) to set output voltage. For
example, using a high accuracy voltage reference from
SET to GND removes the errors in output voltage due to
reference current tolerance and resistor tolerance. Active
driving of the SET pin is acceptable.
The typical noise scenario for a linear regulator is that the
output voltage setting resistor divider gains up the reference
noise, especially if VOUT is much greater than VREF. The
LT3089’s noise advantage is that the unity-gain follower
presents no noise gain whatsoever from the SET pin to the
output. Thus, noise figures do not increase accordingly.
Error amplifier noise is typical 85nV/√Hz(27µVRMS over
a 10Hz to 100kHz bandwidth). The error amplifier’s noise
is RMS summed with the other noise terms to give a final
noise figure for the regulator.
Paralleling of regulators adds the benefit that output noise
is reduced. For n regulators in parallel, the output noise
drops by a factor of √n.
Curves in the Typical Performance Characteristics section show noise spectral density and peak-to-peak noise
characteristics for both the reference current and error
amplifier over a 10Hz to 100kHz bandwidth.
Load Voltage Regulation
LT3089
IN
50µA
+
–
PARASITIC
RESISTANCE
SET
OUT
RSET
RP
RP
LOAD
RP
3089 F10
Figure 10. Connections for Best Load Regulation
TEMP Pin Operation (Die Temperature Monitor)
The TEMP pin of the LT3089 outputs a current proportional
to average die temperature. At 25°C, the current from the
TEMP pin is 25µA, with a slope of 1µA/°C. The current out
of the TEMP pin is valid for junction temperatures above
0°C (absent initial offset considerations). Below 0°C, the
TEMP pin will not sink current to indicate die temperature.
The TEMP pin output current is valid for voltages up to
40V below and 0.4V above the OUT pin allowing operation
even during short-circuit conditions.
Connecting a resistor from TEMP to ground converts the
TEMP pin current into a voltage to allow for monitoring
by an ADC. With a 1k resistor, 0mV to 150mV indicates
0°C to 150°C.
The LT3089 is a floating device. No ground pin exists on
the packages. Thus, the IC delivers all quiescent current
and drive current to the load. Therefore, it is not possible
to provide true remote load sensing. The connection resistance between the regulator and the load determines
load regulation performance. The data sheet’s load
regulation specification is Kelvin sensed at the package’s
pins. Negative-side sensing is a true Kelvin connection by
returning the bottom of the voltage setting resistor to the
negative side of the load (see Figure 10).
It should be noted that the TEMP pin current represents an
average temperature and should not be used to guarantee
that maximum junction temperature is not exceeded.
Instantaneous power along with thermal gradients and
time constants may cause portions of the die to exceed
maximum ratings and thermal shutdown thresholds. Be
sure to calculate die temperature rise for steady state
(>1 minute) as well as impulse conditions.
Connected as shown, system load regulation is the sum
of the LT3089’s load regulation and the parasitic line
resistance multiplied by the output current. To minimize
load regulation, keep the positive connection between the
regulator and load as short as possible. If possible, use
large diameter wire or wide PC board traces.
The LT3089’s IMON pin outputs a current proportional to
the load current supplied at a ratio of 1:5000. The IMON
pin current is valid for voltages up to 40V below and
0.4V above the OUT pin, allowing operation even during
short-circuit conditions.
IMON Pin Operation (Current Monitor)
3089f
For more information www.linear.com/LT3089
17
LT3089
APPLICATIONS INFORMATION
Connecting a resistor from IMON to ground converts the
IMON pin current into a voltage to allow for monitoring by
an ADC. With a 1k resistor, 0mV to 160mV indicates 0A
to 800mA of load current.
Compensating for Cable Drops with IMON
The IMON pin can compensate for resistive drops in wires
or cables between the LT3089 and the load. Breaking the
SET resistor into two pieces adjusts the output voltage as a
function of load current. The ratio of the output wire/cable
impedance to the bottom resistor should be 1:5000. The
sum total of the two SET resistor values determines the
initial output voltage. Figure 11 shows a typical application
and formulas for calculating resistor values.
OUT
IN
RCABLE2
0.02Ω
LT3089
SET
CIN
1µF
IMON
RSET
29.8k
RCOMP
200Ω
COUT
10µF
RCABLE
0.02Ω
LOAD
3089 F11
RCOMP = 5000 • RCABLE(TOTAL)
VOUT(LOAD) = 50µA (RSET + RCOMP)
PC board, copper traces and planes. Surface mount heat
sinks, plated through-holes and solder-filled vias can also
spread the heat generated by power devices.
Junction-to-case thermal resistance is specified from the
IC junction to the bottom of the case directly, or the bottom of the pin most directly in the heat path. This is the
lowest thermal resistance path for heat flow. Only proper
device mounting ensures the best possible thermal flow
from this area of the packages to the heat sinking material.
Note that the exposed pad of the DFN and TSSOP packages and the tab of the DD-Pak package are electrically
connected to the output (VOUT).
Tables 3 through 5 list thermal resistance as a function
of copper areas on a fixed board size. All measurements
were taken in still air on a 4-layer FR-4 board with 1oz
solid internal planes and 2oz external trace planes with a
total finished board thickness of 1.6mm.
Table 3. DF Package, 12-Lead DFN
COPPER AREA
TOPSIDE*
BACKSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
21°C/W
1000mm2
2500mm2
2500mm2
24°C/W
225mm2
2500mm2
2500mm2
30°C/W
100mm2
2500mm2
2500mm2
35°C/W
*Device is mounted on topside
Figure 11. Using IMON to Compensate for Cable Drops
Table 4. FE Package, 16-Lead TSSOP
COPPER AREA
Thermal Considerations
The LT3089’s internal power and thermal limiting circuitry
protects itself under overload conditions. For continuous
normal load conditions, do not exceed the 125°C (E- and
I-grades) maximum junction temperature. Carefully
consider all sources of thermal resistance from junctionto-ambient. This includes (but is not limited to) junctionto-case, case-to-heat sink interface, heat sink resistance
or circuit board-to-ambient as the application dictates.
Consider all additional, adjacent heat generating sources
in proximity on the PCB.
Surface mount packages provide the necessary heat
sinking by using the heat spreading capabilities of the
18
TOPSIDE*
BACKSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
18°C/W
1000mm2
2500mm2
2500mm2
22°C/W
225mm2
2500mm2
2500mm2
27°C/W
100mm2
2500mm2
2500mm2
32°C/W
*Device is mounted on topside
Table 5. R Package, 7-Lead DD-Pak
COPPER AREA
TOPSIDE*
BACKSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
13°C/W
1000mm2
2500mm2
2500mm2
14°C/W
225mm2
2500mm2
2500mm2
16°C/W
*Device is mounted on topside
3089f
For more information www.linear.com/LT3089
LT3089
APPLICATIONS INFORMATION
For further information on thermal resistance and using
thermal information, refer to JEDEC standard JESD51,
notably JESD51-12.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Tables 3 through 5
provide thermal resistance numbers for best-case 4-layer
boards with 1oz internal and 2oz external copper. Modern,
multilayer PCBs may not be able to achieve quite the same
level performance as found in these tables. Demo circuit
2318A’s board layout using multiple inner VOUT planes
and multiple thermal vias achieves 17°C/W performance
for the DF package.
Calculating Junction Temperature
Example: Given an output voltage of 0.9V, an IN voltage
of 2.5V ±5%, output current range from 10mA to 0.8A
and a maximum ambient temperature of 50°C, what is
the maximum junction temperature for the DD-Pak on a
2500mm2 board with topside copper of 1000mm2?
Reducing Power Dissipation
In some applications it may be necessary to reduce the
power dissipation in the LT3089 package without sacrificing
output current capability. Two techniques are available. The
first technique, illustrated in Figure 12, employs a resistor in series with the regulator’s input. The voltage drop
across RS decreases the LT3089’s IN-to-OUT differential
voltage and correspondingly decreases the LT3089’s
power dissipation.
As an example, assume: VIN = 7V, VOUT = 3.3V and IOUT(MAX)
= 0.8A. Use the formulas from the Calculating Junction
Temperature section previously discussed.
Without series resistor RS, power dissipation in the
LT3089 equals:
PTOTAL = (7V – 3.3V) • 0.8A = 2.96W
If the voltage differential (VDIFF) across the LT3089 is
chosen as 1.5V, then RS equals:
RS =
The power in the circuit equals:
PTOTAL = (VIN – VOUT)(IOUT)
The current delivered to the SET pin is negligible and can
be ignored.
VIN(MAX_CONTINUOUS) = 2.625V (2.5V + 5%)
VOUT = 0.9V, IOUT = 0.8A, TA = 50°C
Power dissipation under these conditions equals:
7V – 3.3V – 1.5V
= 2.8Ω
0.8A
Power dissipation in the LT3089 now equals:
PTOTAL = 1.5V • 0.8A = 1.2W
The LT3089’s power dissipation is now only 40% compared
to no series resistor. RS dissipates 1.8W of power. Choose
appropriate wattage resistors or use multiple resistors in
parallel to handle and dissipate the power properly.
PTOTAL = (VIN – VOUT)(IOUT)
VIN
RS
PTOTAL = (2.625V – 0.9V)(0.8A) = 1.38W
VIN′
Junction Temperature equals:
TJ = TA + PTOTAL • θJA (using tables)
C1
IN
LT3089
50µA
+
–
TJ = 50°C + 1.38W • 14°C/W = 69.3°C
In this case, the junction temperature is below the maximum rating, ensuring reliable operation.
SET
RSET
OUT
C2
VOUT
3089 F12
Figure 12. Reducing Power Dissipation Using a Series Resistor
3089f
For more information www.linear.com/LT3089
19
LT3089
APPLICATIONS INFORMATION
The second technique for reducing power dissipation,
shown in Figure 13, uses a resistor in parallel with the
LT3089. This resistor provides a parallel path for current
flow, reducing the current flowing through the LT3089.
This technique works well if input voltage is reasonably
constant and output load current changes are small. This
technique also increases the maximum available output
current at the expense of minimum load requirements.
VIN
C1
IN
LT3089
50µA
RP
+
–
SET
OUT
RSET
VOUT
C2
3089 F13
Figure 13. Reducing Power Dissipation Using a Parallel Resistor
RP dissipates 0.85W of power. As with the first technique,
choose appropriate wattage resistors to handle and dissipate the power properly. With this configuration, the
LT3089 supplies only 0.43A. Therefore, load current can
increase by 0.37A to a total output current of 1.17A while
keeping the LT3089 in its normal operating range.
Protection Features
The LT3089 incorporates several protection features ideal
for harsh industrial and automotive environments, among
other applications. In addition to normal monolithic regulator protection features such as current limiting and thermal
limiting, the LT3089 protects itself against reverse-input
voltages, reverse-output voltages, and large OUT-to-SET
pin voltages.
Current limit protection and thermal overload protection
protect the IC against output current overload conditions.
For normal operation, do not exceed the rated absolute
maximum junction temperature. The thermal shutdown
circuit’s temperature threshold is typically 165°C and
incorporates about 5°C of hysteresis.
As an example, assume: VIN = 5V, VIN(MAX) = 5.5V,
VOUT = 3.3V, VOUT(MIN) = 3.2V, IOUT(MAX) = 0.8A and
IOUT(MIN) = 0.4A. Also, assuming that RP carries no more
than 90% of IOUT(MIN) = 360mA.
The LT3089’s IN pin withstands ±40V voltages with respect
to the OUT and SET pins. Reverse current flow, if OUT is
greater than IN, is less than 1mA (typically under 100µA),
protecting the LT3089 and sensitive loads.
Calculating RP yields:
Clamping diodes and 400Ω limiting resistors protect the
LT3089’s SET pin relative to the OUT pin voltage. These
protection components typically only carry current under
transient overload conditions. These devices are sized to
handle ±10V differential voltages and ±25mA crosspin
current flow without concern. Relative to these application concerns, note the following two scenarios. The first
scenario employs a noise-reducing SET pin bypass
capacitor while OUT is instantaneously shorted to GND. The
second scenario follows improper shutdown techniques
in which the SET pin is reset to GND quickly while OUT
is held up by a large output capacitance with light load.
RP =
5.5V – 3.2V
= 6.39Ω
0.36A
(5% Standard value = 6.2Ω)
The maximum total power dissipation is:
(5.5V – 3.2V) • 0.8A = 1.84W
However, the LT3089 supplies only:
0.8A –
5.5V – 3.2V
= 0.43A
6.2Ω
Therefore, the LT3089’s power dissipation is only:
PDISS = (5.5V – 3.2V) • 0.43A = 0.99W
20
3089f
For more information www.linear.com/LT3089
LT3089
TYPICAL APPLICATIONS
Paralleling Regulators
VIN
IN
LT3089
ISET
50µA
+
–
IMON
OUT
20mΩ
OUT
20mΩ
VOUT
3V
1.6A
ILIM
SET TEMP
1k
IN
LT3089
ISET
50µA
+
–
IMON
SET TEMP
3.01k
1k
RSET
30.1k
1k
3089 TA02
ILIM
Using IMON Cancels Ballast Resistor Drop
VIN
IN
LT3089
ISET
50µA
+
–
IMON
SET TEMP
OUT
RBALLAST
20mΩ
OUT
RBALLAST
20mΩ
ILIM
VOUT
1.5V
1.6A
1k
IN
LT3089
ISET
50µA
+
–
IMON
SET TEMP
RSET
15k
ILIM
3089 TA03
1k
RCOMP
50Ω
3089f
For more information www.linear.com/LT3089
21
LT3089
TYPICAL APPLICATIONS
Load Sharing Without Ballast Resistors
VIN
3V TO 18V
22µF
IN
OUT
IN
22µF
LT3089
SET
0.1µF
20k
OUT
OUT
LT3089
IMON
5.1k
20k
0.1µF
LT3089
IMON
SET
1k
IN
SET
1k
0.1µF
100k
20k
VOUT
1V
2.4A
IMON
1k
100k
+
+
1/2 LT1638
1/2 LT1638
5.1k
–
–
0.47µF
0.47µF
5.1k
5.1k
3089 TA04
Load Current Sharing Without Ballasting
VOUT
1V
1.6A
VIN
3V TO 36V
4.7µF
IN
OUT
LT3089
100Ω
IMON
SET
0.1µF
ILIM
OUT
2.2µF
20k
ILIM
IMON
IN
LT3089
SET
20k
= 2N3904
1k
0.1µF
1k
3089 TA05
22
3089f
For more information www.linear.com/LT3089
LT3089
TYPICAL APPLICATIONS
Boosting Fixed Output Regulators
IN
LT3089
ISET
50µA
+
–
IMON
5V
OUT
20mΩ
ILIM
SET TEMP
20mΩ
LT1963-3.3
3.3VOUT
2.3A
8.2Ω*
10µF
47µF
3089 TA06
6.2k
*4mV DROP ENSURES LT3089 IS OFF WITH NO LOAD
MULTIPLE LT3089s CAN BE USED
Reference Buffer
VIN
IN
LT3089
ISET
50µA
+
–
IMON
SET TEMP
1k
INPUT
LT1019
OUT
VOUT
ILIM
1k
1k*
47µF
OUTPUT
1µF
GND
*MIN LOAD 3mA
3089 TA07
Adding Soft-Start
VIN
4.8V TO 36V
IN
LT3089
10µF
ISET
50µA
+
–
1N4148
IMON
OUT
SET TEMP
1k
ILIM
1k
VOUT
3.3V
0.8A
10µF
3089 TA08
0.1µF
66.5k
3089f
For more information www.linear.com/LT3089
23
LT3089
TYPICAL APPLICATIONS
Using a Lower Value Set Resistor
VIN
12V
4.7µF
IN
LT3089
ISET
50µA
+
–
IMON
OUT
SET TEMP
1k
4.02k
VOUT
0.2V TO 10V
ILIM
1k
40.2Ω
4.7µF
3089 TA09
RSET
2k
VOUT = 0.2V + 5mA • RSET
Using an External Reference Current
VIN
1µF
LT3092
IN
10µA
ISET
50µA
+
–
SET
20k
IN
LT3089
+
–
OUT
OUT
215Ω
IMON
SET TEMP
1k
1k
ILIM
VOUT
0V TO 20V
1µF
3089 TA10
20k
24
1mA
3089f
For more information www.linear.com/LT3089
LT3089
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT3089#packaging for the most recent package drawings.
DF Package
12-Lead Plastic DFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1733 Rev A)
2.50 REF
0.70 ±0.05
3.38 ±0.05
4.50 ±0.05
3.10 ±0.05
2.65 ±0.05
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 ±0.10
(4 SIDES)
2.50 REF
7
12
0.40 ±0.10
3.38 ±0.10
2.65 ±0.10
PIN 1 NOTCH
R = 0.20 TYP OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
6
R = 0.115
TYP
0.75 ±0.05
1
(DF12) DFN 1112 REV A
0.25 ±0.05
0.50 BSC
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. PACKAGE OUTLINE DOES NOT CONFORM TO JEDEC MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3089f
For more information www.linear.com/LT3089
25
LT3089
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT3089#packaging for the most recent package drawings.
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev K)
Exposed Pad Variation BB
4.70
(.185)
3.58
(.141)
DETAIL A
4.90 – 5.10*
(.193 – .201)
0.56
(.022)
REF
3.58
(.141)
NOTE 5
16 1514 13 12 1110
9
NOTE 5
6.60 ±0.10
2.94 3.05
(.116) (.120)
4.50 ±0.10
DETAIL A
SEE NOTE 4
2.94 6.40
(.116) (.252)
BSC
0.53
(.021)
REF
DETAIL A IS THE PART OF THE
LEAD FRAME FEATURE FOR
REFERENCE ONLY
NO MEASUREMENT PURPOSE
1.05 ±0.10
0.65 BSC
0.45 ±0.05
1 2 3 4 5 6 7 8
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.25
REF
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
26
1.10
(.0433)
MAX
0° – 8°
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
FE16 (BB) TSSOP REV K 0913
5. BOTTOM EXPOSED PADDLE MAY HAVE METAL PROTRUSION
IN THIS AREA. THIS REGION MUST BE FREE OF ANY EXPOSED
TRACES OR VIAS ON PBC LAYOUT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
3089f
For more information www.linear.com/LT3089
LT3089
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT3089#packaging for the most recent package drawings.
R Package
7-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1462 Rev F)
.256
(6.502)
.060
(1.524)
TYP
.060
(1.524)
.390 – .415
(9.906 – 10.541)
.165 – .180
(4.191 – 4.572)
.045 – .055
(1.143 – 1.397)
15° TYP
.060
(1.524)
.183
(4.648)
+.008
.004 –.004
+0.203
0.102 –0.102
.059
(1.499)
TYP
.330 – .370
(8.382 – 9.398)
(
)
.095 – .115
(2.413 – 2.921)
.075
(1.905)
DETAIL A
.300
(7.620)
+.012
.143 –.020
+0.305
3.632 –0.508
(
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
)
.026 – .035
(0.660 – 0.889)
TYP
.050
(1.27)
BSC
.013 – .023
(0.330 – 0.584)
.050 ±.012
(1.270 ±0.305)
DETAIL A
0° – 7° TYP
.420
.080
.420
0° – 7° TYP
.276
.350
.325
.205
.585
.585
.320
.090
.050
.035
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
1. DIMENSIONS IN INCH/(MILLIMETER)
2. DRAWING NOT TO SCALE
.090
.050
.035
RECOMMENDED SOLDER PAD LAYOUT
FOR THICKER SOLDER PASTE APPLICATIONS
R (DD7) 0212 REV F
3089f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LT3089
27
LT3089
TYPICAL APPLICATION
High Efficiency Adjustable Supply
VIN
6.3V TO
36V
VIN
BD
RUN/SS BOOST
15k
63.4k
1000pF
VC
RT
PG
LT3680
SYNC GND
0.47µF
SW
IN
6.8µH
47µF
MBRA340T3
590k
OUT
6.04k
6V
MTD2955
FB
LT3089
1k
IMON TEMP
1k
15k
22µF
SET ILIM
500k
VOUT
0V TO 25V,
0.8A
0.1µF
10k
1µF
1k
1µF
2N3904
3089 TA11
CMDSH-4E
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT1764/
LT1764A
3A, Fast Transient Response,
Low Noise LDO
340mV Dropout Voltage, Low Noise: 40µVRMS, VIN = 2.7V to 20V, TO-220, TSSOP and DD-Pak,
LT1764A Version Stable Also with Ceramic Capacitors
LT1963/
LT1963A
1.5A Low Noise, Fast Transient
Response LDO
340mV Dropout Voltage, Low Noise: 40µVRMS, VIN = 2.5V to 20V, LT1963A Version Stable with
Ceramic Capacitors, TO-220, DD, TSSOP, SOT-223 and SO-8 Packages
LT1965
1.1A, Low Noise, Low Dropout
Linear Regulator
290mV Dropout Voltage, Low Noise: 40µVRMS, VIN: 1.8V to 20V, VOUT: 1.2V to 19.5V, Stable with
Ceramic Capacitors, TO-220, DD-Pak, MSOP and 3mm × 3mm DFN Packages
LT3022
1A, Low Voltage, VLDO Linear
Regulator
VIN: 0.9V to 10V, Dropout Voltage: 145mV Typical, Adjustable Output (VREF = VOUT(MIN) = 200mV),
Stable with Low ESR, Ceramic Output Capacitors, 16-Pin DFN (5mm × 3mm) and 16-Lead
MSOP Packages
LT3070/
LT3071
5A, Low Noise, Programmable
VOUT, 85mV Dropout Linear
Regulator with Digital Margining
Dropout Voltage: 85mV, Digitally Programmable VOUT: 0.8V to 1.8V, Digital Output Margining: ±1%,
±3% or ±5%, Low Output Noise: 25µVRMS (10Hz to 100kHz), Parallelable: Use Two for a 10A Output,
Stable with Low ESR Ceramic Output Capacitors (15µF Minimum), 28-Lead 4mm × 5mm QFN Package.
LT3071Has Analog Margining.
LT3080/
LT3080-1
1.1A, Parallelable, Low Noise,
Low Dropout Linear Regulator
300mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V, VOUT: 0V to 35.7V,
Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable (No Op Amp Required),
Stable with Ceramic Capacitors, TO-220, DD-Pak, SOT-223, MS8E and 3mm × 3mm DFN-8 Packages;
LT3080-1 Version Has Integrated Internal Ballast Resistor
LT3081
1.5A Single Resistor Rugged
Linear Regulator with Monitors
Extended Safe Operating Area (SOA). Output Current: 1.5A Stable with/without Input/Output
Capacitors. VIN Range: 1.2V to 36V. 50μA Set Pin Current: TSSOP-16, TO-220, DD-Pak, 4mm x 4mm
DFN-12 Packages.
LT3082
200mA, Parallelable, Single
Resistor, Low Dropout Linear
Regulator
Outputs May Be Paralleled for Higher Output, Current or Heat Spreading, Wide Input Voltage
Range: 1.2V to 40V Low Value Input/Output Capacitors Required: 2.2µF, Single Resistor Sets Output
Voltage 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages
LT3085
500mA, Parallelable, Low Noise,
Low Dropout Linear Regulator
275mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V,
VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable
(No Op Amp Required), Stable with Ceramic Capacitors, MS8E and 2mm × 3mm DFN-6 Packages
LT3092
200mA 2-Terminal Programmable Programmable 2-Terminal Current Source, Maximum Output Current = 200mA, Wide Input Voltage
Current Source
Range: 1.2V to 40V, Resistor Ratio Sets Output Current, Initial Set Pin Current Accuracy = 1%, Current
Limit and Thermal Shutdown Protection, Reverse-Voltage Protection, Reverse-Current Protection,
8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages.
LT3083
Adjustable 3A Single Resistor
Low Dropout Regulator
28
Low Noise: 40µVRMS, 50µA Set Pin Current, Output Adjustable to 0V, Wide Input Voltage Range: 1.2V to 23V
(DD-Pak and TO-220), Low Dropout Operation: 310mV (2 Supplies)
3089f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT3089
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT3089
LT 0116 • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2016