NO 290 bad, Hz, raal plis , usl, ilis) tho The CA124, CA224, CA324, LM324, and LM2902 consist of four independent, high-gain operational amplifiers on a single monolithic substrate. An on-chip capacitor in each of the amplifiers provides frequency compensation for unity gain. These devices are designed specially to operate from either single or dual supplies, and the differential voltage range is equal to the power-supply voltage. Low power drain and an input common-mode voltage range from 0V to V+ -1.5V (single-supply operation) make these devices suitable for battery operation. • Operation from Single or Dual Supplies • Unity-Gain Bandwidth . . . . . . . . . . . . . . . . . . .1MHz (Typ) • DC Voltage Gain . . . . . . . . . . . . . . . . . . . . . . 100dB (Typ) • Input Bias Current . . . . . . . . . . . . . . . . . . . . . . 45nA (Typ) • Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . 2mV (Typ) • Input Offset Current - CA224, CA324, LM324, LM2902 . . . . . . . . . . 5nA (Typ) - CA124. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3nA (Typ) • Replacement for Industry Types 124, 224, 324 Applications Part Number Information PART NUMBER (BRAND) 796.5 Features • Summing Amplifiers TEMP. RANGE (oC) PACKAGE PKG. NO. CA0124E -55 to 125 14 Ld PDIP E14.3 CA0124M (124) -55 to 125 14 Ld SOIC M14.15 CA0124M96 (124) -55 to 125 14 Ld SOIC Tape and Reel M14.15 • Multivibrators • Oscillators • Transducer Amplifiers • DC Gain Blocks Pinout CA124, CA224, CA324, LM2902 (PDIP, SOIC) LM324 (PDIP) TOP VIEW CA0224E -40 to 85 14 Ld PDIP E14.3 CA0224M (224) -40 to 85 14 Ld SOIC M14.15 CA0324E 0 to 70 14 Ld PDIP E14.3 OUTPUT 1 1 CA0324M (324) 0 to 70 14 Ld SOIC M14.15 NEG. INPUT 1 2 CA0324M96 (324) 0 to 70 14 Ld SOIC Tape and Reel M14.15 POS. INPUT 1 3 12 POS. INPUT 4 LM324N 0 to 70 14 Ld PDIP E14.3 V+ 4 11 V- LM2902N -40 to 85 14 Ld PDIP E14.3 POS. INPUT 2 5 10 POS. INPUT 3 LM2902M (2902) -40 to 85 14 Ld SOIC M14.15 NEG. INPUT 2 6 9 NEG. INPUT 3 LM2902M96 (2902) -40 to 85 14 Ld SOIC Tape and Reel M14.15 OUTPUT 2 7 8 OUTPUT 3 14 OUTPUT 4 1 4 2 + 324 Quad, 1MHz, Operational Amplifiers for Commercial, Industrial, and Military Applications File Number + 324 May 2001 + 224 CA124, CA224, CA324, LM324, LM2902 + itle 12 T DUC E NT PRO LACEM E T RE P OLE OB S E N D E D OM M Data Sheet RE C 3 13 NEG. INPUT 4 yds er- 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright © Intersil Americas Inc. 2001 CA124, CA224, CA324, LM324, LM2902 Absolute Maximum Ratings Thermal Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32V or ±16V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 32V Input Current (VI < -0.3V, Note 1) . . . . . . . . . . . . . . . . . . . . . . 50mA Output Short Circuit Duration (V+ ≤ 15V, Note 2) . . . . . .Continuous Thermal Resistance (Typical, Note 3) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package). . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Range CA124 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CA224, LM2902 . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CA324, LM324 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. This input current will only exist when the voltage at any of the input leads is driven negative. This current is due to the collector base junction of the input p-n-p transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral n-p-n parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the amplifiers to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This transistor action is not destructive and normal output states will reestablish when the input voltage, which was negative, again returns to a value greater than -0.3V. 2. The maximum output current is approximately 40mA independent of the magnitude of V+. Continuous short circuits at V+ > 15V can cause excessive power dissipation and eventual destruction. Short circuits from the output to V+ can cause overheating and eventual destruction of the device. 3. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications Values Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified TEST CONDITIONS CA124 CA224, CA324, LM324 LM2902 TEMP. (oC) MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS 25 - 2 5 - 2 7 - - - mV Full - - 7 - - 9 - - 10 mV Full - 7 - - 7 - - 7 - µV/oC Full - - V+ - - V+ - - V+ V V+ = 30V 25 0 - V+ -1.5 0 - V+ -1.5 - - - V V+ = 30V Full 0 - V+ -2 0 - V+ -2 - - - V V+ = 26V Full - - - - - - 0 - V+ -2 V Common Mode Rejection Ratio DC 25 70 85 - 65 70 - - - - dB Power Supply Rejection Ratio DC 25 65 100 - 65 100 - - - - dB Input Bias Current (Note 4) II+ or II- 25 - 45 150 - 45 250 - - - nA II+ or II- Full - - 300 - - 500 - 40 500 nA Input Offset Current II+ - II- 25 - 3 30 - 5 50 - - - nA II+ - II- Full - - 100 - - 150 - 45 200 nA Full - 10 - - 10 - - 10 - pA/oC RL ≥ 2kΩ, V+ = 15V (For Large VO Swing) 25 94 100 - 88 100 - - - - dB RL ≥ 2kΩ, V+ = 15V (For Large VO Swing) Full 88 - - 83 - - 83 - - dB PARAMETER Input Offset Voltage (Note 6) Average Input Offset Voltage Drift RS = 0Ω Differential Input Voltage (Note 5) Input Common Mode Voltage Range (Note 5) Average Input Offset Current Drift Large Signal Voltage Gain 2 CA124, CA224, CA324, LM324, LM2902 Electrical Specifications Values Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified (Continued) CA224, CA324, LM324 LM2902 MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS RL = 2kΩ 25 0 - V+ -1.5 0 - V+ -1.5 - - - V RL = 2kΩ, V+ = 30V Full 26 - - 26 - - - - - V RL = 2kΩ, V+ = 26V Full - - - - - - 22 - - V RL = 10kΩ, V+ = 30V Full 27 28 - 27 28 - 23 28 - V Low Level RL = 10kΩ Full - 5 20 - 5 20 - 5 100 mV Source VI+ = +1V, VI- = 0V, V+ = 15V 25 20 40 - 20 40 - - - - mA VI+ = 1V, VI- = 0, V+ = 15V Full 10 20 - 10 20 - 10 20 - mA VI+ = 0V, VI- = 1V, V+ = 15V 25 10 20 - 10 20 - - - - mA VI+ = 0V, VI- = 1V, VO = 200mV 25 12 50 - 12 50 - - - - µA VI- = 1V, VI+ = 0, V+ = 15V Full 5 8 - 5 8 - 5 8 - mA Crosstalk f = 1 to 20kHz (Input Referred) 25 - -120 - - -120 - - - - dB Total Supply Current RL = ∞ Full - 0.8 2 - 0.8 2 - 0.7 1.2 mA RL = ∞, V+ = 26V Full - - - - - - - 1.5 3 mA Output Voltage Swing High Level Output Current Sink TEST CONDITIONS CA124 TEMP. (oC) PARAMETER NOTES: 4. Due to the PNP input stage the direction of the input current is out of the IC. No loading change exists on the input lines because the current is essentially constant, independent of the state of the output. 5. The input signal voltage and the input common mode voltage should not be allowed to go negative by more than 0.3V. The positive limit of the common mode voltage range is V+ - 1.5V, but either or both inputs can go to +32V without damage. 6. VO = 1.4V, RS = 0Ω with V+ from 5V to 30V, and over the full input common mode voltage range (0V to V+ - 1.5V). Schematic Diagram (One of Four Operational Amplifiers) V+ 4 TO 2, 3, 4 6µA 100 µA 4µA 5 + 6 - 2 Q2 - 2 CCOMP Q3 Q5 Q6 Q4 Q1 INPUTS + 3 Q7 Q10 1 VO Q13 Q12 50µA TO 2, 3, 4 3 + 13 - RSC Q9 V- 11 12 4 Q11 Q8 7 10 + 9 - 3 8 4 CA124, CA224, CA324, LM324, LM2902 Typical Performance Curves TA = 25 oC V+ = 30V TA = -40 ≤ TA ≤ 85 oC 120 0.1µF 4 V+ 2 + 100 VI 80 1 500 VO 3 11 V+/2 60 40 V+ = 10 TO 15V V+ = 26V 20 - 2 OUTPUT VOLTAGE (mV) 450 50pF VI 400 1 VO + 3 INPUT 350 OUTPUT 300 0 250 1 10 100 1K 10K 100K FREQUENCY (Hz) 1M 10M 0 FIGURE 1. OPEN LOOP FREQUENCY RESPONSE 1 2 4 5 TIME (µs) 6 7 8 9 FIGURE 2. VOLTAGE FOLLOWER PULSE RESPONSE (SMALL SIGNAL) TA = 25 oC V+ = 15V RL = 2kΩ 4 3 2 1 INPUT VOLTAGE (V) 3 0 4 OUTPUT VOLTAGE (V) OPEN-LOOP VOLTAGE GAIN (dB) 140 3 2 1 0 10 20 30 TIME (µs) 40 FIGURE 3. VOLTAGE FOLLOWER PULSE RESPONSE (LARGE SIGNAL) VICR = 0V V+ 60 V+ = 30V 50 INPUT CURRENT (nA) SUPPLY CURRENT (mA) mA 15V 40 30 5V 20 ID 4 2 4 3 - + 1 11 3 2 TA = 0 oC TO 125 oC 1 10 -55oC 0 -75 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 4. INPUT CURRENT vs AMBIENT TEMPERATURE 4 0 0 5 10 15 20 25 30 POSITIVE SUPPLY VOLTAGE (V) FIGURE 5. SUPPLY CURRENT vs SUPPLY VOLTAGE CA124, CA224, CA324, LM324, LM2902 Typical Performance Curves (Continued) 20 V+ = 15V 4 +15V 1kΩ 15 OUTPUT SOURCE CURRENT (mA) OUTPUT VOLTAGE SWING (V) 70 100kΩ TA = 25oC 2 +7V 3 - 1 + VI 11 VO 2kΩ 10 5 10K 100K 50 40 30 20 10 0 -75 0 1K 60 1M -50 -25 FREQUENCY (Hz) FIGURE 6. LARGE SIGNAL FREQUENCY RESPONSE 50 75 100 125 TA = 25 oC OPEN LOOP VOLTAGE GAIN (dB) 75 INPUT CURRENT (nA) 25 FIGURE 7. OUTPUT CURRENT vs AMBIENT TEMPERATURE TA = 25oC 50 25 0 0 TEMPERATURE (oC) 10 20 30 POSITIVE SUPPLY VOLTAGE (V) 40 FIGURE 8. INPUT CURRENT vs SUPPLY VOLTAGE 5 150 125 RL = 20kΩ 100 RL = 2kΩ 75 50 25 0 0 10 20 30 40 POSITIVE SUPPLY VOLTAGE (V) FIGURE 9. VOLTAGE GAIN vs SUPPLY VOLTAGE CA124, CA224, CA324, LM324, LM2902 Dual-In-Line Plastic Packages (PDIP) E14.3 (JEDEC MS-001-AA ISSUE D) 14 LEAD DUAL-IN-LINE PLASTIC PACKAGE N E1 INDEX AREA 1 2 3 INCHES N/2 -B- -AD E BASE PLANE -C- A2 SEATING PLANE A L D1 e B1 D1 A1 eC B 0.010 (0.25) M C A B S MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.045 0.070 1.15 1.77 8 eA C 0.008 0.014 C D 0.735 0.775 18.66 eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 0.005 - 0.13 - 5 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC eA 0.300 BSC eB - L 0.115 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. N 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm). 6 5 E 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 0.355 19.68 D1 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 0.204 14 2.54 BSC - 7.62 BSC 6 0.430 - 0.150 2.93 10.92 3.81 14 7 4 9 Rev. 0 12/93 CA124, CA224, CA324, LM324, LM2902 Small Outline Plastic Packages (SOIC) M14.15 (JEDEC MS-012-AB ISSUE C) 14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE N INDEX AREA 0.25(0.010) M H B M E INCHES -B- 1 2 3 L SEATING PLANE -A- h x 45o A D -C- e µα B 0.25(0.010) M C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.3367 0.3444 8.55 8.75 3 E 0.1497 0.1574 3.80 4.00 4 e A1 B S 0.050 BSC 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 N NOTES: MILLIMETERS α 14 0o 1.27 6 14 8o 0o 7 8o Rev. 0 12/93 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at website www.intersil.com/design/quality/iso.asp. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. 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