LM3670 www.ti.com SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 LM3670 Miniature Step-Down DC-DC Converter for Ultra Low Voltage Circuits Check for Samples: LM3670 FEATURES 1 • 2 • • • • • • • • • • • VOUT = Adj (0.7V min), 1.2, 1.5, 1.6, 1.8, 1.875, 2.5, 3.3V 2.5V ≤ VIN ≤ 5.5V 15 µA typical quiescent current 350 mA maximum load capability 1 MHz PWM fixed switching frequency (typ.) Automatic PFM/PWM mode switching Available in fixed output voltages as well as an adjustable version SOT23-5 package Low drop out operation - 100% duty cycle mode Internal synchronous rectification for high efficiency Internal soft start 0.1 µA typical shutdown current • • • Operates from a single Li-Ion cell or 3 cell NiMH/NiCd batteries Only three tiny surface-mount external components required (one inductor, two ceramic capacitors) Current overload protection APPLICATIONS • • • • • • Mobile phones HandHeld PDAs Palm-top PCs Portable Instruments Battery Powered Devices DESCRIPTION The LM3670 step-down DC-DC converter is optimized for powering ultra-low voltage circuits from a single Li-Ion cell or 3 cell NiMH/NiCd batteries. It provides up to 350 mA load current, over an input voltage range from 2.5V to 5.5V. There are several different fixed voltage output options available as well as an adjustable output voltage version (see ordering information). The device offers superior features and performance for mobile phones and similar portable applications with complex power management systems. Automatic intelligent switching between PWM low-noise and PFM lowcurrent mode offers improved system control. During full-power operation, a fixed-frequency 1 MHz (typ). PWM mode drives loads from ∼70 mA to 350 mA max, with up to 95% efficiency. Hysteretic PFM mode extends the battery life through reduction of the quiescent current to 15 µA (typ) during light current loads and system standby. Internal synchronous rectification provides high efficiency (90 to 95% typ. at loads between 1 mA and 100 mA). In shutdown mode (Enable pin pulled low) the device turns off and reduces battery consumption to 0.1 µA (typ.). The LM3670 is available in a SOT23-5 package. A high switching frequency - 1 MHz (typ) - allows use of tiny surface-mount components. Only three external surface-mount components, an inductor and two ceramic capacitors, are required. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2006, Texas Instruments Incorporated LM3670 SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 www.ti.com Typical Application VIN 2.5V to 5.5V L1:10uH VIN CIN 4.7uF 1 5 VOUT SW COUT 10uF LM3670 GND 2 EN FB 3 4 Figure 1. Fixed Output Voltage - Typical Application Circuit L1: 4.7 µH or 10 µH * VIN 2.5V to 5.5V VIN 1 5 * See Adj table VOUT SW LM3670 CIN: 4.7 µF GND 2 C1 R1 C2 R2 COUT: 10 µF FB EN 3 4 Figure 2. Adjustable Output Voltage - Typical Application Circuit Connection Diagram and Package Mark Information SW 5 VIN 1 FB 4 GND 2 EN 3 NOTE: The actual physical placement of the package marking will vary from part to part. Figure 3. SOT23-5 Package (Top View) Table 1. Pin Descriptions Pin # 2 Name Description 1 VIN 2 GND Power supply input. Connect to the input filter capacitor (Figure 1). 3 EN Enable input. 4 FB Feedback analog input. Connect to the output filter capacitor (Figure 1). 5 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier. Connect to an inductor with a saturation current rating that exceeds the 750 mA max. Switch Peak Current Limit specification. Ground pin. Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 LM3670 www.ti.com SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) −0.2V to 6.0V VIN Pin: Voltage to GND −0.2V to 6.0V EN Pin: Voltage to GND FB, SW Pin: (GND−0.2V) to (VIN + 0.2V) −45°C to +125°C Junction Temperature (TJ-MAX) −45°C to +150°C Storage Temperature Range Maximum Lead Temperature ESD Rating (Soldering, 10 sec.) 260°C (2) Human Body Model: VIN, SW, FB, EN, GND 2.0kV Machine Model: 200V (1) (2) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. MIL-STD-883 3015.7 Operating Ratings (1) (2) Input Voltage Range 2.5V to 5.5V Recommended Load Current 0A to 350 mA Junction Temperature (TJ) Range −40°C to +125°C Ambient Temperature (TA) Range −40°C to +85°C (1) (2) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. All voltages are with respect to the potential at the GND pin. Thermal Properties Junction-to-Ambient Thermal Resistance (θJA) (SOT23-5) 250°C/W Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 3 LM3670 SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 www.ti.com Electrical Characteristics Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the full operating junction temperature range (−40°C ≤ TJ ≤ +125°C). Unless otherwise noted VIN = 3.6V, VOUT = 1.8V, IO = 150mA, EN = VIN Symbol Parameter VIN Input Voltage Range VOUT Fixed Output Voltage: 1.2V Fixed Output Voltage: 1.5V Fixed Output Voltage: 1.6V, 1.875V Fixed Output Voltage: 1.8V Fixed Output Voltage: 2.5V, 3.3V Adjustable Output Voltage (2) Condition Max Units 2.5 5.5 V 2.5V ≤ VIN ≤ 5.5V IO = 10 mA -2.0 +4.0 % 2.5V ≤ VIN ≤ 5.5V 0 mA ≤ IO ≤ 150 mA -4.5 +4.0 2.5V ≤ VIN ≤ 5.5V IO = 10 mA -2.5 +4.0 2.5V ≤ VIN ≤ 5.5V 0 mA ≤ IO ≤ 350 mA -5.0 +4.0 2.5V ≤ VIN ≤ 5.5V IO = 10 mA -2.5 +4.0 2.5V ≤ VIN ≤ 5.5V 0 mA ≤ IO ≤ 350 mA -5.5 +4.0 2.5V ≤ VIN ≤ 5.5V IO = 10 mA -1.5 +3.0 2.5V ≤ VIN ≤ 5.5V 0 mA ≤ IO ≤ 350 mA −4.5 +3.0 3.6V ≤ VIN ≤ 5.5V IO = 10 mA -2.0 +4.0 3.6V ≤ VIN ≤ 5.5V 0 mA ≤ IO ≤ 350 mA -6.0 +4.0 2.5V ≤ VIN ≤ 5.5V IO = 10 mA -2.5 +4.5 2.5V ≤ VIN ≤ 5.5V 0 mA ≤ IO ≤ 150 mA -4.0 +4.5 (1) Min Typ % % % % % Line_reg Line Regulation 2.5V ≤ VIN ≤ 5.5V IO = 10 mA Load_reg Load Regulation 150 mA ≤ IO ≤ 350 mA VREF Internal Reference Voltage IQ_SHDN Shutdown Supply Current TA=85ºC 0.1 1 µA IQ DC Bias Current into VIN No load, device is not switching (VOUT forced higher than programmed output voltage) 15 30 µA VUVLO Minimum VIN below which VOUT will be disabled RDSON (P) Pin-Pin Resistance for PFET VIN=VGS=3.6V 360 690 mΩ RDSON (N) Pin-Pin Resistance for NFET VIN=VGS=3.6V 250 660 mΩ ILKG (P) P Channel Leakage Current VDS=5.5V 0.1 1 µA ILKG (N) N Channel Leakage Current VDS=5.5V 0.1 1.5 µA 620 750 mA ILIM Switch Peak Current Limit η Efficiency (VIN = 3.6V, VOUT = 1.8V) Logic High Input VIL Logic Low Input (1) (2) 4 %/V 0.0014 %/mA 0.5 V V 2.4 400 ILOAD = 1 mA 91 ILOAD = 10 mA 94 ILOAD = 100 mA 94 ILOAD = 200 mA 94 ILOAD = 300 mA 92 ILOAD = 350 mA VIH 0.26 % 90 1.3 V 0.4 V The input voltage range recommended for the specified output voltages are given below: VIN = 2.5V to 5.5V for 0.7V ≤ VOUT < 1.875VVIN = ( VOUT + VDROP OUT) to 5.5V for 1.875 ≤ VOUT≤ 3.3VWhere VDROP OUT = ILOAD * (RDSON (P) + RINDUCTOR) Output voltage specification for the adjustable version includes tolerance of the external resistor divider. Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 LM3670 www.ti.com SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 Electrical Characteristics (continued) Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the full operating junction temperature range (−40°C ≤ TJ ≤ +125°C). Unless otherwise noted VIN = 3.6V, VOUT = 1.8V, IO = 150mA, EN = VIN Symbol Parameter Condition IEN Enable (EN) Input Current FOSC Internal Oscillator Frequency PWM Mode Min 550 Typ Max Units 0.01 1 µA 1000 1300 kHz VIN EN SW Current Limit Comparator Ramp Generator + Undervoltage Lockout Soft Start Ref1 PFM Current Comparator + Thermal Shutdown 1 MHz Oscillator Bandgap Ref2 PWM Comparator Error Amp + - Control Logic Driver pfm_low 0.5V + - pfm_hi + - Vcomp 1.0V + VREF Zero Crossing Comparator Frequency Compensation Adj Version Fixed Version GND FB Figure 4. Simplified Functional Diagram Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 5 LM3670 SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 www.ti.com Typical Performance Characteristics (unless otherwise stated: VIN= 3.6V, VOUT= 1.8V) IQ (Non-switching) vs. VIN IQ vs. Temp 0.1 TA = 85°C ISHUTDOWN (PA) NO LOAD IQUIESCENT (PA) 20 TA = 25°C 15 TA = -40°C 10 2.5 3 3.5 4 4.5 5 0.05 0 -40 5.5 -20 0 VOUT vs. VIN 1.86 1.84 VOUT (V) VOUT (V) IOUT = 150 mA PWM mode PFM Mode 1.82 PWM Mode 1.8 1.78 1.76 VIN = 5.5V 1.78 VIN = 2.5V 1.74 VIN = 3.6V 1.72 1.7 -20 0 20 40 60 0 80 50 100 Efficiency vs. IOUT 200 250 300 350 Efficiency vs. VIN 100 90 150 ILOAD (mA) TEMPERATURE (°C) 95 80 1.88 VIN = 3.6V IOUT = 10 mA PFM mode 1.79 1.77 -40 60 1.9 1.81 1.80 40 VOUT vs. IOUT 1.83 1.82 20 TEMPERATURE (°C) VIN (V) 100 VIN = 2.7V ILOAD = 150 mA 95 EFFICIENCY (%) EFFICIENCY (%) 85 80 75 VIN = 5.0V 70 65 60 90 ILOAD = 1 mA 85 ILOAD = 300 mA 80 VIN = 3.7V 55 50 75 45 40 -2 10 10 -1 10 0 10 1 10 2 10 3 ILOAD (mA) 6 70 2.5 3 3.5 4 4.5 5 5.5 6 VIN (V) Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 LM3670 www.ti.com SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 Typical Performance Characteristics (continued) (unless otherwise stated: VIN= 3.6V, VOUT= 1.8V) RDSON vs. VIN P & N Channel 0.8 1010 1000 ILOAD = 150 mA 990 VIN = 3.6V 980 VIN = 5.5V 970 960 950 VIN = 2.5V 940 930 920 910 900 890 880 870 860 850 840 -40 -20 0 10 20 30 40 50 60 70 80 -30 -10 P FET N FET 0.7 RDSon - N, P CHANNEL (:) FREQUENCY (kHz) Frequency vs. Temperature TA = 85°C TA = 25°C TA = -40°C 0.6 0.5 0.4 0.3 0.2 0.1 2.5 3 3.5 4 4.5 5 5.5 VIN (V) TEMPERATURE (°C) Line Transient (VIN = 2.6V to 3.6V, ILOAD = 100 mA) Line Transient (VIN = 3.6V to 4.6V , ILOAD = 100 mA) IOUT = 100 mA VIN = 3.6V VIN = 4.6V VIN rise time = 10 Ps VIN = 3.6V LINE TRANSIENT LINE TRANSIENT VIN = 2.6V VOUT = 1.8V (20 mV/ Div) TIME (200 Ps/DIV) TIME (100 Ps/DIV) Load Transient ILOAD = 0mA to 70mA CURRENT LOAD STEP (0 mA - 70 mA) Load Transient ILOAD = 3mA to 280mA CURRENT LOAD STEP (3 mA - 280 mA) VOUT = 1.8V (20 mV/ Div) VOUT (50 mV/Div) ILOAD = 280 mA ILOAD = 3 mA VOUT (50 mV/Div) Inductor Current = 200 mA/Div ILOAD = 70 mA ILOAD = 0 mA TIME (100 Ps/DIV) TIME (100 Ps/DIV) Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 7 LM3670 SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 www.ti.com Typical Performance Characteristics (continued) (unless otherwise stated: VIN= 3.6V, VOUT= 1.8V) Load Transient ILOAD = 0mA to 350mA CURRENT LOAD STEP (0 mA - 350 mA) CURRENT LOAD STEP (0 mA - 280 mA) Load Transient ILOAD = 0mA to 280mA VOUT (50 mV/Div) ILOAD = 280 mA ILOAD = 0 mA VOUT (50 mV/Div) ILOAD = 350 mA ILOAD = 0 mA TIME (100 Ps/DIV) TIME (100 Ps/DIV) Load Transient ILOAD = 100mA to 300mA CURRENT LOAD STEP (100 mA - 300 mA) CURRENT LOAD STEP (50 mA - 350 mA) Load Transient ILOAD = 50mA to 350mA VOUT (50 mV/Div) ILOAD = 350 mA ILOAD = 50 mA TIME (100 Ps/DIV) ILOAD = 300 mA ILOAD = 100 mA PWM Mode VSW, VOUT, IINDUCTOR vs. Time ILOAD = 150 mA VSWITCH (5V/Div) VOUT (20 mV/Div) PWM MODE PFM MODE Inductor Current = 200 mA/ Div TIME (100 Ps/DIV) PFM Mode VSW, VOUT, IINDUCTOR vs. Time Inductor Current (100 mA/Div) VSWITCH (5V/Div) VOUT (20 mV/Div) Inductor Current (200 mA/Div) TIME (1 Ps/DIV) TIME (2 Ps/DIV) 8 VOUT (50 mV/Div) Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 LM3670 www.ti.com SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 Typical Performance Characteristics (continued) (unless otherwise stated: VIN= 3.6V, VOUT= 1.8V) CURRENT LOAD STEP (3 mA - 280 mA) Soft Start VIN, VOUT, IINDUCTOR vs. Time (ILOAD = 350mA) VIN (2V/Div) VOUT (1V/Div) Inductor Current (200 mA/ Div) TIME (100 Ps/DIV) Operation Description DEVICE INFORMATION The LM3670, a high efficiency step down DC-DC switching buck converter, delivers a constant voltage from either a single Li-Ion or three cell NiMH/NiCd battery to portable devices such as cell phones and PDAs. Using a voltage mode architecture with synchronous rectification, the LM3670 has the ability to deliver up to 350 mA depending on the input voltage and output voltage (voltage head room), and the inductor chosen (maximum current capability). There are three modes of operation depending on the current required - PWM (Pulse Width Modulation), PFM (Pulse Frequency Modulation), and shutdown. PWM mode handles current loads of approximately 70 mA or higher. Lighter output current loads cause the device to automatically switch into PFM for reduced current consumption (IQ = 15 µA typ) and a longer battery life. Shutdown mode turns off the device, offering the lowest current consumption (ISHUTDOWN = 0.1 µA typ). The LM3670 can operate up to a 100% duty cycle (PMOS switch always on) for low drop out control of the output voltage. In this way the output voltage will be controlled down to the lowest possible input voltage. Additional features include soft-start, under voltage lock out, current overload protection, and thermal overload protection. As shown in Figure 1, only three external power components are required for implementation. CIRCUIT OPERATION The LM3670 operates as follows. During the first portion of each switching cycle, the control block in the LM3670 turns on the internal PFET switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of VIN-VOUT (1) L by storing energy in a magnetic field. During the second portion of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the NFET to the output filter capacitor and load, which ramps the inductor current down with a slope of -VOUT (2) L The output filter stores charge when the inductor current is high, and releases it when low, smoothing the voltage across the load. Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 9 LM3670 SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 www.ti.com PWM OPERATION During PWM operation the converter operates as a voltage-mode controller with input voltage feed forward. This allows the converter to achieve excellent load and line regulation. The DC gain of the power stage is proportional to the input voltage. To eliminate this dependence, feed forward inversely proportional to the input voltage is introduced. Internal Synchronous Rectification While in PWM mode, the LM3670 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier diode. Current Limiting A current limit feature allows the LM3670 to protect itself and external components during overload conditions PWM mode implements cycle-by-cycle current limiting using an internal comparator that trips at 620 mA (typ). PFM OPERATION At very light load, the converter enters PFM mode and operates with reduced switching frequency and supply current to maintain high efficiency. The part automatically transition into PFM mode when either of two conditions occurs for a duration of 32 or more clock cycles: A. The inductor current becomes discontinuous B. The peak PMOS switch current drops below the IMODE level: IMODE < 26 mA + VIN (typ) (3) 50: During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage in PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy load. The PFM comparator senses the output voltage via the feedback pin and control the switching of the output FETs such that the output voltage ramps between 0.8% and 1.6% (typ) above the nominal PWM output voltage. If the output voltage is below the ‘high’ PFM comparator threshold, the PMOS power switch is turned on. It remains on until the output voltage exceeds the ‘high’ PFM threshold or the peak current exceeds the IPFM level set for PFM mode. The peak current in PFM mode is: IPFM Peak = 117 mA + VIN 64: (typ) (4) Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output voltage is below the ‘high’ PFM comparator threshold (see Figure 5), the PMOS switch is again turned on and the cycle is repeated until the output reaches the desired level. Once the output reaches the ‘high’ PFM threshold, the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output switches are turned off and the part enters an extremely low power mode. Quiescent supply current during this ‘sleep’ mode is less than 30 µA, which allows the part to achieve high efficiencies under extremely light load conditions. When the output drops below the ‘low’ PFM threshold, the cycle repeats to restore the output voltage to ∼1.6% above the nominal PWM output voltage. If the load current should increase during PFM mode (see Figure 5) causing the output voltage to fall below the ‘low2’ PFM threshold, the part automatically transitions into fixed-frequency PWM mode. 10 Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 LM3670 www.ti.com SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 Z A x i s PFM Mode at Light Load High PFM Threshold ~1.016*Vout Load current increases ZAx is High PFM Voltage Threshold reached, go into sleep mode Low2 PFM Threshold, switch back to PWMmode Current load increases, draws Vout towards Low2 PFM Threshold Low PFM Threshold, turn on PFET xis Z-A Pfet on until Ipfm limit reached Nfet on drains conductor current until I inductor=0 Low1 PFM Threshold ~1.008*Vout Low2 PFM Threshold Vout PWM Mode at Moderate to Heavy Loads Figure 5. Operation in PFM Mode and Transition to PWM Mode Soft-Start The LM3670 has a soft-start circuit that limits in-rush current during start-up. Typical start-up times with a 10µF output capacitor and 350mA load is 400µs: Inrush Current (mA) Duration (µSec) 0 32 70 224 140 256 280 256 620 until soft start ends LDO - Low Drop Out Operation The LM3670 can operate at 100% duty cycle (no switching, PMOS switch is completely on) for low drop out support of the output voltage. In this way the output voltage is controlled down to the lowest possible input voltage. The minimum input voltage needed to support the output voltage is VIN,MIN = ILOAD * (RDSON,PFET + RINDUCTOR) + VOUT (5) • ILOAD Load current • RDSON, PFET Drain to source resistance of PFET switch in the triode region • RINDUCTOR Inductor resistance Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 11 LM3670 SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 www.ti.com Application Information OUTPUT VOLTAGE SELECTION FOR ADJUSTABLE LM3670 The output voltage of the adjustable parts can be programmed through the resistor network connected from VOUT to VFB then to GND. VOUT is adjusted to make VFB equal to 0.5V. The resistor from VFB to GND (R2) should be at least 100KΩ to keep the current sunk through this network well below the 15µA quiescent current level (PFM mode with no switching) but large enough that it is not susceptible to noise. If R2 is 200KΩ, and VFB is 0.5V, then the current through the resistor feedback network is 2.5µA (IFB =0.5V/R2). The output voltage formula is: VOUT = VFB * ( • • • • R1 R2 + 1) (6) VOUT Output Voltage (V) VFB Feedback Voltage (0.5V typ) R1 Resistor from VOUT to VFB (Ω) R2 Resistor from VOUT to GND (Ω) For any output voltage greater than or equal to 0.7V a frequency zero must be added at 10kHz for stability. The formula is: C1 = 1 2 *S * R1 *10 kHz (7) For any output voltages below 0.7 and above or equal to 2.5V, a pole must also be placed at 10kHz as well. The lowest output voltage possible is 0.7V. At low output voltages the duty cycle is very small and, as the input voltage increases, the duty cycle decreases even further. Since the duty cycle is so low any change due to noise is an appreciable percentage. In other words, it is susceptible to noise. Capacitors C1 and C2 act as noise filters rather than frequency poles and zeros. If the pole and zero are at the same frequency the formula is: C2 = 1 2 *S * R2 *10 kHz (8) A pole can also be used at higher output voltages. For example, in the table Table 4, there is an entry for 1.24V with both a pole and zero at approximately 10kHz for noise rejection. INDUCTOR SELECTION There are two main considerations when choosing an inductor; the inductor current should not saturate, and the inductor current ripple is small enough to achieve the desired output voltage ripple. There are two methods to choose the inductor current rating. Method 1: The total current is the sum of the load and the inductor ripple current. This can be written as IMAX = ILOAD + IRIPPLE VOUT = ILOAD + ( • • • • • 2 VIN-VOUT 2 *L (9) )( VOUT VIN )( 1 f ) (10) ILOAD load current VIN input voltage L inductor f switching frequency IRIPPLE peak-to-peak Method 2: A more conservative approach is to choose an inductor that can handle the current limit of 700 mA. Given a peak-to-peak current ripple (IPP) the inductor needs to be at least 12 Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 LM3670 www.ti.com L >= ( SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 VIN - VOUT I PP )*( VOUT VIN 1 )*( ) f (11) A 10 µH inductor with a saturation current rating of at least 800 mA is recommended for most applications. The inductor’s resistance should be less than around 0.3Ω for good efficiency. Table 2 lists suggested inductors and suppliers. For low-cost applications, an unshielded bobbin inductor is suggested. For noise critical applications, a toroidal or shielded-bobbin inductor should be used. A good practice is to lay out the board with overlapping footprints of both types for design flexibility. This allows substitution of a low-noise toroidal inductor, in the event that noise from low-cost bobbin models is unacceptable. INPUT CAPACITOR SELECTION A ceramic input capacitor of 4.7 µF is sufficient for most applications. A larger value may be used for improved input voltage filtering. The input filter capacitor supplies current to the PFET switch of the LM3670 in the first half of each cycle and reduces voltage ripple imposed on the input power source. A ceramic capcitor’s low ESR provides the best noise filtering of the input voltage spikes due to this rapidly changing current. Select an input filter capacitor with a surge current rating sufficient for the power-up surge from the input power source. The power-up surge current is approximately the capacitor’s value (µF) times the voltage rise rate (V/µs). The input current ripple can be calculated as: I RMS = I OUTMAX * VOUT VIN The worst case IRMS is: IRMS IRMS = 2 * (1 - VOUT VIN ) (duty cycle = 50%) (12) Table 2. Suggested Inductors and Their Suppliers Model Vendor Phone FAX IDC2512NB100M Vishay 408-727-2500 408-330-4098 DO1608C-103 Coilcraft 847-639-6400 847-639-1469 ELL6RH100M Panasonic 714-373-7366 714-373-7323 CDRH5D18-100 Sumida 847-956-0666 847-956-0702 OUTPUT CAPACITOR SELECTION The output filter capacitor smoothes out current flow from the inductor to the load, maintaining a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR to perform these functions. The output ripple current can be calculated as: Voltage peak-to-peak ripple due to capacitance = VPP-C = IPP f*8*C (13) Voltage peak-to-peak ripple due to ESR = VOUT = VPP-ESR = IPP * RESR (14) Voltage peak-to-peak ripple, root mean squared = VPP-RMS = VPP-C2 + VPP-ESR2 (15) Note that the output ripple is dependent on the current ripple and the equivalent series resistance of the output capacitor (RESR). Because these two components are out of phase the rms value is used. The RESR is frequency dependent (as well as temperature dependent); make sure the frequency of the RESR given is the same order of magnitude as the switching frequency. Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 13 LM3670 SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 www.ti.com Table 3. Suggested Capacitors and Their Suppliers Model Type Vendor Phone FAX 10 µF for COUT VJ1812V106MXJAT Ceramic2 Vishay3 408-727-25004 408-330-4098 5 LMK432BJ106MM Ceramic Taiyo-Yuden 847-925-0888 847-925-0899 JMK325BJ106MM Ceramic Taiyo-Yuden 847-925-0888 847-925-0899 4.7 µF for CIN VJ1812V475MXJAT Ceramic Vishay 408-727-2500 408-330-4098 EMK325BJ475MN Ceramic Taiyo-Yuden 847-925-0888 847-925-0899 C3216X5R0J475M Ceramic TDK 847-803-6100 847-803-6296 Table 4. Adjustable LM3670 Configurations for Various VOUT (1) VOUT (V) R1 (KΩ) R2 (KΩ) C1 (pF) C2 (pF) L (µH) CIN (µF) COUT (µF) 0.7 80.6 200 200 150 4.7 4.7 10 0.8 120 200 130 none 4.7 4.7 10 0.9 160 200 100 none 4.7 4.7 10 1.0 200 200 82 none 4.7 4.7 10 1.1 240 200 68 none 4.7 4.7 10 1.2 280 200 56 none 4.7 4.7 10 1.24 300 200 56 none 4.7 4.7 10 1.24 221 150 75 120 4.7 4.7 10 1.5 402 200 39 none 10 4.7 10 1.6 442 200 39 none 10 4.7 10 1.7 487 200 33 none 10 4.7 10 1.875 549 200 30 none 10 4.7 14.7 2.5 806 200 22 82 10 4.7 22 (1) (10 || 4.7) BOARD LAYOUT CONSIDERATIONS PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or instability. 14 Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 LM3670 www.ti.com SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 The light shaded area is the top surface ground. COUT, CIN, Feedback R and C grounds all come to this area which is as far away from the SW pin as possible to avoid the noise created at the SW pin. Note that the top and bottom GND sides are kept away from the SW pin to EN,GND,VIN,FB,SW are the pads for the SOT23-5 package EN POST PIN avoid picking up noise from the SW pin which swings from GND to VIN. EN post pin is connected to EN with a bottom side trace to maintain unbroken ground plane on top of board VIN GND CIN As many through holes as possible here to connect the top and bottom ground planes E N G N D The VIN, SW, VOUT traces, CIN, COUT traces & pads should be thick - they are high current paths Bottom surface - the darker shaded area is all GND EXCEPT for area around SW to avoid picking up switch noise. SW node is switching R2_fb between VIN and GND at 1 MHz - VERY NOISY! keep all GNDs and GND planes away! C2_fb COUT SS W W F B R1_fb C1_fb VOUT If possible put the feedback Rs and Cs on the back side so the COUT GND can move closer to the IC GND L1 Figure 6. Board Layout Design Rules for the LM3670 Good layout for the LM3670 can be implemented by following a few simple design rules, as illustrated in . 1. Place the LM3670, inductor and filter capacitors close together and make the traces short. The traces between these components carry relatively high switching currents and act as antennas. Following this rule reduces radiated noise. Place the capacitors and inductor within 0.2 in. (5 mm) of the LM3670. 2. Arrange the components so that the switching current loops curl in the same direction. During the first half of each cycle, current flows from the input filter capacitor, through the LM3670 and inductor to the output filter capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled up from ground, through the LM3670 by the inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing these loops so the current curls in the same direction prevents magnetic field reversal between the two half-cycles and reduces radiated noise. 3. Connect the ground pins of the LM3670, and filter capacitors together using generous component-side copper fill as a pseudo-ground plane. Then, connect this to the ground-plane (if one is used) with several vias. This reduces ground-plane noise by preventing the switching currents from circulating through the ground plane. It also reduces ground bounce at the LM3670 by giving it a low-impedance ground connection. 4. Use wide traces between the power components and for power connections to the DC-DC converter circuit. This reduces voltage errors caused by resistive losses across the traces. 5. Route noise sensitive traces, such as the voltage feedback path, away from noisy traces between the power components. The voltage feedback trace must remain close to the LM3670 circuit and should be direct but should be routed opposite to noisy components. This reduces EMI radiated onto the DC-DC converter’s own voltage feedback trace. 6. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 15 LM3670 SNVS250D – NOVEMBER 2004 – REVISED JANUARY 2006 www.ti.com distance. In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board, arrange the CMOS digital circuitry around it (since this also generates noise), and then place sensitive preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout linear regulators. 16 Submit Documentation Feedback Copyright © 2004–2006, Texas Instruments Incorporated Product Folder Links: LM3670 PACKAGE OPTION ADDENDUM www.ti.com 17-Nov-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Samples (3) (Requires Login) LM3670MF-1.2 ACTIVE SOT-23 DBV 5 1000 TBD CU SNPB Level-1-260C-UNLIM LM3670MF-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MF-1.5 ACTIVE SOT-23 DBV 5 1000 TBD CU SNPB Level-1-260C-UNLIM LM3670MF-1.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MF-1.6 ACTIVE SOT-23 DBV 5 1000 TBD CU SNPB Level-1-260C-UNLIM LM3670MF-1.6/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MF-1.8 ACTIVE SOT-23 DBV 5 1000 TBD CU SNPB Level-1-260C-UNLIM LM3670MF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MF-1.875 ACTIVE SOT-23 DBV 5 1000 TBD CU SNPB Level-1-260C-UNLIM LM3670MF-1.875/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MF-3.3 ACTIVE SOT-23 DBV 5 1000 TBD CU SNPB Level-1-260C-UNLIM LM3670MF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MF-ADJ ACTIVE SOT-23 DBV 5 1000 TBD CU SNPB Level-1-260C-UNLIM LM3670MF-ADJ/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MFX-1.2 ACTIVE SOT-23 DBV 5 3000 TBD CU SNPB Level-1-260C-UNLIM LM3670MFX-1.2/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MFX-1.5 ACTIVE SOT-23 DBV 5 3000 TBD CU SNPB Level-1-260C-UNLIM LM3670MFX-1.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MFX-1.6 ACTIVE SOT-23 DBV 5 3000 TBD CU SNPB Level-1-260C-UNLIM LM3670MFX-1.6/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MFX-1.8 ACTIVE SOT-23 DBV 5 3000 TBD CU SNPB Level-1-260C-UNLIM LM3670MFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 17-Nov-2012 Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Samples (3) (Requires Login) LM3670MFX-1.875 ACTIVE SOT-23 DBV 5 3000 TBD CU SNPB Level-1-260C-UNLIM LM3670MFX-1.875/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LM3670MFX-ADJ/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LM3670MF-1.2 SOT-23 DBV 5 1000 178.0 8.4 LM3670MF-1.2/NOPB SOT-23 DBV 5 1000 178.0 LM3670MF-1.5 SOT-23 DBV 5 1000 178.0 LM3670MF-1.5/NOPB SOT-23 DBV 5 1000 LM3670MF-1.6 SOT-23 DBV 5 LM3670MF-1.6/NOPB SOT-23 DBV LM3670MF-1.8 SOT-23 DBV LM3670MF-1.8/NOPB SOT-23 W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MF-1.875 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MF-1.875/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MF-3.3 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MF-3.3/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MF-ADJ SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MF-ADJ/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-1.2 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-1.2/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-1.5 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-1.5/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3670MFX-1.6 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-1.6/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-1.8 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-1.8/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-1.875 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-1.875/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3670MFX-ADJ/NOPB SOT-23 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3670MF-1.2 SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-1.2/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-1.5 SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-1.5/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-1.6 SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-1.6/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-1.8 SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-1.8/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-1.875 SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-1.875/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3670MF-3.3 SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-3.3/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-ADJ SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MF-ADJ/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LM3670MFX-1.2 SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-1.2/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-1.5 SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-1.5/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-1.6 SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-1.6/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-1.8 SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-1.8/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-1.875 SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-1.875/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LM3670MFX-ADJ/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 Pack Materials-Page 3 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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