MP28254 High Efficiency 4A, 21V, 500kHz Synchronous Step down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MP28254 is a high frequency synchronous rectified step-down switch mode converter with built in internal power MOSFETs. It offers a very compact solution to achieve 4A continuous output current over a wide input supply range with excellent load and line regulation. The MP28254 has synchronous mode operation for higher efficiency over output current load range. • • • • • • • • • • • • Current mode operation provides fast transient response and eases loop stabilization. Full protection features include OCP and thermal shut down. The MP28254 requires a minimum number of readily available standard external components and is available in a space saving 3mm x 4mm 14-pin QFN package. Wide 4.5V to 21V Operating Input Range 4A Output Current Low Rds(on) Internal Power MOSFETs Proprietary Switching Loss Reduction Technique High Efficiency Synchronous Mode Operation Fixed 500kHz Switching Frequency Sync from 300kHz to 2MHz External Clock Internal Compensation Integrated Bootstrap Diode OCP Protection and Thermal Shutdown Output Adjustable from 0.805V Available in a 3mm x 4mm 14-Pin QFN Package APPLICATIONS • • • • • • Notebook Systems and I/O Power Networking Systems Digital Set Top Boxes Personal Video Recorders Flat Panel Television and Monitors Distributed Power Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page.MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. The information in this datasheet about the product and its associated technologies are proprietary and intellectual property of Monolithic Power Systems and are protected by copyright and pending patent applications TYPICAL APPLICATION Efficiency VOUT=1.2V 100 IN BST 6 10 C3 0.1uF PG EN SW VCC R3 100K 9 7 MP28254 2, 3 4, 5 VOUT 1.2V@4A R1 5K FB PG EN/SYNC GND 11, 12, 13, 14 V IN=12V 80 C4 0.1uF C1 22uF V IN=5V 90 C2 47uF 8 Rt 25K R2 10K EFFICIENCY (%) 1 VIN 70 V IN=21V 60 50 40 30 20 10 0 0 1 2 3 4 OUTPUT CURRENT (A) MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 1 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ORDERING INFORMATION Part Number MP28254EL Package 3x4 QFN14 Top Marking MP28254EL For Tape & Reel, add suffix –Z (e.g. MP28254EL–Z); For RoHS compliant packaging, add suffix –LF; (eg. MP28254EL–LF–Z) PACKAGE REFERENCE TOP VIEW IN 1 14 GND SW 2 13 GND SW 3 12 GND SW 4 11 GND SW 5 10 VCC BST 6 9 PG EN/SYNC 7 8 FB EXPOSED PAD ON BACKSIDE ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage VIN .......................................22V VSW .......................-0.3V (-5V for < 10ns) to 23V VBS ..................................................... VSW + 6V All Other Pins................................. -0.3V to +6V Operating Temperature.............. -20°C to +85°C Continuous Power Dissipation (TA = +25°C) (2) ……………………………………………....2.6W Junction Temperature.............................. 150°C Lead Temperature ................................... 260°C Storage Temperature............... -65°C to +150°C Recommended Operating Conditions (3) Thermal Resistance (4) θJA θJC 3x4 QFN14 .............................48 ...... 11 ...°C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. Supply Voltage VIN .......................... 4.5V to 21V Operating Junct. Temp (TJ)...... -20°C to +125°C MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ELECTRICAL CHARACTERISTICS VIN = 12V, TA = +25°C, unless otherwise noted. Parameters Symbol Condition Supply Current (Shutdown) IIN VEN = 0V Supply Current (Quiescent) HS Switch On Resistance LS Switch On Resistance Iq VEN = 2V, VFB = 1V Switch Leakage (5) SW LKG ILIMIT FSW FFB Maximum Duty Cycle (5) Minimum On Time Sync Frequency Range Feedback Voltage Feedback Current EN Rising Threshold EN Threshold Hysteresis DMAX tON FSYNC VFB IFB EN Turn Off Delay Power Good High Threshold Power Good Low Threshold Power Good Delay Power Good Sink Current Capability Power Good Leakage Current VIN Under Voltage Lockout Threshold Rising VIN Under Voltage Lockout Threshold Hysteresis VCC Regulator VCC Load Regulation Soft-Start Period Thermal Shutdown VEN = 0V, VSW = 0V or 12V VFB = 0.75V VFB = 300mV VFB = 700mV IEN 0 5 425 85 0.3 789 VFB = 800mV VEN_RISING VEN_HYS Typ Max Units 10 μA 0.7 120 20 HSRDS-ON LSRDS-ON Current Limit Oscillator Frequency Fold-back Frequency EN Input Current Min 1 VEN = 2V VEN = 0V 500 0.25 mA mΩ mΩ 10 μA 575 A kHz fSW 90 100 805 10 1.3 0.4 2 821 50 1.6 2 0 5 0.9 0.85 20 ENTd-Off VTHPG VTLPG PGTd % ns MHz mV nA V V μA μs VFB VFB μs VPG Sink 4mA 0.4 V IPG_LEAK VPG = 3.3V 10 nA 4.2 V INUVVTH 3.8 4.0 INUVHYS 880 mV VCC 5 5 4 150 V % ms °C Icc=2mA 2 TSD 6.5 Note: 5) Guaranteed by design. MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 3 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PIN FUNCTIONS Pin # Name 1 IN 2,3,4,5 SW 6 BST 7 EN/SYNC 8 FB 9 PG 10 VCC 11,12,13,14 GND Exposed Pad Description Supply Voltage. The MP28254 operates from a +4.5V to +21V input rail. C1 is needed to decouple the input rail. Use wide PCB trace to make the connection. Switch Output. Use wide PCB trace to make the connection. Bootstrap. A capacitor connected between SW and BS pins is required to form a floating supply across the high-side switch driver. EN=1 to enable the chip. External clock can be applied to EN pin for changing switching frequency. For automatic start-up, connect EN pin to VIN by proper EN resistor divider as Figure 2 shows. Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. To prevent current limit run away during a short circuit fault condition the frequency fold-back comparator lowers the oscillator frequency when the FB voltage is below 500mV. Power Good Output. The output of this pin is low if the output voltage is 15% less than the normal value; otherwise it is an open drain. Bias Supply. Decouple with 0.1μF~0.22μF cap. And the capacitance should be no more than 0.22μF System Ground. This pin is the reference ground of the regulated output voltage. For this reason care must be taken in PCB layout. Suggested to be connected to GND with copper and vias. Exposed pad has no internal electrical connection, and make sure exposed pad is connected to GND through a large copper area in PCB layout. MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 4 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, VOUT = 1.2V, L = 1.8µH, TA = +25ºC, unless otherwise noted. 950 900 850 800 750 700 650 600 550 500 0 5 10 15 20 25 0.2 6 0.15 5.5 0.1 0.05 0 -0.05 4 -0.2 0 5 10 15 20 3.5 0 25 OUTPUT VOLTAGE (V) 6.6 6.4 6.2 6 5.8 5.6 5.4 5.2 Operating Range Dmax Limit 10 Minimum on time Limit 1 0 0 10 20 30 40 50 60 70 80 90 100 5 10 15 20 Line Regulation CASE TEMPERATURE RISE( C) 1 IOUT=0A 0 -1 5 10 15 25 25 0.4 0.3 VIN=4.5V 0.2 0.1 VIN=12V 0 -0.1 VIN=21V -0.2 -0.3 -0.4 -0.5 0 1 2 3 4 LOAD CURRENT(A) Case Temperature vs. Output Current 2 IOUT=4A 20 0.5 INPUT VOLTAGE (V) DUTY CYCLE (% ) 15 Load Regulation 0.1 5 10 INPUT VOLTAGE (V) 100 7 NORMALIZED OUTPUT VOLTAGE(%) 5 INPUT VOLTAGE (V) 6.8 PEAK CURRENT (A) 4.5 -0.1 Peak Current vs. Duty Cycle 0 5 -0.15 INPUT VOLTAGE (V) -2 VCC Regulator Line Regulation V EN=0V VCC (V) V FB=1V DISABLED SUPPLY CURRENT vs. INPUT VOLTAGE NORMALIZED OUTPUT VOLTAGE(%) 1000 DISABLE SUPPLY CURRENT (uA) ENABLE SUPPLY CURRENT (mA) ENABLED SUPPLY CURRENT vs. INPUT VOLTAGE IOUT=2A 20 INPUT VOLTAGE (V) 25 25 20 15 10 5 0 0 1 2 3 4 5 OUTPUT CURRENT(A) MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 5 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, VOUT = 1.2V, L = 1.8µH, TA = +25ºC, unless otherwise noted. Efficiency Efficiency VOUT=1.8V VOUT=1.2V 100 V IN=5V 90 100 V IN=12V 80 V IN=21V 60 50 40 30 70 V IN=21V 60 50 40 30 20 20 10 10 0 0 0 1 2 3 4 0 OUTPUT CURRENT (A) 80 4 V IN=5V 90 V IN=12V 80 V IN=12V EFFICIENCY (%) V IN=21V 70 3 VOUT=3.3V 100 V IN=5V 90 2 Efficiency VOUT=2.5V 100 1 OUTPUT CURRENT (A) Efficiency EFFICIENCY (%) V IN=12V 80 70 EFFICIENCY (%) EFFICIENCY (%) V IN=5V 90 60 50 40 30 20 70 V IN=21V 60 50 40 30 20 10 10 0 0 0 1 2 3 OUTPUT CURRENT (A) 4 0 1 2 3 4 OUTPUT CURRENT (A) MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 6 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, VOUT = 1.2V, L = 1.8µH, TA = +25ºC, unless otherwise noted. Short Entry Power up without Load Short Recovery VOUT 1V/div VOUT 1V/div VOUT 1V/div VSW 10V/div VSW 10V/div VSW 10V/div IINDUCTOR 5A/div IINDUCTOR 5A/div VIN 10V/div IINDUCTOR 2A/div 2ms/div 10ms/div 2ms/div Enable Startup without Load Power up with 4A Load Enable Startup with 4A Load VOUT 1V/div VOUT 1V/div VOUT 1V/div VSW 10V/div VSW 10V/div VSW 10V/div VIN 10V/div VEN 5V/div VEN 5V/div IINDUCTOR 2A/div IINDUCTOR 5A/div IINDUCTOR 5A/div VIN/AC 100mV/div VSW 5V/div 4ms/div 4ms/div 10ms/div Input Ripple Voltage Output Ripple Voltage Load Transient Response IOUT=4A IOUT=4A IOUT=2A-4A VOUT/AC 20mV/div VOUT/AC 50mV/div VSW 5V/div IINDUCTOR 5A/div ILOAD 2A/div MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 7 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS BLOCK DIAGRAM IN + - VCC Regulator VCC Current Sense Amplifer BOOST Regulator PG Oscillator HS Driver + - LOGIC PG Comparator BST + SW - FB 50pF 400K + + - Error Amplifier LS Driver + - PWM Comparator - 1MEG + Reference EN/SYNC Current Limit Comparator 1pF LS ILIM Comparator GND Figure 1—Function Block Diagram MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 8 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS OPERATION The MP28254 is a high frequency synchronous rectified step-down switch mode converter with built in internal power MOSFETs. It offers a very compact solution to achieve 4A continuous output current over a wide input supply range with excellent load and line regulation. The MP28254 operates in a fixed frequency, peak current control mode to regulate the output voltage. A PWM cycle is initiated by the internal clock. The integrated high-side power MOSFET is turned on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If, in 90% of one PWM period, the current in the power MOSFET does not reach the COMP set current value, the power MOSFET will be forced to turn off Power Good Indicator When the FB is below 0.85VFB, the PG pin will be internally pulled low. When the FB is above 0.9VFB , the PG becomes an open-drain output. If PG function is not used, it can be left open. Internal Regulator Most of the internal circuitries are powered from the 5V internal regulator. This regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 5.0V, the output of the regulator is in full regulation. When VIN is lower than 5.0V, the output decreases. 0.1uF ceramic capacitor for decoupling purpose is required. thus EN/Sync can be floated to shut down the chip. 1) Enabled by external logic H/L signal The chip starts up once the enable signal goes higher than EN/SYNC input high voltage (2V), and is shut down when the signal is lower than EN/SYNC input low voltage (0.4V). To disable the chip, EN must be pulled low for at least 5µs. The input is compatible with both CMOS and TTL. 2) Enabled by Vin through voltage divider. Connect EN with VIN through a resistive voltage divider for automatic startup as the figure 2 shows. VIN REN1 EN REN2 Figure 2—Enable Divider Circuit Choose the value of the pull-up resistor REN1 and pull-down resistor REN2 to reset the automatic start-up voltage: (REN1 + REN2 || 1MΩ) REN2 || 1MΩ (REN1 + REN2 || 1MΩ) = VEN-FALLING ⋅ REN2 || 1MΩ VIN_START = VEN_RISING ⋅ VIN_STOP Error Amplifier The error amplifier compares the FB pin voltage with the internal 0.805V reference (REF) and outputs a current proportional to the difference between the two. This output current is then used to charge or discharge the internal compensation network to form the COMP voltage, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. 3) Synchronized by External Sync Clock Signal Enable/Sync Control EN/Sync is a digital control pin that turns the regulator on and off. Drive EN high to turn on the regulator, drive it low to turn it off. There is an internal 1MEG resistor from EN/Sync to GND The chip can be synchronized to external clock range from 300kHz up to 2MHz through this pin 2ms right after output voltage is set, with the internal clock rising edge synchronized to the external clock rising edge. Figure 3—Startup Sequence Using EN Divider MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 9 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS Thermal Shutdown Thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. When the silicon die temperature is higher than 150°C, it shuts down the whole chip. When the temperature is lower than its lower threshold, typically 140°C, the chip is enabled again. Figure 4—Startup Sequence Using External Sync Clock Signal Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient supply voltage. The MP28254 UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 4.0V while its falling threshold is a consistent 3.2V. Internal Soft-Start The soft-start is implemented to prevent the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage (SS) ramping up from 0V to 1.2V. When it is lower than the internal reference (REF), SS overrides REF so the error amplifier uses SS as the reference. When SS is higher than REF, REF regains control. The SS time is internally fixed to 4ms. Over-Current-Protection and Hiccup The MP28254 has cycle-by-cycle over current limit when the inductor current peak value exceeds the set current limit threshold. Meanwhile, output voltage starts to drop until FB is below the Under-Voltage (UV) threshold, typically 30% below the reference. Once a UV is triggered, the MP28254 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-short to ground. The average short circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. The MP28254 exits the hiccup mode once the over current condition is removed. Floating Driver and Bootstrap Charging The floating power MOSFET driver is powered by an external bootstrap capacitor. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M3, C4, L1 and C2 (Figure 5). If (VIN-VSW) is more than 5V, U2 will regulate M3 to maintain a 5V BST voltage across C4. SW Figure 5—Internal Bootstrap Charging Circuit Startup and Shutdown If both VIN and EN are higher than their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. Three events can shut down the chip: EN low, VIN low and thermal shutdown. In the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 10 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS APPLICATION INFORMATION Where ΔIL is the inductor ripple current. Setting the Output Voltage The external resistor divider is used to set the output voltage (see Typical Application on page 1). The feedback resistor R1 also sets the feedback loop bandwidth with the internal compensation capacitor (see Typical Application on page 1). Choose R1 to be around 40.2kΩ for optimal transient response. R2 is then given by: Choose inductor ripple current to be approximately 30% if the maximum load current, 4A. The maximum inductor peak current is: R2 = R1 VOUT −1 VFB The T-type network is highly recommended when Vo is low, as Figure 6 shows. FB 1 R1 Rt VOUT R2 Figure 6— T-type Network Table 1 lists the recommended T-type resistors value for common output voltages. Table 1—Resistor Selection for Common Output Voltages VOUT (V) R1 (kΩ) R2 (kΩ) Rt (kΩ) L (uH) COUT (uF, Ceramic) 1.05 1.2 4.99 4.99 16.5 10.2 24.9 24.9 1-4.7 1-4.7 47 47 1.5 1.8 2.5 3.3 5 4.99 4.99 40.2 40.2 40.2 5.76 4.02 19.1 13 7.68 24.9 24.9 0 0 0 1-4.7 1-4.7 1-4.7 1-4.7 1-4.7 47 47 47 47 47 Note: The above feedback resistor table applies to a specific load capacitor condition as shown in the table 1. Other capacitive loading conditions will require different values. Selecting the Inductor A 1µH to 10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor DC resistance should be less than 15mΩ. For most designs, the inductance value can be derived from the following equation. L= IL(MAX ) = ILOAD + ΔIL 2 Under light load conditions below 100mA, larger inductance is recommended for improved efficiency. Selecting the Input Capacitor The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 22µF capacitor is sufficient. Since the input capacitor (C1) absorbs the input switching current it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN ⎞ ⎟ ⎟ ⎠ The worse case condition occurs at VIN = 2VOUT, where: IC1 = ILOAD 2 For simplification, choose the input capacitor whose RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1μF, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by: VOUT × ( VIN − VOUT ) VIN × ΔIL × f OSC MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 11 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ΔVIN = ⎛ ILOAD V V × OUT × ⎜⎜ 1 − OUT fS × C1 VIN ⎝ VIN ⎞ ⎟ ⎟ ⎠ Selecting the Output Capacitor The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: ΔVOUT = VOUT ⎛ V × ⎜⎜1 − OUT fS × L ⎝ VIN 4) 5) 6) Route SW away from sensitive analog areas such as FB. Connect IN, SW, and especially GND respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. Adding RC snubber circuit from IN pin to SW pin can reduce SW spikes. ⎞ ⎞ ⎛ 1 ⎟ ⎟⎟ × ⎜ R ESR + ⎜ 8 × f S × C2 ⎟⎠ ⎠ ⎝ Where L is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by: ΔVOUT = ⎞ ⎛ V × ⎜⎜1 − OUT ⎟⎟ VIN ⎠ × L × C2 ⎝ VOUT 8 × fS 2 Top Layer In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: ΔVOUT = VOUT ⎛ V ⎞ × ⎜ 1 − OUT ⎟⎟ × R ESR VIN ⎠ f S × L ⎜⎝ The characteristics of the output capacitor also affect the stability of the regulation system. The MP28254 can be optimized for a wide range of capacitance and ESR values. PCB Layout PCB layout is very important to achieve stable operation. Please follow these guidelines and take Figure 7 for references. 1) Keep the connection of input ground and GND pin as short and wide as possible. 2) Keep the connection of input capacitor and IN pin as short and wide as possible. 3) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. Bottom Layer Figure 7—PCB Layout MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 12 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external BST diode is: z Duty cycle is high: D= VOUT >65% VIN In this case, an external BST diode is recommended from the VCC pin to BST pin, as shown in Figure 8 BST MP28254 SW External BST Diode IN4148 VCC CBST L COUT Figure 8—Add Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST cap is 0.1~1µF. MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 13 MP28254 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PACKAGE INFORMATION 3mm x 4mm QFN14 MP28254 Rev. 1.01 www.MonolithicPower.com 5/15/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 14