LTC3240-3.3/LTC3240-2.5 3.3V/2.5V Step-Up/ Step-Down Charge Pump DC/DC Converter U FEATURES DESCRIPTIO ■ The LTC®3240-3.3/LTC3240-2.5 are step-up/step-down charge pump DC/DC converters that produce a fixed regulated output voltage of 3.3V or 2.5V over a wide input voltage range (1.8V to 5.5V). ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Step-Up/Step-Down Charge Pumps Generate Fixed 3.3V or 2.5V Outputs VIN Range: 1.8V to 5.5V Output Current up to 150mA Automatic Mode Switching Constant Frequency (1.2MHz) Operation in Step-Up Mode Low Dropout Regulator Operation in Step-Down Mode Low No-Load Quiescent Current: IQ = 65µA Built-In Soft-Start Reduces Inrush Current Shutdown Disconnects Load from Input Shutdown Current < 1µA Short-Circuit/Thermal Protection Available in a 6-Lead (2mm × 2mm) DFN Package U APPLICATIO S ■ ■ 2 AA to 2.5V 2-3 AA/Li-Ion to 3.3V Low Power Supplies for Cameras, I/O Supplies, Audio, PC Cards, Misc. Logic, etc., in a Wide Variety of Handheld Products The LTC3240-3.3/LTC3240-2.5 feature low no load operating current (65µA typical) and ultralow operating current in shutdown (<1µA). Built-in soft-start circuitry prevents excessive inrush current during start-up. Thermal shutdown and current-limit circuitry allow the parts to survive a continuous short-circuit from VOUT to GND. The LTC3240-3.3/LTC3240-2.5 require only three tiny external ceramic capacitors for an ultrasmall application footprint. The LTC3240-3.3/LTC3240-2.5 are available in a 6-pin (2mm × 2mm) DFN package. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6411531. U ■ With input voltages greater than the regulated output voltage the LTC3240 operates as a low dropout regulator. Once the input voltage drops within 100mV of the regulated output voltage the part automatically switches to step-up mode. In step-up mode the LTC3240 operates as a constant frequency (1.2MHz) doubling charge pump. TYPICAL APPLICATIO Output Voltage vs Input Voltage (Full Range) Li-Ion to 3.3V at Up to 150mA 3.50 1µF VIN 2.7V TO 4.5V Li-Ion OR 3-CELL NiMH 1µF C+ VOUT 3.3V IOUT = 150mA LTC3240-3.3 4.7µF GND OFF ON OUTPUT VOLTAGE (V) C– IOUT = 30mA 3.45 3.40 3.35 3.30 3.25 3.20 SHDN 3240 TA01a 3.15 3.10 1.7 2.2 2.7 3.2 3.7 4.2 4.7 INPUT VOLTAGE (V) 5.2 5.7 3240 TA01b 3240fb 1 LTC3240-3.3/LTC3240-2.5 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) TOP VIEW VIN to GND ................................................... –0.3V to 6V VOUT to GND ............................................. –0.3V to 5.5V ⎯S⎯H⎯D⎯N to GND................................ –0.3V to (VIN + 0.3V) VOUT Short-Circuit Duration ............................. Indefinite Operating Temperature Range (Note 2) ...–40°C to 85°C Storage Temperature Range...................–65°C to 125°C Maximum Junction Temperature .......................... 125°C 6 SHDN GND 1 VIN 2 7 5 C– 4 C+ VOUT 3 DC PACKAGE 6-LEAD (2mm × 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 80°C/W (NOTE 4) EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB DC PART MARKING LBXJ LCBP ORDER PART NUMBER LTC3240EDC-3.3 LTC3240EDC-2.5 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, ⎯S⎯H⎯D⎯N = VIN, CFLY = 1µF, CIN = 1µF, COUT = 4.7µF unless otherwise noted. SYMBOL PARAMETER VIN VOUT Input Voltage Range Output Voltage Range LTC3240-3.3 IIN I⎯S⎯H⎯D⎯N η LTC3240-2.5 No Load Input Current Shutdown Current Efficiency LTC3240-3.3 LTC3240-2.5 VIH ⎯S⎯H⎯D⎯N Input High Voltage ⎯S⎯H⎯D⎯N Input Low Voltage ⎯SH ⎯ D ⎯ N ⎯ Input Current ⎯SH ⎯ D ⎯ N ⎯ Input Current VIL IIH IIL ILIM Output Current Limit tON VOUT Turn-On Time CONDITIONS MIN ● 1.8V ≤ VIN ≤ 2.5V, IOUT < 40mA 2.5V ≤ VIN ≤ 5.5V, IOUT < 150mA ● ● 1.8V ≤ VIN ≤ 5.5V, IOUT < 60mA IOUT = 0, 1.8V ≤ VIN ≤ 5.5V ⎯S⎯H⎯D⎯N = 0V, VOUT = 0V VIN = 2.5V, IOUT = 100mA VIN = 3.7V, IOUT = 100mA VIN = 2V, IOUT = 50mA VIN = 3V, IOUT = 50mA ● 1.8 3.168 3.168 2.4 1.8V ≤ VIN ≤ 5.5V 1.8V ≤ VIN ≤ 5.5V V⎯S⎯H⎯D⎯N = VIN = 5.5V V⎯S⎯H⎯D⎯N = 0V VIN = 3.7V, VOUT = 0V Step-Down Mode VIN = 2.4V, VOUT = 0V Step-Up Mode From the Rising Edge of ⎯S⎯H⎯D⎯N to 90% of VOUT VIN = 2.5V, RLOAD = 66Ω VIN = 3.7V, RLOAD = 66Ω ● 1.2 Step-Up Mode IBURST Burst Mode Threshold VIN = 2.4V VRIPPLE Output Ripple IOUT = 100mA, VOUT = 2.5V or 3.3V fOSC Switching Frequency VIN = 2.4V VRIPPLE(BURST) Burst Mode® Output Ripple VIN = 2.4V Burst Mode is a registered trademark of Linear Technology Corporation. TYP 3.3 3.3 2.5 65 0.1 64 87 63 83 ● ● V V V V µA µA % % % % 450 270 0.5 0.4 ms ms 15 20 1.2 20 mA mVP-P MHz mVP-P 0.4 1 1 –1 –1 0.6 UNITS 5.5 3.432 3.432 2.6 100 1 V V µA µA mA mA ● ● MAX 1.8 3240fb 2 LTC3240-3.3/LTC3240-2.5 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, ⎯S⎯H⎯D⎯N = VIN, CFLY = 1µF, CIN = 1µF, COUT = 4.7µF unless otherwise noted. SYMBOL PARAMETER CONDITIONS ROL Effective Open-Loop Output Resistance LTC3240-3.3 LTC3240-2.5 (Note 3) Doubler Mode VIN = 1.8V, VOUT = 3V VIN = 1.8V, VOUT = 2.25V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3240-3.3/LTC3240-2.5 are guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the MIN TYP MAX UNITS Ω Ω 7.5 8.0 –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: ROL ≡ (2VIN – VOUT)/IOUT Note 4: Failure to solder the exposed backside of the package to a PCB ground plane will result in a thermal resistance much higher than 80°C/W. U W TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25°C, CFLY = CIN = 1µF, COUT = 4.7µF unless otherwise noted) ⎯S⎯H⎯D⎯N Threshold Voltage vs Supply Voltage Oscillator Frequency vs Supply Voltage (Doubler Mode) 1.8 1.0 700 1.4 25°C SHUTDOWN VOLTAGE (V) 1.6 –40°C 1.2 85°C 1.0 –40°C SHORT-CIRCUIT CURRENT (mA) 25°C OSCILLATOR FREQUENCY (MHz) Short-Circuit Current vs Supply Voltage 0.8 85°C 0.6 0.4 0.2 0.8 SHUTDOWN HYSTERESIS 0 1.80 2.30 2.80 3.30 3.80 4.30 4.80 5.30 5.80 SUPPLY VOLTAGE (V) 0.6 1.8 2.2 3.8 2.6 3.0 3.4 SUPPLY VOLTAGE (V) 3240 G01 500 400 300 200 100 0 1.7 2.2 2.7 3.2 3.7 4.2 4.7 SUPPLY VOLTAGE (V) 3240 G02 Start-Up Time vs Supply Voltage 1000 600 5.7 3240 G03 Load Regulation (LTC3240-2.5) Load Regulation (LTC3240-3.3) ILOAD = 50mA 5.2 3.40 2.60 3.35 2.55 800 700 600 VIN = 3.7V 3.30 VIN = 2.5V 3.25 VIN = 1.8V 500 400 3.20 1.6 1.8 2 2.2 2.4 2.6 2.8 VIN (V) 3 3.2 3.4 3.6 3240 G04 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) START-UP TIME (µs) 900 0 30 90 120 60 LOAD CURRENT (mA) 150 3240 G05 VIN = 2.8V 2.50 VIN = 1.8V VIN = 2.4V 2.45 2.40 0 30 90 120 60 LOAD CURRENT (mA) 150 3240 G06 3240fb 3 LTC3240-3.3/LTC3240-2.5 U W TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25°C, CFLY = CIN = 1µF, COUT = 4.7µF unless otherwise noted) No-Load Input Current vs Supply Voltage (LTC3240-3.3) Effective Open-Loop Resistance vs Temperature (LTC3240-3.3) 9 8 7 6 100 100 90 90 NO-LOAD INPUT CURRENT (µA) VIN = 1.8V VOUT = 3V NO-LOAD INPUT CURRENT (µA) EFFECTIVE OPEN-LOOP RESISTANCE (Ω) 10 No-Load Input Current vs Supply Voltage (LTC3240-2.5) 80 70 60 50 40 30 20 10 –15 35 10 TEMPERATURE (°C) 60 2.7 3.2 3.7 4.2 4.7 SUPPLY VOLTAGE (V) 5.2 1.7 2.2 5.7 DOUBLER TO LDO MODE (VIN RISING) 100 2.90 80 LDO TO DOUBLER MODE (VIN FALLING) EFFICIENCY (%) VIN (V) 3.65 VIN (V) DOUBLER TO LDO MODE (VIN RISING) 2.80 LDO TO DOUBLER MODE (VIN FALLING) 2.75 ILOAD = 40mA 70 60 ILOAD = 1mA 50 40 DOUBLER TO LDO MODE (VIN RISING) 30 3.50 20 2.70 3.45 5.7 LDO TO DOUBLER MODE (VIN FALLING) 90 2.85 5.2 Efficiency vs Supply Voltage (LTC3240-3.3) 3.70 3.40 2.7 3.2 3.7 4.2 4.7 SUPPLY VOLTAGE (V) 3240 G09 2.95 3.80 3.55 30 20 Mode Switch Threshold vs Load Current (LTC3240-2.5) Mode Switch Threshold vs Load Current (LTC3240-3.3) 3.60 40 3240 G08 3240 G07 3.75 50 0 1.7 2.2 85 70 60 10 0 5 –40 80 10 2.65 0 20 40 60 80 100 120 140 160 ILOAD (mA) 0 20 40 60 80 100 120 140 160 ILOAD (mA) 0 1.80 2.30 2.80 3.30 3.80 4.30 4.80 5.30 5.80 SUPPLY VOLTAGE (V) 3240 G11 3240 G10 3240 G12 Output Noise/Ripple (LTC3240-3.3) VOUT Soft-Start (LTC3240-3.3) VOUT 2V/DIV VOUT 20mV/DIV AC COUPLED SHDN 2V/DIV VIN = 2.4V RLOAD = 66Ω 200µs/DIV 3240 G13 VIN = 2.4V ILOAD = 100mA 500ns/DIV 3240 G14 3240fb 4 LTC3240-3.3/LTC3240-2.5 U W TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25°C, CFLY = CIN = 1µF, COUT = 4.7µF unless otherwise noted) Load Transient Response (LTC3240-3.3) VOUT 20mV/DIV AC COUPLED Output Noise/Ripple (LTC3240-2.5) Load Transient Response (LTC3240-2.5) VOUT 20mV/DIV AC COUPLED LDO MODE VOUT 20mV/DIV AC COUPLED 60mA ILOAD 10mA ILOAD VIN = 3.7V 10µs/DIV ILOAD = 10mA TO 60mA 3240 G15 VIN = 2.4V ILOAD = 100mA 500ns/DIV 3240 G16 Burst Mode OPERATION CONST FREQUENCY MODE 50mA 10mA VIN = 2.4V 10µs/DIV ILOAD = 10mA TO 50mA 3240 G17 U U U PI FU CTIO S GND (Pin 1): Ground. This pin should be tied to a ground plane for best performance. VIN (Pin 2): Input Supply Voltage. VIN should be bypassed with a 1μF or greater, low ESR ceramic capacitor. VOUT (Pin 3): Regulated Output Voltage. VOUT should be bypassed with a 4.7μF or greater, low ESR ceramic capacitor as close to the pin as possible for best performance. C+ (Pin 4): Flying Capacitor Positive Terminal. C– (Pin 5): Flying Capacitor Negative Terminal. ⎯ H ⎯ D ⎯ N ⎯ (Pin 6): Active Low Shutdown Input. A low on S ⎯ H ⎯ D ⎯ N ⎯ S disables the LTC3240-3.3/LTC3240-2.5. This pin is a high impedance CMOS input pin which must be driven with valid logic levels. This pin must not be allowed to float. Exposed Pad (Pin 7): Ground. The exposed pad must be soldered to PCB ground to provide electrical contact and optimum thermal performance. 3240fb 5 LTC3240-3.3/LTC3240-2.5 W BLOCK DIAGRA SOFT-START AND SWITCH CONTROL VOUT 6 SHDN 4 C+ 5 C– 3 1.2MHz OSCILLATOR – + – VOUT + 100mV VIN + 2 CHARGE PUMP 3204 BD GND 1, 7 3240fb 6 LTC3240-3.3/LTC3240-2.5 U OPERATIO (Refer to the Block Diagram) The LTC3240 is a step-up/step-down charge pump DC/DC converter. For VIN greater than VOUT by about 100mV it operates as a low dropout regulator. Once VIN drops to within 100mV of VOUT, the part automatically switches into charge pump mode to boost VIN to the regulated output voltage. Regulation is achieved by sensing the output voltage through an internal resistor divider and modulating the charge pump output current based on the error signal. In the charge pump mode a 2-phase nonoverlapping clock activates the charge pump switches. The flying capacitor is charged from VIN on the first phase of the clock. On the second phase of the clock it is stacked in series with VIN and connected to VOUT. This sequence of charging and discharging the flying capacitor continues at a free running frequency of 1.2MHz (typ). Shutdown Mode In shutdown mode, all circuitry is turned off and the LTC3240 draws only leakage current from the VIN supply. Furthermore, VOUT is disconnected from VIN. The ⎯S⎯H⎯D⎯N pin is a CMOS input with a threshold voltage of approximately 0.8V. The LTC3240 is in shutdown when a logic low is applied to the ⎯S⎯H⎯D⎯N pin. Since the ⎯S⎯H⎯D⎯N pin is a high impedance CMOS input, it should never be allowed to float. To ensure that its state is defined, it must always be driven with a valid logic level. Since the output voltage of this device can go above the input voltage, circuitry is required to control the state of the converter even in shutdown. This circuitry will draw an input current of 5μA in shutdown. However, this current is eliminated when the output voltage (VOUT) drops to less than approximately 0.8V. Burst Mode Operation The LTC3240 provides automatic Burst Mode operation while operating as a charge pump, to increase efficiency of the power converter at light loads. Burst Mode operation is initiated if the output load current falls below an internally programmed threshold. Once Burst Mode operation is initiated, the part shuts down the internal oscillator to reduce the switching losses, and goes into a low current state. This state is referred to as the sleep state in which the IC consumes only about 65μA from the input. When the output voltage droops enough to overcome the burst comparator hysteresis, the part wakes up and commences normal fixed frequency operation recharging the output capacitor. If the output load is still less than the Burst Mode threshold the part will re-enter sleep state. This Burst Mode threshold varies with VIN, VOUT and the choice of output storage capacitor. Soft-Start The LTC3240 has built-in soft-start circuitry to prevent excessive current flow during start-up. The soft-start is achieved by internal circuitry that slowly ramps the amount of current available to the output storage capacitor from zero to a value of 300mA over a period of approximately 2ms. The soft-start circuitry is reset in the event of a commanded shutdown or thermal shutdown. Short-Circuit/Thermal Protection The LTC3240 has built-in short-circuit current limit as well as overtemperature protection. During a short-circuit condition, the part automatically limits its output current to approximately 300mA. If the junction temperature exceeds approximately 160°C the thermal shutdown circuitry shuts down current delivery to the output. Once the junction temperature drops back to approximately 150°C current delivery to the output is resumed. The LTC3240 will cycle in and out of thermal shutdown indefinitely without latch-up or damage until the short-circuit condition on VOUT is removed. Long term overstress (i.e. operation at junction temperatures above 125°C) should be avoided as it reduces the lifetime of the part and can result in degraded performance. 3240fb 7 LTC3240-3.3/LTC3240-2.5 U W U U APPLICATIO S I FOR ATIO During LDO operation, the power efficiency (η) of the LTC3240 is given by: η= POUT VOUT • IOUT VOUT = = PIN VIN • IOUT VIN At moderate to high output power, the quiescent current of the LTC3240 is negligible and the expression above is valid. For example, the measured efficiency of LTC3240-3.3, with VIN = 3.7V, IOUT = 100mA and VOUT regulating to 3.3V is 87% which is in close agreement with the theoretical value of 89%. During charge pump operation, the power efficiency (η) of the LTC3240 is similar to that of a linear regulator with an effective input voltage of twice the actual input voltage. This occurs because the input current for a voltage doubling charge pump is approximately twice the output current. In an ideal regulating voltage doubler the power efficiency is given by: η= POUT VOUT • IOUT VOUT = = 2VIN P IN VIN • 2IOUT At moderate to high output power, the switching losses and the quiescent current of the LTC3240 are negligible and the expression above is valid. For example, the measured efficiency of LTC3240-3.3 with VIN = 2.5V, IOUT = 100mA and VOUT regulating to 3.3V is 64% which is in close agreement with the theoretical value of 66%. Effective Open-Loop Output Resistance (ROL) The effective open-loop output resistance (ROL) of a charge pump is a very important parameter which determines the strength of the charge pump. The value of this parameter depends on many factors such as the oscillator frequency (fOSC), value of the flying capacitor (CFLY), the nonoverlap time, the internal switch resistances (RS), and the ESR of the external capacitors. A first order approximation for ROL is given below: 1 R0L ≅ 2 ∑ RS + fOSC • C FLY S = 1 TO 4 For the LTC3240 in charge pump mode, the maximum available output current and voltage can be calculated from the effective open-loop output resistance, ROL, and the effective output voltage, 2VIN(MIN). From Figure 1, the available current is given by: IOUT = 2VIN – VOUT ROL Typical ROL values as a function of temperature are shown in Figure 2. ROL + – 2VIN + IOUT VOUT – 3240 F01 Figure 1. Equivalent Open-Loop Circuit 10 EFFECTIVE OPEN-LOOP RESISTANCE (Ω) Power Efficiency VIN = 1.8V VOUT = 3V 9 8 7 6 5 –40 –15 35 10 TEMPERATURE (°C) 60 85 3240 G07 Figure 2. Typical ROL vs Temperature VIN, VOUT Capacitor Selection The style and value of capacitors used with the LTC3240 determine several important parameters such as regulator control loop stability, output ripple, charge pump strength and minimum start-up time. To reduce noise and ripple, it is recommended that low ESR (<0.1Ω) ceramic capacitors be used for both CIN and COUT. CIN should be 1µF or greater while COUT should be 4.7µF or greater. Tantalum and aluminum capacitors are not recommended because of their high ESR. 3240fb 8 LTC3240-3.3/LTC3240-2.5 U W U U APPLICATIO S I FOR ATIO In charge pump mode the value of COUT directly controls the amount of output ripple for a given load current. Increasing the size of COUT will reduce the output ripple at the expense of higher minimum turn-on time. The peak-to-peak output ripple is approximately given by the expression: VRIPPLE(P −P) ≅ IOUT 2fOSC • C OUT where fOSC is the oscillator frequency (typically 1.2MHz) and COUT is the value of the output capacitor. Also, the value and style of the output capacitor can significantly affect the stability of the LTC3240. As shown in the Block Diagram, the LTC3240 uses a linear control loop to adjust the strength of the charge pump to match the current required at the output. The error signal of this loop is stored directly on the output storage capacitor. This output capacitor also serves to form the dominant pole of the control loop. To prevent ringing or instability on the LTC3240, it is important to maintain at least 2µF of capacitance over all conditions. Excessive ESR on the output capacitor can degrade the loop stability of the LTC3240. The closed-loop output resistance of the LTC3240 is designed to be 0.5Ω. For a 100mA load current change, the output voltage will change by about 50mV. If the output capacitor has 0.5Ω or more of ESR, the closed-loop frequency response will cease to roll off in a simple one-pole fashion and poor load transient response or instability could result. Ceramic capacitors typically have exceptional ESR performance and combined with a tight board layout should yield very good stability and load transient performance. Just as the value of COUT controls the amount of output ripple, the value of CIN controls the amount of ripple present at the input pin (VIN) in charge pump mode. The input current to the LTC3240 is relatively constant during the input charging phase and the output charging phase but drops to zero during the nonoverlap times. Since the nonoverlap time is small (~25ns), these missing notches result in a small perturbation on the input power supply line. A higher ESR capacitor such as tantalum will have higher input noise than a low ESR ceramic capacitor. Therefore, ceramic capacitors are again recommended for their exceptional ESR performance. 1cm OF WIRE 10nH VIN 0.22µF 2 VIN LTC3240-3.3/ LTC3240-2.5 2.2µF 1 GND 3240 F03 Figure 3. 10nH Inductor Used for Additional Input Noise Reduction Further input noise reduction can be achieved by powering the LTC3240 through a very small series inductor as shown in Figure 3. A 10nH inductor will reject the fast current notches, thereby presenting a nearly constant current load to the input power supply. For economy, the 10nH inductor can be fabricated on the PC board with about 1cm (0.4") of PC board trace. Flying Capacitor Selection Warning: A polarized capacitor such as tantalum or aluminum should never be used for the flying capacitor since its voltage can reverse upon start-up of the LTC3240. Low ESR ceramic capacitors should always be used for the flying capacitor. The flying capacitor controls the strength of the charge pump. A 1µF or greater ceramic capacitor is suggested for the flying capacitor. For the LTC3240-3.3 operating at an input voltage in the range 1.8V ≤ VIN ≤ 2.5V, it is necessary to have at least 0.5µF of capacitance for the flying capacitor in order to achieve the maximum rated current of 40mA. For very light load applications, the flying capacitor may be reduced to save space or cost. From the first order approximation of ROL in the “Effective Open-Loop Output Resistance” section, the theoretical minimum output resistance of a voltage doubling charge pump can be expressed by the following equation: ROL(MIN) = 2VIN – VOUT 1 ≅ IOUT fOSC • C FLY where fOSC is the switching frequency (1.2MHz) and CFLY is the value of the flying capacitor. The charge pump will typically be weaker than the theoretical limit due 3240fb 9 LTC3240-3.3/LTC3240-2.5 U W U U APPLICATIO S I FOR ATIO to additional switch resistance. However, for very light load applications, the above expression can be used as a guideline in determining a starting capacitor value. Ceramic Capacitors GND Below is a list of ceramic capacitor manufacturers and how to contact them: www.avxcorp.com www.kemet.com www.murata.com www.t-yuden.com www.vishay.com www.component.tdk.com Layout Considerations Due to the high switching frequency and high transient currents produced by LTC3240, careful board layout is necessary for optimum performance. A true ground plane and short connections to all the external capacitors will improve performance and ensure proper regulation under all conditions. Figure 4 shows an example layout for the LTC3240. SHDN C– VIN Ceramic capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. For example, a capacitor made of X5R or X7R material will retain most of its capacitance from –40°C to 85°C whereas a Z5U or Y5V style capacitor will lose considerable capacitance over that range. Z5U and Y5V capacitors may also have a poor voltage coefficient causing them to lose 60% or more of their capacitance when the rated voltage is applied. Therefore when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than discussing the specified capacitance value. For example, a 4.7µF 10V Y5V ceramic capacitor in a 0805 case only retains 25% of its rated capacitance over temperature with a 3.3V bias, while a 4.7µF 10V X5R ceramic capacitor will retain 80% of its rated capacitance over the same conditions. The capacitor manufacturer’s data sheet should be consulted to ensure the desired capacitance at all temperatures and voltages. AVX Kemet Murata Taiyo Yuden Vishay TDK CIN 1µF 0603 CFLY 1µF 0603 VOUT COUT 4.7µF 0603 C+ 3240 F04 Figure 4. Recommended Layout Thermal Management For higher input voltages and maximum output current, there can be substantial power dissipation in the LTC3240. If the junction temperature increases above approximately 160°C, the thermal shutdown circuitry will automatically deactivate the output. To reduce the maximum junction temperature, a good thermal connection to the PC board is recommended. Connecting GND (Pin 1) and the Exposed Pad of the DFN package to a ground plane under the device on two layers of the PC board can reduce the thermal resistance of the package and PC board considerably. Derating Power at High Temperatures To prevent an overtemperature condition in high power applications, Figure 5 should be used to determine the maximum combination of ambient temperature and power dissipation. The power dissipated in the LTC3240 should always fall under the line shown for a given ambient temperature. The power dissipation of the LTC3240 in step-up mode is given by the expression: PD = (2VIN – VOUT) • IOUT The power dissipation in step-down mode is given by: PD = (VIN – VOUT) • IOUT 3240fb 10 LTC3240-3.3/LTC3240-2.5 U W U U APPLICATIO S I FOR ATIO 3.0 This derating curve assumes a maximum thermal resistance, θJA, of 80°C/W for the 2 × 2 DFN package. This can be achieved from a printed circuit board layout with a solid ground plane and a good connection to the ground pins of LTC3240 and the Exposed Pad of the DFN package. θJA = 80°C/W POWER DISSIPATION (W) 2.5 2.0 THERMAL SHUTDOWN TJ = 160°C 1.5 It is recommended that the LTC3240 be operated in the region corresponding to TJ ≤ 125°C for continuous operation as shown in Figure 5. Short term operation may be acceptable for 125°C ≤ TJ ≤ 160°C but long term operation in this region should be avoided as it may reduce the life of the part or cause degraded performance. For TJ ≥ 160°C, the part will be in thermal shutdown. 1.0 0.5 RECOMMENDED OPERATION TJ = 125°C 0 – 50 – 25 25 50 75 100 125 150 0 AMBIENT TEMPERATURE (°C) LT3240 F05 Figure 5. Maximum Power Dissipation vs Ambient Temperature U PACKAGE DESCRIPTIO DC Package 6-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1703) R = 0.115 TYP 0.56 ± 0.05 (2 SIDES) 0.675 ±0.05 2.50 ±0.05 1.15 ±0.05 0.61 ±0.05 (2 SIDES) PACKAGE OUTLINE PIN 1 BAR TOP MARK (SEE NOTE 6) 0.38 ± 0.05 4 2.00 ±0.10 (4 SIDES) PIN 1 CHAMFER OF EXPOSED PAD 3 0.25 ± 0.05 0.50 BSC 1.42 ±0.05 (2 SIDES) 0.200 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 6 0.75 ±0.05 (DC6) DFN 1103 1 0.25 ± 0.05 0.50 BSC 1.37 ±0.05 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3240fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC3240-3.3/LTC3240-2.5 U TYPICAL APPLICATIO 2.5V Output from 2-Cell NiMH 1µF 2 1.8V TO 3V 2-CELL NiMH 1µF 1, 7 OFF ON 6 5 C– VIN 4 C+ 3 VOUT LTC3240-2.5 2.5V 4.7µF GND SHDN 3240 TA02 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1751-3.3/LTC1751-5 100mA, 800kHz Regulated Doubler VIN: 2V to 5V, VOUT(MAX) = 3.3V/5V, IQ = 20µA, ISD < 2µA, MS8 Package LTC1983-3/LTC1983-5 100mA, 900kHz Regulated Inverter VIN: 3.3V to 5.5V, VOUT(MAX) = –3V/–5V, IQ = 25µA, ISD < 2µA, ThinSOTTM Package LTC3200-5 100mA, 2MHz Low Noise, Doubler/White LED Driver VIN: 2.7V to 4.5V, VOUT(MAX) = 5V, IQ = 3.5mA, ISD < 1µA, ThinSOT Package LTC3202 125mA, 1.5MHz Low Noise, Fractional White LED Driver VIN: 2.7V to 4.5V, VOUT(MAX) = 5.5V, IQ = 2.5mA, ISD < 1µA, DFN, MS Packages LTC3204-3.3 LTC3204B-3.3 LTC3204-5 LTC3204B-5 Low Noise, Regulated Charge Pumps in (2mm × 2mm) DFN Package VIN: 1.8V to 4.5V (LTC3204B-3.3), 2.7V to 5.5V (LTC3204B-5), IQ = 48µA, “B” Version Without Burst Mode Operation, 6-Lead (2mm × 2mm) DFN Package LTC3440 600mA (IOUT) 2MHz Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, IQ = 25µA, ISD ≤ 1µA, 10-Lead MS Package LTC3441 High Current Micropower 1MHz Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, IQ = 25µA, ISD ≤ 1µA, DFN Package LTC3443 High Current Micropower 600kHz Synchronous Buck-Boost DC/DC Converter 96% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN) = 2.4V, IQ = 28µA, ISD < 1µA, DFN Package ThinSOT is a trademark of Linear Technology Coorporation 3240fb 12 Linear Technology Corporation LT 0806 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006