TI LMV358QDGKT Low-voltage rail-to-rail output operational amplifier Datasheet

 SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
D
D
D
D
D
D
D
2.7-V and 5-V Performance
−405C to 1255C Operation
Low-Power Shutdown Mode (LMV324S)
No Crossover Distortion
Low Supply Current
− LMV321 . . . 130 µA Typ
− LMV358 . . . 210 µA Typ
− LMV324 . . . 410 µA Typ
− LMV324S . . . 410 µA Typ
Rail-to-Rail Output Swing
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
The LMV321, LMV358, and LMV324/LMV324S
are single, dual, and quad low-voltage (2.7 V to
5.5 V), operational amplifiers with rail-to-rail
output swing. The LMV324S, which is a variation
of the standard LMV324, includes a power-saving
shutdown feature that reduces supply current to a
maximum of 5 µA per channel when the amplifiers
are not needed. Channels 1 and 2 together are put
in shutdown, as are channels 3 and 4. While in
shutdown, the outputs actively are pulled low.
The LMV321, LMV358, LMV324, and LMV324S
are the most cost-effective solutions for
applications where low-voltage operation, space
saving, and low cost are needed. These amplifiers
were designed specifically for low-voltage (2.7 V
to 5 V) operation, with performance specifications
meeting or exceeding the LM358 and LM324
devices that operate from 5 V to 30 V. Additional
features of the LMV3xx devices are a
common-mode input voltage range that includes
ground, 1-MHz unity-gain bandwidth, and 1-V/µs
slew rate.
LMV324 . . . D (SOIC) OR PW (TSSOP) PACKAGE
(TOP VIEW)
1OUT
1IN−
1IN+
VCC+
2IN+
2IN−
2OUT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT
4IN−
4IN+
GND
3IN+
3IN−
3OUT
LMV324S . . . D (SOIC) OR PW (TSSOP) PACKAGE
(TOP VIEW)
1OUT
1IN−
1IN+
VCC
2IN+
2IN−
2OUT
1/2 SHDN
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
4OUT
4IN−
4IN+
GND
3IN+
3IN−
3OUT
3/4 SHDN
LMV358 . . . D (SOIC), DDU (VSSOP),
DGK (MSOP), OR PW (TSSOP PACKAGE
(TOP VIEW)
1OUT
1IN−
1IN+
GND
1
8
2
7
3
6
4
5
VCC+
2OUT
2IN−
2IN+
LMV321 . . . DBV (SOT-23) OR DCK (SC-70) PACKAGE
(TOP VIEW)
1IN+
1
GND
2
IN−
3
5
VCC+
4
OUT
The LMV321 is available in the ultra-small DCK
(SC-70) package, which is approximately
one-half the size of the DBV (SOT-23) package.
This package saves space on printed circuit
boards and enables the design of small portable
electronic devices. It also allows the designer to
place the device closer to the signal source to
reduce noise pickup and increase signal integrity.
Copyright  2004, Texas Instruments Incorporated
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ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
SC-70 (DCK)
Single
SOT23-5 (DBV)
MSOP/VSSOP (DGK)
Dual
SOIC (D)
−40°C
−40
C to 85
85°C
C
TSSOP (PW)
VSSOP (DDU)
SOIC (D)
Quad
TSSOP (PW)
Dual
SOIC (D)
TSSOP (PW)
−40°C
125°C
−40
C to 125
C
Reel of 3000
LMV321IDCKR
Reel of 250
LMV321IDCKT
Reel of 3000
LMV321IDBVR
Reel of 250
LMV321IDBVT
Reel of 2500
LMV358IDGKR
R5_
Reel of 250
LMV358IDGKT
PREVIEW
Tube of 75
LMV358ID
Reel of 2500
LMV358IDR
Tube of 150
LMV358IPW
Reel of 2000
LMV358IPWR
Reel of 3000
LMV358IDDUR
Tube of 50
LMV324ID
Reel of 2500
LMV324IDR
Tube of 40
LMV324SID
Reel of 2500
LMV324SIDR
Reel of 2000
MSOP/VSSOP (DGK)
VSSOP (DDU)
SOIC (D)
Quad
TSSOP (PW)
TOP-SIDE
MARKING‡
R3_
RC1_
MV358I
MV358I
RA56
LMV324I
LMV324SI
LMV324IPWR
MV324I
LMV324SIPWR
MV324SI
Reel of 2500
LMV358QDGKR
Reel of 250
LMV358QDGKT
Tube of 75
LMV358QD
Reel of 2500
LMV358QDR
Tube of 150
LMV358QPW
Reel of 2000
LMV358QPWR
Reel of 3000
LMV358QDDUR
Tube of 50
LMV324QD
Reel of 2500
LMV324QDR
Tube of 90
LMV324QPW
Reel of 2000
LMV324QPWR
RH_
MV358Q
MV358Q
RAH_
LMV324Q
MV324Q
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DBV/DCK/DGK: The actual top-side marking has one additional character that designates the assembly/test site.
symbol (each amplifier)
−
IN−
OUT
2
+
IN+
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LMV324 simplified schematic
VCC
VBIAS1
+
VCC
−
VBIAS2
+
Output
−
VCC VCC
VBIAS3
+
IN−
IN+
−
VBIAS4
+
−
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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5.5 V
Input voltage, VI (either input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 5.5 V
Duration of output short circuit (one amplifier) to ground at (or below) TA = 25°C,
VCC ≤ 5.5 V (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Package thermal impedance, qJA (see Notes 4 and 5): D (8-pin) package . . . . . . . . . . . . . . . . . . . . . . 97°C/W
D (14-pin) package . . . . . . . . . . . . . . . . . . . . 86°C/W
D (16-pin) package . . . . . . . . . . . . . . . . . . . . 73°C/W
DBV (5-pin) package . . . . . . . . . . . . . . . . . . 206°C/W
DCK (5-pin) package . . . . . . . . . . . . . . . . . . 252°C/W
DDU (8-pin) package . . . . . . . . . . . . . . . . . TBD°C/W
DGK (8-pin) package . . . . . . . . . . . . . . . . . . 172°C/W
PW (8-pin) package . . . . . . . . . . . . . . . . . . . 149°C/W
PW (14-pin) package . . . . . . . . . . . . . . . . . . 113°C/W
PW (16-pin) package . . . . . . . . . . . . . . . . . . 108°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values (except differential voltages and VCC specified for the measurement of IOS) are with respect to the network GND.
2. Differential voltages are at IN+ with respect to IN−.
3. Short circuits from outputs to VCC can cause excessive heating and eventual destruction.
4. Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/qJA. Selecting the maximum of 150°C can affect reliability.
5. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 6)
VCC
Supply voltage (single-supply operation)
VIH
Amplifier turnon voltage level (LMV324S)‡
VCC = 2.7 V
VCC = 5 V
VIL
Amplifier turnoff voltage level (LMV324S)
VCC = 2.7 V
VCC = 5 V
TA
Operating free-air temperature
MIN
MAX
2.7
5.5
UNIT
V
1.7
V
3.5
0.7
1.5
I-Temp
−40
85
Q-Temp
−40
125
V
°C
‡ VIH should not be allowed to exceed VCC.
NOTE 6: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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electrical characteristics at TA = 25°C and VCC+ = 2.7 V (unless otherwise noted)
PARAMETER
VIO
Input offset voltage
aV
Average temperature coefficient
of input offset voltage
IO
TEST CONDITIONS
MIN
TYP
MAX
1.7
7
UNIT
mV
mV/°C
5
IIB
IIO
Input bias current
11
250
nA
Input offset current
5
50
nA
CMRR
Common-mode rejection ratio
kSVR
Supply-voltage rejection ratio
VCM = 0 to 1.7 V
VCC = 2.7 V to 5 V,
VICR
Common-mode input voltage range
CMRR w 50 dB
Output swing
50
63
dB
VO = 1 V
50
60
dB
0 to 1.7
−0.2 to 1.9
V
High level
VCC − 100
VCC − 10
60
180
80
170
LMV358I (both amplifiers)
140
340
LMV324I/LMV324SI (all four amplifiers)
260
680
RL = 10 kΩ to 1.35 V
Low level
LMV321I
ICC
Supply current
CL = 200 pF
mV
mA
B1
Fm
Unity-gain bandwidth
1
MHz
Phase margin
60
deg
Gm
Gain margin
10
dB
Vn
In
Equivalent input noise voltage
f = 1 kHz
46
nV/√Hz
Equivalent input noise current
f = 1 kHz
0.17
pA/√Hz
shutdown characteristics (LMV324S) at TA = 25°C and VCC+ = 2.7 V (unless otherwise noted)
PARAMETER
ICC(SHDN)
t(on)
t(off)
TEST CONDITIONS
Supply current in shutdown mode
(per channel)
SHDN ≤ 0.6 V
Amplifier turnon time
AV = 1, RL = Open (measured at 50% point)
AV = 1, RL = Open (measured at 50% point)
Amplifier turnoff time
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TYP
MAX
5
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UNIT
mA
2
ms
40
ns
5
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
electrical characteristics at specified free-air temperature range, VCC+ = 5 V (unless otherwise
noted)
PARAMETER
VIO
Input offset voltage
aV
Average temperature coefficient
of input offset voltage
IO
IIB
Input bias current
IIO
Input offset current
CMRR
Common-mode rejection ratio
kSVR
Supply-voltage rejection ratio
VICR
Common-mode
input voltage range
TEST CONDITIONS
TA†
25°C
MIN
9
25°C
5
25°C
15
5
UNIT
mV
mV/°C
250
500
Full range
nA
50
150
nA
VCM = 0 to 4 V
VCC= 2.7 V to 5 V, VO = 1 V,
VCM = 1 V
25°C
50
65
dB
25°C
50
60
dB
CMMR w 50 dB
25°C
0 to 4
−0.2 to 4.2
V
25°C
VCC − 300
VCC − 400
VCC − 40
RL = 2 kΩ to 2.5 V
Full range
25°C
Low level
Output swing
High level
Large-signal differential
voltage gain
RL = 2 kΩ
IOS
Output short-circuit current
Sourcing, VO = 0 V
Sinking, VO = 5 V
Full range
VCC − 100
VCC − 200
Full range
10
CL = 200 pF
100
V/mV
5
60
10
160
130
Full range
LMV358I (both amplifiers)
mA
250
350
210
Full range
25°C
180
280
15
25°C
LMV324I/LMV324SI
(all four amplifiers)
65
25°C
25°C
LMV321I
mV
VCC − 10
Full range
25°C
300
400
25°C
Low level
AVD
120
Full range
25°C
RL = 10 kΩ to 2.5 V
440
615
410
Full range
A
mA
830
1160
B1
fm
Unity-gain bandwidth
25°C
1
MHz
Phase margin
25°C
60
deg
Gm
Gain margin
25°C
10
dB
Vn
In
Equivalent input noise voltage
f = 1 kHz
25°C
39
nV/√Hz
Equivalent input noise current
f = 1 kHz
25°C
0.21
pA/√Hz
25°C
1
SR
Slew rate
† Full range: −40°C to 85°C for I-temp, −40°C to 125°C for Q-temp.
6
7
Full range
High level
Supply current
MAX
1.7
Full range
25°C
ICC
TYP
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V/ms
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
shutdown characteristics (LMV324S) at TA = 25°C and VCC+ = 5 V (unless otherwise noted)
PARAMETER
ICC(SHDN)
t(on)
t(off)
TEST CONDITIONS
TA
Supply current in shutdown mode
(per channel)
SHDN ≤ 0.6 V
Amplifier turnon time
AV = 1, RL = Open (measured at 50% point)
AV = 1, RL = Open (measured at 50% point)
Amplifier turnoff time
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MIN
TYP
−40°C to 85°C
• DALLAS, TEXAS 75265
MAX
5
UNIT
mA
2
ms
40
ns
7
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
LMV321 FREQUENCY RESPONSE
vs
RESISTIVE LOAD
LMV321 FREQUENCY RESPONSE
vs
RESISTIVE LOAD
Vs = 2.7 V
RL = 100 kΩ, 2 kΩ, 600 Ω
70
Phase
60
Gain − dB
40
70
90
60
75
60
2 kΩ
100 kΩ
30
105
45
Gain
20
30
600 Ω
10
100 kΩ
−10
1k
10 k
100 k
Frequency − Hz
600 Ω
Phase
50
75
2 kΩ
60
40
100 kΩ
30
45
Gain
20
10
15
15
2 kΩ
1M
0
0
−15
10 M
−10
1k
10 k
LMV321 FREQUENCY RESPONSE
vs
CAPACITIVE LOAD
LMV321 FREQUENCY RESPONSE
vs
CAPACITIVE LOAD
70
100
60
100
Phase
0 pF
50
80
60
60
50
80
0 pF
60
100 pF
Vs = 5.0 V
RL = 600 Ω
CL = 0 pF
100 pF
500 pF
1000 pF
−30
10 k
−20
100 pF
−40
500 pF
0 pF
−60
1000 pF
−80
100 k
1M
Frequency − Hz
−100
10 M
Gain − dB
Gain − dB
Gain
40
40
30
0
10
−20
Vs = 5.0 V
0 pF
RL = 100 kΩ
100 pF
−10 CL = 0 pF
100 pF
500 pF
500 pF
−20
1000 pF
1000 pF
−30
10 k
100 k
1M
Frequency − Hz
0
Figure 4
POST OFFICE BOX 655303
20
20
Figure 3
8
500 pF
Gain
• DALLAS, TEXAS 75265
−40
Phase Margin − Deg
0
20
−20
20
Phase Margin − Deg
500 pF
1000 pF
100 pF
1000 pF
40
40
−10
−15
10 M
100 k
1M
Frequency − Hz
Phase
0
0
600 Ω
Figure 2
70
10
30
100 kΩ
Figure 1
30
105
90
2 kΩ
0
120
Vs = 5.0 V
RL = 100 kΩ, 2 kΩ, 600 Ω
Phase Margin − Deg
600 Ω
80
Phase Margin − Deg
50
120
Gain − dB
80
−60
−80
−100
10 M
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
STABILITY
vs
CAPACITIVE LOAD
LMV321 FREQUENCY RESPONSE
vs
TEMPERATURE
120
80
Vs = 5.0 V
RL = 2 kΩ
60
75
Gain − dB
25°C
60
40
−40°C
45
Gain
20
30
85°C
25°C
0
−10
1k
10 k
100
VCC = ±2.5 V
AV = +1
RL = 2 kΩ
VO = 100 mVPP
10
−2
−15
10 M
100 k
1M
Frequency − Hz
0
STABILITY
vs
CAPACITIVE LOAD
STABILITY
vs
CAPACITIVE LOAD
2.5 V
_
1000
VO
+
RL
2.5 V
CL
Capacitive Load − nF
Capacitive Load − pF
−0.5
Figure 6
10000
LMV324S
(25% Overshoot)
100
LMV3xx
(25% Overshoot)
−1.5
−1
−1
−0.5
0
Output Voltage − V
VCC = ±2.5 V
RL = 2 kΩ
AV = 10
VO = 100 mVPP
1
1.5
1
LMV324S
(25% Overshoot)
1000
LMV3xx
(25% Overshoot)
100
134 kΩ
1.21 MΩ
+2.5 V
VCC = ±2.5 V
AV = +1
RL = 1 MΩ
VO = 100 mVPP
0.5
0.5
Output Voltage − V
10000
10
−2.0
−1.5
Figure 5
VI
CL
LMV3xx
(25% Overshoot)
0
−40°C
VO
RL
−2.5 V
1000
15
10
+
VI
Phase Margin − Deg
Phase
30
_
90
85°C
50
2.5 V
LMV324S
(25% Overshoot)
105
Capacitive Load − pF
70
10000
_
VI
+
RL
VO
CL
−2.5 V
1.5
10
−2.0
−1.5
−1
−0.5
0
Output Voltage − V
0.5
1
1.5
Figure 8
Figure 7
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SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
SLEW RATE
vs
SUPPLY VOLTAGE
STABILITY
vs
CAPACITIVE LOAD
10000
1.500
1.400
LMV3xx
(25% Overshoot)
1000
LMV324S
(25% Overshoot)
100
134 kΩ
1.21 MΩ
_
−1.5
NSLEW
1.100
LMV3xx
1.000
PSLEW
0.900
+
VO
CL
RL
NSLEW
0.700
LMV324S
0.600
−2.5 V
10
−2.0
Gain
1.200
0.800
+2.5 V
VI
RL = 100 kΩ
1.300
Slew Rate − V/µs
Capacitive Load − nF
VCC = ±2.5 V
RL = 1 MΩ
AV = 10
VO = 100 mVPP
PSLEW
−1
−0.5
0
0.5
1
0.500
2.5
1.5
3.0
3.5
4.5
5.0
V CC − Supply Voltage − V
Output Voltage − V
Figure 9
Figure 10
SUPPLY CURRENT
vs
SUPPLY VOLTAGE − QUAD AMPLIFIER
INPUT CURRENT
vs
TEMPERATURE
700
−10
VCC = 5 V
VI = VCC/2
LMV3xx
600
LMV324S
−20
TA = 85°C
500
Input Current − nA
Supply Current − µA
4.0
TA = 25°C
400
300
TA = −40°C
200
−30
LMV3xx
−40
−50
100
LMV324S
0
0
1
2
3
4
5
6
−60
−40 −30 −20 −10 0 10 20 30 40 50 60 70 80
TA − °C
VCC − Supply Voltage − V
Figure 11
10
Figure 12
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TYPICAL CHARACTERISTICS
SOURCE CURRENT
vs
OUTPUT VOLTAGE
SOURCE CURRENT
vs
OUTPUT VOLTAGE
100
100
VCC = 2.7 V
VCC = 5 V
10
Sourcing Current − mA
Sourcing Current − mA
10
LMV3xx
1
LMV324S
0.1
LMV3xx
1
LMV324S
0.1
0.01
0.01
0.001
0.001
0.01
0.1
1
10
0.001
0.001
Output Voltage Referenced to VCC+ − V
0.01
0.1
Figure 13
SINKING CURRENT
vs
OUTPUT VOLTAGE
100
100
VCC = 2.7 V
VCC = 5 V
10
10
LMV324S
Sinking Current − mA
Sinking Current − mA
10
Figure 14
SINKING CURRENT
vs
OUTPUT VOLTAGE
1
LMV3xx
0.1
0.01
0.001
0.001
1
Output Voltage Referenced to VCC+ − V
LMV324S
1
LMV324
0.1
0.01
0.01
0.1
1
10
Output Voltage Referenced to GND − V
0.001
0.001
0.01
0.1
1
10
Output Voltage Referenced to GND − V
Figure 16
Figure 15
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SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT CURRENT
vs
TEMPERATURE
SHORT-CIRCUIT CURRENT
vs
TEMPERATURE
120
300
LMV324S
VCC = 5 V
270
Sinking Current − mA
LMV324S
VCC = 5 V
210
LMV3xx
VCC = 5 V
180
150
120
LMV3xx
VCC = 2.7 V
90
60
LMV324S
VCC = 2.7 V
Sourcing Current − mA
100
240
80
LMV3xx
VCC = 5 V
60
LMV3xx
VCC = 2.7 V
40
LMV324S
VCC = 2.7 V
20
30
0
−40 −30 −20 −10 0
0
10 20 30 40 50 60 70 80 90
TA − °C
10 20 30 40 50 60 70 80 90
TA − °C
Figure 17
Figure 18
−kSVR
vs
FREQUENCY
+kSVR
vs
FREQUENCY
90
80
LMV324S
VCC = −5 V
RL = 10 kΩ
70
LMV324S
VCC = 5 V
RL = 10 kΩ
80
70
60
LMV3xx
LMV3xx
60
50
+k SVR − dB
−k SVR − dB
−40 −30 −20−10 0
40
30
50
40
30
20
20
10
10
0
0
.1
1
10
100
1,000
.1
10
Frequency − Hz
Frequency − kHz
Figure 19
12
1
Figure 20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
100
1,000
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
−kSVR
vs
FREQUENCY
+kSVR
vs
FREQUENCY
80
80
VCC = −2.7 V
RL = 10 kΩ
LMV324S
70
70
LMV3xx
+k SVR − dB
50
40
30
LMV3xx
50
40
30
20
20
10
10
0
0
.1
1
10
100
.1
1,000
1
10
Frequency − kHz
Figure 21
Figure 22
6
RL = 10 kΩ
THD > 5%
AV = 3
RL = 10 kΩ
60
Peak Output Voltage − V OPP
5
LMV3xx
LMV324S
Negative Swing
1,000
OUTPUT VOLTAGE
vs
FREQUENCY
70
50
100
Frequency − kHz
OUTPUT VOLTAGE SWING FROM RAILS
vs
SUPPLY VOLTAGE
Output Voltage Swing vs Supply Voltage − mV
VCC = 2.7 V
RL = 10 kΩ
60
60
−k SVR − dB
LMV324S
40
30
20
Positive Swing
LMV3xx
VCC = 5 V
4
LMV324S
VCC = 5 V
3
LMV3xx
VCC = 2.7 V
2
LMV324S
VCC = 2.7 V
1
10
0
0
2.5
3.0
3.5
4.0
4.5
5.0
1
10
100
1000
10000
Frequency − kHz
VCC − Supply Voltage − V
Figure 24
Figure 23
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
OPEN-LOOP OUTPUT IMPEDANCE
vs
FREQUENCY
CROSSTALK REJECTION
vs
FREQUENCY
150
110
LMV3xx
VCC = 5 V
Impedance − Ω
90
80
70
LMV324S
VCC = 2.7 V
60
50
LMV324S
VCC = 5 V
40
VCC = 5 V
RL = 5 kΩ
AV = 1
VO = 3 VPP
140
Crosstalk Rejection − dB
100
LMV3xx
VCC = 2.7 V
130
120
110
100
30
20
1
1000
2000
3000
4000
90
.1
Frequency − kHz
10
Frequency − kHz
Figure 25
14
1
Figure 26
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
100
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
NONINVERTING LARGE-SIGNAL
PULSE RESPONSE
NONINVERTING LARGE-SIGNAL
PULSE RESPONSE
Input
LMV3xx
LMV3xx
1 V/Div
1 V/Div
Input
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
T = 25°C
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = 85°C
1 µs/Div
1 µs/Div
Figure 27
Figure 28
NONINVERTING LARGE-SIGNAL
PULSE RESPONSE
Input
1 V/Div
LMV3xx
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = −40°C
1 µs/Div
Figure 29
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
NONINVERTING SMALL-SIGNAL
PULSE RESPONSE
NONINVERTING SMALL-SIGNAL
PULSE RESPONSE
Input
Input
LMV3xx
50 mV/Div
50 mV/Div
LMV3xx
LMV324S
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = 25°C
VCC = ±2.5 V
RL = 2 kΩ
TA = 85°C
1 µs/Div
1 µs/Div
Figure 30
Figure 31
NONINVERTING SMALL-SIGNAL
PULSE RESPONSE
50 mV/Div
Input
LMV3xx
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = −40°C
1 µs/Div
Figure 32
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
INVERTING LARGE-SIGNAL
PULSE RESPONSE
INVERTING LARGE-SIGNAL
PULSE RESPONSE
Input
Input
LMV3xx
1 V/Div
1 V/Div
LMV3xx
LMV324S
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = 25°C
VCC = ±2.5 V
RL = 2 kΩ
TA = 85°C
1 µs/Div
1 µs/Div
Figure 33
Figure 34
INVERTING LARGE-SIGNAL
PULSE RESPONSE
Input
1 V/Div
LMV3xx
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = −40°C
1 µs/Div
Figure 35
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
INVERTING SMALL-SIGNAL
PULSE RESPONSE
INVERTING SMALL-SIGNAL
PULSE RESPONSE
Input
Input
LMV3xx
50 mV/Div
50 mV/Div
LMV3xx
LMV324S
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = 25°C
VCC = ±2.5 V
RL = 2 kΩ
TA = 85°C
1 µs/Div
1 µs/Div
Figure 36
Figure 37
INVERTING SMALL-SIGNAL
PULSE RESPONSE
50 mV/Div
Input
LMV3xx
LMV324S
VCC = ±2.5 V
RL = 2 kΩ
TA = −40°C
1 µs/Div
Figure 38
18
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
INPUT CURRENT NOISE
vs
FREQUENCY
INPUT CURRENT NOISE
vs
FREQUENCY
0.80
0.50
0.60
0.40
0.20
VCC = 5 V
0.45
Input Current Noise − pA/ Hz
Input Current Noise − pA/ Hz
VCC = 2.7 V
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0.00
10 Hz
100 Hz
1 KHz
10 KHz
10 Hz
100 Hz
1 kHz
10 kHz
Frequency
Frequency
Figure 39
Figure 40
INPUT VOLTAGE NOISE
vs
FREQUENCY
200
Input Voltage Noise − nV/ Hz
180
160
140
120
100
80
VCC = 2.7 V
60
40
VCC = 5 V
20
10 Hz
100 Hz
1 kHz
10 kHz
Frequency
Figure 41
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
19
SLOS263Q − AUGUST 1999 − REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
THD + N
vs
FREQUENCY
THD + N
vs
FREQUENCY
10.000
1.000
10.000
VCC = 2.7 V
RL = 10 kΩ
AV = 1
VO = 1 VPP
VCC = 2.7 V
RL = 10 kΩ
AV = 10
VO = 1 VPP
1.000
THD − %
THD − %
LMV324S
LMV3xx
0.100
0.100
LMV3xx
0.010
0.010
LMV324S
0.001
0.001
10
100
1000
10000
10
100000
1.000
10000
Frequency − Hz
Frequency − Hz
Figure 42
Figure 43
THD + N
vs
FREQUENCY
10.000
1000
100
100000
THD + N
vs
FREQUENCY
10.000
VCC = 5 V
RL = 10 kΩ
AV = 1
VO = 1 VPP
VCC = 5 V
RL = 10 kΩ
AV = 10
VO = 2.5 VPP
1.000
0.100
THD − %
THD − %
LMV324S
LMV324S
0.100
0.010
0.010
LMV3xx
LMV3xx
0.001
0.001
10
20
100
1000
10000
100000
10
100
1000
Frequency − Hz
Frequency − Hz
Figure 44
Figure 45
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
10000
100000
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
LMV321IDBVR
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
LMV321IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
LMV321IDCKR
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
LMV321IDCKT
ACTIVE
SC70
DCK
5
250
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
LMV324ID
ACTIVE
SOIC
D
14
50
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
LMV324IDR
ACTIVE
SOIC
D
14
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
LMV324IPWR
ACTIVE
TSSOP
PW
14
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
LMV324QD
ACTIVE
SOIC
D
14
50
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
LMV324QDR
ACTIVE
SOIC
D
14
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
LMV324QPW
ACTIVE
TSSOP
PW
14
90
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
LMV324QPWR
ACTIVE
TSSOP
PW
14
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
LMV324SID
ACTIVE
SOIC
D
16
40
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
LMV324SIDR
ACTIVE
SOIC
D
16
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
LMV324SIPWR
ACTIVE
TSSOP
PW
16
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
LMV358ID
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
LMV358IDDUR
ACTIVE
VSSOP
DDU
8
3000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
LMV358IDGKR
ACTIVE
MSOP
DGK
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
LMV358IDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
LMV358IPW
ACTIVE
TSSOP
PW
8
150
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
LMV358IPWR
ACTIVE
TSSOP
PW
8
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
LMV358QD
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
LMV358QDDUR
ACTIVE
VSSOP
DDU
8
3000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
LMV358QDGKR
ACTIVE
MSOP
DGK
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
LMV358QDR
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
LMV358QPW
ACTIVE
TSSOP
PW
8
150
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
Addendum-Page 1
Lead/Ball Finish
MSL Peak Temp (3)
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
LMV358QPWR
ACTIVE
TSSOP
PW
Pins Package Eco Plan (2)
Qty
8
2000
Pb-Free
(RoHS)
Lead/Ball Finish
CU NIPDAU
MSL Peak Temp (3)
Level-1-250C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002
DCK (R-PDSO-G5)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
0,65
5
0,10 M
4
1,40
1,10
1
0,13 NOM
2,40
1,80
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
1,10
0,80
0,10
0,00
0,10
4093553-2/D 01/02
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-203
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
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