TI1 INA141UAG4 Precision, low power, g = 10, 100 instrumentation amplifier Datasheet

®
INA141
INA
141
INA
141
Precision, Low Power, G = 10, 100
INSTRUMENTATION AMPLIFIER
FEATURES
DESCRIPTION
● LOW OFFSET VOLTAGE: 50µV max
● LOW DRIFT: 0.5µV/°C max
The INA141 is a low power, general purpose instrumentation amplifier offering excellent accuracy. Its
versatile 3-op amp design and small size make it ideal
for a wide range of applications. Current-feedback
input circuitry provides wide bandwidth even at high
gain (200kHz at G = 100).
● ACCURATE GAIN: ±0.05% at G = 10
● LOW INPUT BIAS CURRENT: 5nA max
● HIGH CMR: 117dB min
● INPUTS PROTECTED TO ±40V
● WIDE SUPPLY RANGE: ±2.25 to ±18V
Simple pin connections set an accurate gain of 10 or
100V/V without external resistors. Internal input protection can withstand up to ±40V without damage.
● LOW QUIESCENT CURRENT: 750µA
● 8-PIN PLASTIC DIP, SO-8
● BRIDGE AMPLIFIER
The INA141 is laser trimmed for very low offset
voltage (50µV), drift (0.5µV/°C) and high commonmode rejection (117dB at G = 100). It operates with
power supplies as low as ±2.25V, and quiescent
current is only 750µA—ideal for battery operated
systems.
● THERMOCOUPLE AMPLIFIER
● RTD SENSOR AMPLIFIER
● MEDICAL INSTRUMENTATION
The INA141 is available in 8-pin plastic DIP, and
SO-8 surface-mount packages, specified for the –40°C
to +85°C temperature range.
APPLICATIONS
● DATA ACQUISITION
V+
7
–
VIN
2
1
Over-Voltage
Protection
INA141
A1
40kΩ
252Ω
40kΩ
25kΩ
G = 10
or
G =100
A3
5050Ω
8
+
VIN
3
6
VO
252Ω
25kΩ
Over-Voltage
Protection
5
A2
40kΩ
Ref
40kΩ
4
V–
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
PDS-1297B
1
SBOS052
INA141
SPECIFICATIONS
At TA = +25°C, VS = ±15V, and RL = 10kΩ, unless otherwise noted.
INA141P, U
PARAMETER
CONDITIONS
INPUT
Offset Voltage, RTI
vs Temperature
vs Power Supply
Long-Term Stability
TYP
MAX
±50
±100
±0.5
±2
±1
±10
(V+) – 2
(V–) + 2
±20
±50
±0.2
±0.5
±0.4
±2
0.2
0.5
1010 || 2
1010 || 9
(V+) – 1.4
(V–) + 1.7
117
100
125
106
G = 100
G = 10
G = 100
G = 10(2)
VS = ±2.25 to ±18V, G = 100
G = 10
G = 100
G = 10
Impedance, Differential
Common-Mode
Common-Mode Voltage Range(1)
Safe Input Voltage
Common-Mode Rejection
VO = 0V
VCM = ±13V, ∆RS = 1kΩ
G = 100
G = 10
±2
±30
±1
±30
BIAS CURRENT
vs Temperature
Offset Current
vs Temperature
NOISE VOLTAGE, RTI
f = 10Hz
f = 100Hz
f = 1kHz
fB = 0.1Hz to 10Hz
f = 10Hz
f = 100Hz
f = 1kHz
fB = 0.1Hz to 10Hz
Noise Current
f = 10Hz
f = 1kHz
fB = 0.1Hz to 10Hz
GAIN
Gain Error
Gain vs Temperature(2)
Nonlinearity
G = 100, RS = 0Ω
G = 10, RS = 0Ω
VO = ±13.6V, G = 100
G = 10
G = 10, 100
G = 100
G = 10
OUTPUT
Voltage: Positive
Negative
Load Capacitance Stability
Short-Circuit Current
FREQUENCY RESPONSE
Bandwidth, –3dB
RL = 10kΩ
RL = 10kΩ
Overload Recovery
G = 100
G = 10
VO = ±10V, G = 10
VO = ±5V, G = 100
G = 10
50% Overdrive
POWER SUPPLY
Voltage Range
Current, Total
VIN = 0V
Slew Rate
Settling Time, 0.01%
(V+) – 1.4
(V–) + 1.4
MIN
TYP
MAX
UNITS
±125
±250
±1.5
±2.5
±3
±20
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
µV
µV
µV/°C
µV/°C
µV/V
µV/V
µV/mo
µV/mo
Ω || pF
Ω || pF
V
V
V
110
93
120
100
±40
✻
±5
✻
✻
✻
✻
±5
dB
dB
±10
±10
nA
pA/°C
nA
pA/°C
10
8
8
0.2
22
13
12
0.6
✻
✻
✻
✻
✻
✻
✻
✻
nV/√Hz
nV/√Hz
nV/√Hz
µVp-p
nV/√Hz
nV/√Hz
nV/√Hz
µVp-p
0.9
0.3
30
✻
✻
✻
pA/√Hz
pA/√Hz
pAp-p
±0.03
±0.01
±2
±0.0005
±0.0003
±0.075
±0.05
±10
±0.002
±0.001
✻
✻
✻
✻
✻
✻
✻
(V+) – 0.9
(V–) + 0.9
1000
+6/–15
200
1
4
9
7
4
±2.25
TEMPERATURE RANGE
Specification
Operating
θJA
8-Pin DIP
SO-8 SOIC
INA141PA, UA
MIN
±15
±750
–40
–40
±18
±800
✻
85
125
✻
✻
80
150
±0.15
±0.15
✻
±0.004
±0.002
%
%
ppm/°C
% of FSR
% of FSR
✻
✻
✻
✻
V
V
pF
mA
✻
✻
✻
✻
✻
✻
kHz
MHz
V/µs
µs
µs
µs
✻
✻
✻
✻
✻
✻
V
µA
✻
✻
°C
°C
°C/W
°C/W
✻ Specification same as INA141P, U.
NOTE: (1) Input common-mode range varies with output voltage—see typical curves. (2) Guaranteed by wafer test.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
INA141
2
ELECTROSTATIC
DISCHARGE SENSITIVITY
PIN CONFIGURATION
8-Pin DIP and SO-8
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
Top View
J
1
8
J
–
IN
2
7
V+
V+IN
3
6
VO
V–
4
5
Ref
V
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS
ORDERING INFORMATION
Supply Voltage .................................................................................. ±18V
Analog Input Voltage Range ............................................................. ±40V
Output Short-Circuit (to ground) .............................................. Continuous
Operating Temperature ................................................. –40°C to +125°C
Storage Temperature ..................................................... –40°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
PRODUCT
PACKAGE
PACKAGE
DRAWING
NUMBER(1)
INA141PA
INA141P
INA141UA
INA141U
8-Pin Plastic DIP
8-Pin Plastic DIP
SO-8 Surface-Mount
SO-8 Surface-Mount
006
006
182
182
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
®
3
INA141
TYPICAL PERFORMANCE CURVES
At TA = +25°C and VS = ±15V, unless otherwise noted.
COMMON-MODE REJECTION vs FREQUENCY
GAIN vs FREQUENCY
140
60
G = 100V/V
Common-Mode Rejection (dB)
50
40
Gain (dB)
G = 100V/V
30
20
G = 10V/V
10
0
–10
G = 10V/V
100
80
60
40
20
0
–20
1k
10k
100k
1M
10
10M
100
1k
100k
10k
Frequency (Hz)
Frequency (Hz)
POSITIVE POWER SUPPLY REJECTION
vs FREQUENCY
NEGATIVE POWER SUPPLY REJECTION
vs FREQUENCY
140
140
120
120
100
Power Supply Rejection (dB)
Power Supply Rejection (dB)
120
G = 100V/V
80
60
G = 10V/V
40
1M
G = 100V/V
100
80
60
G = 10V/V
40
20
20
0
0
10
100
1k
10k
100k
10
1M
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE, VS = ±15V
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE, VS = ±5, ±2.5V
15
1M
5
Common-Mode Voltage (V)
Common-Mode Voltage (V)
4
10
5
VD/2
0
VD/2
+
–5
VCM
+15V
–
VO
+
–
Ref
+
–15V
–10
3
2
1
0
–1
–2
–3
VS = ±5V
VS = ±2.5V
–4
–15
–15
–10
–5
0
5
10
–5
–5
15
Output Voltage (V)
–3
–2
–1
0
1
Output Voltage (V)
®
INA141
–4
4
2
3
4
5
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C and VS = ±15V, unless otherwise noted.
G = 10V/V
1
10
G = 100V/V
Current Noise
Quiescent Current (µA)
10
100
Input Bias Current Noise (pA/√ Hz)
Input-Referred Voltage Noise (nV/√ Hz)
100
1k
0.1
1
1
10
100
1k
0.9
6
0.85
5
0.8
4
Slew Rate
0.75
3
IQ
0.7
2
0.65
10k
–75
–50
–25
Frequency (Hz)
INPUT OVER-VOLTAGE V/I CHARACTERISTICS
8
Input Current (mA)
Flat region represents
normal linear operation.
Input Offset Voltage Change (µV)
4
G = 100V/V
1
G = 10V/V
0
–1
+15V
G = 10V/V
–2
INA141
–3
G = 100V/V
VIN
–4
25
50
75
IIN
–15V
–5
–20 –10
0
1
125
6
4
2
0
–2
–4
–6
–8
–10
–50 –40 –30
100
INPUT OFFSET VOLTAGE WARM-UP
10
2
0
Temperature (°C)
5
3
Slew Rate (V/µs)
QUIESCENT CURRENT and SLEW RATE
vs TEMPERATURE
INPUT- REFERRED NOISE vs FREQUENCY
10
20
30
40
0
50
400
300
200
100
Input Voltage (V)
Time (µs)
INPUT BIAS CURRENT vs TEMPERATURE
OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
2
500
(V+)
Output Voltage (V)
Input Bias Current (nA)
(V+)–0.4
1
IOS
0
IB
–1
Typical IB Range
±2nA at 25°C
(V+)–0.8
(V+)–1.2
(V+)+1.2
(V–)+0.8
(V–)+0.4
–2
V–
–75
–50
–25
0
25
50
75
100
125
0
Temperature (°C)
1
2
3
4
Output Current (mA)
®
5
INA141
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C and VS = ±15V, unless otherwise noted.
SHORT-CIRCUIT OUTPUT CURRENT
vs TEMPERATURE
OUTPUT VOLTAGE SWING
vs POWER SUPPLY VOLTAGE
18
V+
16
Short-Circuit Current (mA)
+25°C +85°C
(V+)–0.8
–40°C
(V+)–1.2
RL = 10kΩ
(V–)+1.2
+25°C
–40°C
(V–)+0.8
(V–)+0.4
+85°C
–40°C
+85°C
–ISC
14
12
10
8
6
+ISC
4
2
0
V–
0
5
10
15
–75
20
–50
–25
0
25
50
75
100
Power Supply Voltage (V)
Temperature (°C)
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
30
125
1
G = 10, 100
VO = 1Vrms
500kHz Measurement
Bandwidth
25
20
THD+N (%)
Peak-to-Peak Output Voltage (Vpp)
Output Voltage Swing (V)
(V+)–0.4
15
0.1
RL = 10kΩ
G = 100, RL = 100kΩ
0.01
10
G = 10V/V
RL = 100kΩ
5
Dashed Portion
is noise limited.
0.001
0
1k
10k
100k
100
1M
Frequency (Hz)
10k
Frequency (Hz)
®
INA141
1k
6
100k
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C and VS = ±15V, unless otherwise noted.
LARGE-SIGNAL STEP RESPONSE
SMALL-SIGNAL STEP RESPONSE
G = 10
G = 10
20mV/div
5V/div
G = 100
G = 100
5µs/div
5µs/div
VOLTAGE NOISE 0.1 to 10Hz
INPUT-REFERRED, G = 100
0.1µV/div
1s/div
®
7
INA141
APPLICATION INFORMATION
Gains between 10 and 100 can be achieved by connecting an
external resistor to the jumper pins. This is not recommended, however, because the ±25% variation of internal
resistor values makes the required external resistor value
uncertain. A companion model, INA128, features accurately
trimmed internal resistors so that gains from 1 to 10,000 can
be set with an external resistor.
Figure 1 shows the basic connections required for operation
of the INA141. Applications with noisy or high impedance
power supplies may require decoupling capacitors close to
the device pins as shown.
The output is referred to the output reference (Ref) terminal
which is normally grounded. This must be a low-impedance
connection to assure good common-mode rejection. A resistance of 8Ω in series with the Ref pin will cause a typical
device to degrade to approximately 80dB CMR (G = 1).
DYNAMIC PERFORMANCE
The typical performance curve “Gain vs Frequency” shows
that, despite its low quiescent current, the INA141 achieves
wide bandwidth, even at G = 100. This is due to the currentfeedback topology of the INA141. Settling time also remains excellent at G = 100.
SETTING THE GAIN
Gain is selected with a jumper connection as shown in
Figure 1. G = 10V/V with no jumper installed. With a
jumper installed, G = 100V/V. To preserve good gain
accuracy, this jumper must have low series resistance. A
resistance of 0.5Ω in series with the jumper will decrease the
gain by 0.1%.
NOISE PERFORMANCE
The INA141 provides very low noise in most applications.
Low frequency noise is approximately 0.2µVp-p measured
from 0.1 to 10Hz (G = 100). This provides dramatically
improved noise when compared to state-of-the-art chopperstabilized amplifiers.
Internal resistor ratios are laser trimmed to assure excellent
gain accuracy. Actual resistor values can vary by approximately ±25% from the nominal values shown.
V+
0.1µF
7
–
VIN
2
1
G = 10
(no connection)
or
G = 100
(connect jumper)
INA141
Over-Voltage
Protection
A1
40kΩ
252Ω
40kΩ
25kΩ
A3
5050Ω
8
6
+
–
)
VO = G • (VIN – VIN
+
252Ω
25kΩ
Load VO
–
+
VIN
3
5
A2
Over-Voltage
Protection
40kΩ
4
V–
Also drawn in simplified form:
–
VIN
INA141
+
VIN
VO
Ref
FIGURE 1. Basic Connections.
®
INA141
8
0.1µF
40kΩ
Ref
OFFSET TRIMMING
The INA141 is laser trimmed for low offset voltage and
offset voltage drift. Most applications require no external
offset adjustment. Figure 2 shows an optional circuit for
trimming the output offset voltage. The voltage applied to
Ref terminal is summed with the output. The op amp buffer
provides low impedance at the Ref terminal to preserve good
common-mode rejection.
INA141
47kΩ
47kΩ
Thermocouple
–
VIN
INA141
V+
INA141
V+
Microphone,
Hydrophone
etc.
VO
100µA
1/2 REF200
Ref
10kΩ
IN
OPA177
±10mV
Adjustment Range
10kΩ
100Ω
INA141
100Ω
100µA
1/2 REF200
Center-tap provides
bias current return.
V–
FIGURE 3. Providing an Input Common-Mode Current Path.
FIGURE 2. Optional Trimming of Output Offset Voltage.
Input overload can produce an output voltage that appears
normal. For example, if an input overload condition drives
both input amplifiers to their positive output swing limit, the
difference voltage measured by the output amplifier will be
near zero. The output of the INA141 will be near 0V even
though both inputs are overloaded.
INPUT BIAS CURRENT RETURN PATH
The input impedance of the INA141 is extremely high—
approximately 1010Ω. However, a path must be provided for
the input bias current of both inputs. This input bias current
is approximately ±2nA. High input impedance means that
this input bias current changes very little with varying input
voltage.
LOW VOLTAGE OPERATION
The INA141 can be operated on power supplies as low as
±2.25V. Performance remains excellent with power supplies
ranging from ±2.25V to ±18V. Most parameters vary only
slightly through this supply voltage range—see Typical
Performance Curves. Operation at very low supply voltage
requires careful attention to assure that the input voltages
remain within their linear range. Voltage swing requirements of internal nodes limit the input common-mode range
with low power supply voltage. Typical performance curves,
“Input Common-Mode Range vs Output Voltage” show the
range of linear operation for ±15V, ±5, and ±2.5V supplies.
Input circuitry must provide a path for this input bias current
for proper operation. Figure 3 shows various provisions for
an input bias current path. Without a bias current path, the
inputs will float to a potential which exceeds the commonmode range of the INA141 and the input amplifiers will
saturate.
If the differential source resistance is low, the bias current
return path can be connected to one input (see the thermocouple example in Figure 3). With higher source impedance,
using two equal resistors provides a balanced input with
possible advantages of lower input offset voltage due to bias
current and better high-frequency common-mode rejection.
INPUT PROTECTION
The inputs of the INA141 are individually protected for
voltages up to ±40V. For example, a condition of –40V on
one input and +40V on the other input will not cause
damage. Internal circuitry on each input provides low series
impedance under normal signal conditions. To provide
equivalent protection, series input resistors would contribute
excessive noise. If the input is overloaded, the protection
circuitry limits the input current to a safe value of approximately 1.5 to 5mA. The typical performance curve “Input
Bias Current vs Common-Mode Input Voltage” shows this
input current limit behavior. The inputs are protected even if
the power supplies are disconnected or turned off.
INPUT COMMON-MODE RANGE
The linear input voltage range of the input circuitry of the
INA141 is from approximately 1.4V below the positive
supply voltage to 1.7V above the negative supply. As a
differential input voltage causes the output voltage to increase, however, the linear input range will be limited by the
output voltage swing of amplifiers A1 and A2. So the linear
common-mode input range is related to the output voltage of
the complete amplifier. This behavior also depends on supply voltage—see performance curves “Input Common-Mode
Range vs Output Voltage”.
®
9
INA141
1/4
OPA4131
VO
INA141
1/4
OPA4131
LA
RA
Ref
G = 10
20kΩ
390kΩ
VG
1/4
OPA4131
RL
20kΩ
1/4
OPA4131
10kΩ
390kΩ
FIGURE 4. ECG Amplifier With Right-Leg Drive.
+5V
V+
+15V
10.0V
2.5V – ∆V
REF102
R1
VO
INA141
300Ω
6
2
R2
4
Ref
2.5V + ∆V
Pt100
–15V
Cu
K
Cu
Ref
R3
100Ω = Pt100 at 0°C
–
VIN
+
VO
INA141
Ref
VO
INA141
FIGURE 5. Bridge Amplifier.
C1
0.1µF
OPA602
ISA
TYPE
R1
1MΩ
1
f–3dB =
2πR1C1
= 1.59Hz
FIGURE 6. AC-Coupled Instrumentation Amplifier.
MATERIAL
SEEBECK
COEFFICIENT
(µV/°C)
R1, R2
E
+ Chromel
– Constantan
58.5
66.5kΩ
J
+ Iron
– Constantan
50.2
76.8kΩ
K
+ Chromel
– Alumel
39.4
97.6kΩ
T
+ Copper
– Constantan
38.0
102kΩ
FIGURE 7. Thermocouple Amplifier With RTD ColdJunction Compensation.
–
R1
VIN
IO =
INA141
VIN
•G
R1
+
Ref
IB
IO
A1
A1
IB Error
OPA177
OPA131
OPA602
OPA128
±1.5nA
50pA
±1pA
±75fA
Load
FIGURE 8. Differential Voltage to Current Converter.
®
INA141
10
PACKAGE OPTION ADDENDUM
www.ti.com
16-Apr-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
INA141P
OBSOLETE
PDIP
P
8
TBD
Call TI
Call TI
INA141PA
OBSOLETE
PDIP
P
8
TBD
Call TI
Call TI
INA141U
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA141U/2K5
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA141U/2K5E4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA141UA
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA141UA/2K5
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA141UA/2K5E4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA141UAE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA141UAG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA141UG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
75
75
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
INA141U/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
INA141UA/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA141U/2K5
SOIC
D
8
2500
346.0
346.0
29.0
INA141UA/2K5
SOIC
D
8
2500
346.0
346.0
29.0
Pack Materials-Page 2
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