LTC6420-20 Dual Matched 1.8GHz Differential Amplifiers/ADC Drivers DESCRIPTION FEATURES n n n n n n n n n n n n n n Matched Gain ±0.1dB Matched Phase ±0.1° at 100MHz Channel Separation 80dB at 100MHz 1.8GHz –3dB Bandwidth; Fixed Gain of 10V/V (20dB) IMD3 = –84dBc at 100MHz, 2VP-P Equivalent OIP3 = 46dBm at 100MHz 1nV/√Hz Internal Op Amp Noise 6.2dB Noise Figure Differential Inputs and Outputs Rail-to-Rail Output Swing 80mA Supply Current (240mW) per Amplifier 1.1V to 1.6V Output Common Mode Voltage, Adjustable DC- or AC-Coupled Operation 20-Lead 3mm × 4mm × 0.75mm QFN Package APPLICATIONS n n n n The LTC®6420-20 is a dual high-speed differential amplifier targeted at processing signals from DC to 300MHz. The part has been specifically designed to drive 12-, 14- and 16-bit ADCs with low noise and low distortion, but can also be used as a general-purpose broadband gain block. The LTC6420-20 is easy to use, with minimal support circuitry required. The output common mode voltage is set using an external pin, independent of the inputs, which eliminates the need for transformers or AC-coupling capacitors in many applications. The gain is internally fixed at 20dB (10V/V). The LTC6420-20 saves space and power compared to alternative solutions using IF gain blocks and transformers. The LTC6420-20 is packaged in a compact 20-lead 3mm × 4mm QFN package and operates over the –40°C to 85°C temperature range. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Differential ADC Driver Differential Driver/Receiver Single Ended to Differential Conversion IF Sampling (Diversity) Receivers TYPICAL APPLICATION Matched Dual Amplifier with Output Common Mode Biasing 3V 0.1μF Distribution of Gain Match 40 1000pF 35 VOCM A 0.1μF VIN A V+ A 30 ENABLEA 1000Ω –IN A 100Ω – 12.5Ω +IN A 100Ω + 12.5Ω +OUT A VOCM A 0.1μF LTC6420-20 0.1μF –OUT A 1000Ω V– VIN B VOCM A UNITS (%) ZIN = 200Ω +IN B 100Ω –IN B 100Ω + 15 5 ±0.1dB GAIN MATCHING ±0.1° PHASE MATCHING AT 100MHz 12.5Ω 20 10 VOCM A V– 1000Ω 25 0 – 0.25 – 0.15 – 0.05 0.05 0.15 0.25 CHANNEL-TO-CHANNEL GAIN MATCH (dB) 642020 TA01b – OUT B VOCM B 0.1μF – 12.5Ω +OUT B VOCM B 1000Ω ZIN = 200Ω V+ B 0.1μF 1000pF 3V VOCM B VOCM B ENABLEB 642020 TA01a 642020fa 1 LTC6420-20 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Supply Voltage (V+ – V –) .........................................3.6V Input Current (Note 2)..........................................±10mA Operating Temperature Range (Note 3)...–40°C to 85°C Specified Temperature Range (Note 4) ....–40°C to 85°C Storage Temperature Range...................–65°C to 150°C Maximum Junction Temperature........................... 150°C Output Short Circuit Duration........................... Indefinite +OUTA ENABLEA VOCMA V+ A TOP VIEW 20 19 18 17 +INA 1 16 –OUTA 15 V + A –INA 2 V– 3 V– 4 14 V – 13 V – 21 +INB 6 11 –OUTB 9 10 +OUTB 8 ENABLEB 7 VOCMB 12 V + B V+ B –INB 5 UDC PACKAGE 20-LEAD (3mm s 4mm) PLASTIC QFN TJMAX = 150°C, θJA = 43°C/W, θJC = 5°C/W EXPOSED PAD (PIN 21) IS V –, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL LTC6420CUDC-20#PBF LTC6420IUDC-20#PBF PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6420CUDC-20#TRPBF LDDM 20-Lead (3mm × 4mm) Plastic QFN 0°C to 70°C LTC6420IUDC-20#TRPBF 20-Lead (3mm × 4mm) Plastic QFN –40°C to 85°C LDDM Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ SELECTOR GUIDE PART NUMBER GAIN (dB) GAIN (V/V) ZIN (DIFFERENTIAL) (Ω) COMMENT LTC6400-8 8 2.5 400 Lowest Distortion LTC6400-14 14 5 200 Lowest Distortion 20 10 200 Lowest Distortion 26 20 50 Lowest Distortion LTC6401-8 8 2.5 400 Lowest Power LTC6401-14 14 5 200 Lowest Power 20 10 200 Lowest Power 26 20 50 Lowest Power SINGLE LTC6400-20 DUAL LTC6420-20 LTC6400-26 LTC6401-20 LTC6401-26 LTC6421-20 642020fa 2 LTC6420-20 DC ELECTRICAL CHARACTERISTICS + The l denotes the specifications which apply over the full operating – temperature range, otherwise specifications are at TA = 25°C. V = 3V, V = 0V, +IN = –IN = VOCM = 1.25V, ENABLE = 0V, No RL unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input/Output Characteristic GDIFF Gain VIN = ±100mV Differential l 20 20.4 dB ΔG Gain Matching Channel-to-Channel l ±0.1 ±0.25 dB TCGAIN Gain Temperature Drift VIN = ±100mV Differential l 0.0015 VSWINGMIN Output Swing Low (VOCM = 1.5V) Each Output, VIN = ±400mV Differential l 0.2 Each Output, VIN = ±400mV Differential l 2.65 2.8 V l 4.6 5.2 VP-P 19.6 VSWINGMAX Output Swing High (VOCM = 1.5V) VOUTDIFFMAX Maximum Differential Output Swing IOUT Output Current Drive 2VP-P, OUT (Note 10) l 20 VOS Input Offset Voltage Differential l –2 Differential l TCVOS Input Offset Voltage Drift IVRMIN Input Common Mode Voltage Range, MIN l IVRMAX Input Common Mode Voltage Range, MAX l 1.6 RINDIFF Input Resistance (+IN, –IN) Differential l 170 l dB/°C 0.35 V mA ±0.4 2 1.2 mV μV/°C 1 V V 200 230 ±0.5 ±2.5 Ω ΔRIN Input Impedance Matching Channel-to-Channel CINDIFF Input Capacitance (+IN, –IN) Differential, Includes Parasitic ROUTDIFF Output Resistance (+OUT, – OUT) Differential l 20 25 CMRR Common Mode Rejection Ratio Input Common Mode Voltage 1V to 1.6V l 45 68 dB 1 V/V 1 % pF 36 Ω Output Common Mode Voltage Control GCM Common Mode Gain VOCM = 1.1V to 1.6V VOCMMIN Output Common Mode Range, MIN l VOCMMAX Output Common Mode Range, MAX l 1.6 VOSCM Common Mode Offset Voltage l –10 TCVOSCM Common Mode Offset Voltage Drift l IVOCM VOCM Input Current l VOCM = 1.25V to 1.5V 1.1 V ±2 10 16 –15 V –3 mV μV/°C 0 μA 0.8 V ENABLEx Pins (x = A, B) VIL ENABLEx Input Low Voltage l VIH ENABLEx Input High Voltage l ENABLEx Input Current ENABLEx ≤ 0.8V ENABLEx ≥ 2.4V 2.4 l l V 1.5 ±0.5 4 μA μA 3 3.5 V Power Supply VS Operating Supply Range l 2.85 IS Supply Current ENABLEx ≤ 0.8V; per Amplifier l 80 95 mA ISHDN Shutdown Supply Current ENABLEx ≥ 2.4V; per Amplifier. Inputs Floating l 1 3 mA PSRR Power Supply Rejection Ratio (Differential Outputs) V + = 2.85V to 3.5V l 55 86 dB 642020fa 3 LTC6420-20 AC ELECTRICAL CHARACTERISTICS+ The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V = 3V, V– = 0V, VOCM = 1.25V, ENABLE = 0V, No RL unless otherwise noted. SYMBOL PARAMETER CONDITIONS ΔG Gain Matching f = 100MHz (Note 9) ΔP Phase Matching f = 100MHz MIN l TYP MAX UNITS ±0.1 ±0.25 dB ±0.1 deg Channel Separation (Note 8) f = 100MHz 80 dB –3dBBW –3dB Bandwidth 200mVP-P, OUT (Note 6) 1.8 GHz 0.5dBBW Bandwidth for 0.5dB Flatness 200mVP-P, OUT (Note 6) 0.7 GHz 0.1dBBW Bandwidth for 0.1dB Flatness 200mVP-P, OUT (Note 6) 0.3 GHz NF Noise Figure RL = 375Ω (Note 5), f = 100MHz 6.2 dB eIN Input Referred Voltage Noise Density Includes Resistors (Short Inputs), f = 100MHz 2.2 nV/√Hz eON Output Referred Voltage Noise Density Includes Resistors (Short Inputs), f = 100MHz 22 nV/√Hz 1/f 1/f Noise Corner 10 kHz V/μs SR Slew Rate Differential (Note 6) 4500 tS1% 1% Settling Time 2VP-P, OUT (Note 6) 0.8 ns tOVDR Overdrive Recovery Time 1.9VP-P, OUT (Note 6): Single Ended 4 ns P1dB 1dB Compression Point RL = 375Ω (Notes 5, 7), f = 100MHz 18 dBm tON Turn-On Time +OUT, –OUT Within 10% of Final Values 82 ns tOFF Turn-Off Time ICC Falls to 10% of Nominal 190 ns –3dBBWVOCM VOCM Pin Small Signal –3dB BW 0.1VP-P at VOCM , Measured Single-Ended at Output (Note 6) 15 MHz IMD3 3rd Order Intermodulation Distortion f = 100MHz (1MHz Spacing) VOUT = 2VP-P Composite –84 dBc OIP3 3rd Order Output Intercept f = 100MHz (Note 7) 46 dBm IIP3 3rd Order Input Intercept f = 100MHz (ZIN = 50Ω) f = 100MHz (ZIN = 200Ω) 26 20 dBm dBm HD2 2nd Order Harmonic Distortion f = 100MHz; VOUT = 2VP-P –80 dBc HD3 3rd Order Harmonic Distortion f = 100MHz; VOUT = 2VP-P –88 dBc Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Input pins (+IN, –IN) are protected by steering diodes to either supply. If the inputs go beyond either supply rail, the input current should be limited to less than 10mA. Note 3: The LTC6420C and LTC6420I are guaranteed functional over the operating temperature range of –40°C to 85°C. Note 4: The LTC6420C is guaranteed to meet specified performance from 0°C to 70°C. It is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. The LTC6420I is guaranteed to meet specified performance from –40°C to 85°C. Note 5: Input and output baluns used. See Test Circuit A. Note 6: Measured using Test Circuit B. RL = 87.5Ω on each output. Note 7: Since the LTC6420-20 is a feedback amplifier with low output impedance, a resistive load is not required when driving an AD converter. Therefore, typical output power is very small. In order to compare the LTC6420-20 with amplifiers that require 50Ω output load, the output voltage swing driving a given RL is converted to OIP3 and P1dB as if it were driving a 50Ω load. Using this modified convention, 2VP-P is by definition equal to 10dBm, regardless of actual RL. Note 8: Channel separation (the inverse of crosstalk) is measured by driving a signal into one input, while terminating the other input. Channel separation is the ratio of the resulting output signal at the driven channel to the channel that is not driven. Note 9: Not production tested. Guaranteed by design and by correlation to production tested parameters. Note 10: The output swing range is at least 2VP-P differential even when sourcing or sinking 20mA. Tested at VOCM = 1.5V. 642020fa 4 LTC6420-20 TYPICAL PERFORMANCE CHARACTERISTICS Channel to Channel Group Delay Match vs Frequency Channel to Channel Phase Match vs Frequency 0.5 0.4 0.4 0.4 0.3 0.3 0.3 0.2 0.1 0.0 –0.1 –0.2 PHASE MATCH (deg) 0.5 GROUP DELAY MATCH (nsec) 0.5 0.2 0.1 0.0 –0.1 –0.2 0.2 0.1 0.0 –0.1 –0.2 –0.3 –0.3 –0.4 –0.4 –0.4 –0.5 –0.5 –0.3 100 FREQUENCY (MHz) 1000 2000 –0.5 10 100 FREQUENCY (MHz) 10 100 FREQUENCY (MHz) 1000 642020 G03 S21 Phase and Group Delay vs Frequency Frequency Response 25 1000 2000 642020 G02 642020 G01 0 TEST CIRCUIT B TEST CIRCUIT B 1.2 15 10 5 0 –100 0.9 –200 0.6 –300 0.3 –400 10 100 1000 FREQUENCY (MHz) 3000 PHASE GROUP DELAY 0 200 400 600 FREQUENCY (MHz) 800 Input and Output Impedance vs Frequency Input and Output Reflection and Reverse Isolation vs Frequency 250 TEST CIRCUIT B 50 S11 –30 S22 –40 –50 –60 S12 ZIN 200 30 ZOUT 150 10 ZIN 100 –10 PHASE IMPEDANCE MAGNITUDE 50 PHASE (DEGREES) IMPEDANCE MAGNITUDE (Ω) –10 –20 0 1000 642020 G05 642020 G04 0 GROUP DELAY (ns) PHASE (DEGREE) 20 GAIN (dB) 10 S PARAMETERS (dB) GAIN MATCH (dB) Channel to Channel Gain Match vs Frequency –30 –70 ZOUT 0 –80 10 100 1000 FREQUENCY (MHz) 3000 642020 G06 1 10 100 FREQUENCY (MHz) –50 1000 642020 G07 642020fa 5 LTC6420-20 TYPICAL PERFORMANCE CHARACTERISTICS NOISE FIGURE 2 eIN 1.35 RL = 87.5Ω PER OUTPUT +OUT 1.25 1.15 –OUT 2 0 4 6 TIME (ns) 8 –60 –70 –80 HD2 NO RL HD2 200Ω RL HD3 NO RL HD3 200Ω RL 50 50 0 100 TIME (ns) 150 200 642020 G10 100 150 200 FREQUENCY (MHz) 250 –60 –70 –80 –90 –100 300 –110 DIFFERENTIAL INPUT VOUT = 2VP-P COMPOSITE 0 50 100 150 200 FREQUENCY (MHz) 250 300 642020 G12 Channel Separation vs Frequency (Note 8) Equivalent Output Third Order Intercept vs Frequency 60 120 50 100 CHANNEL SEPARATION (dB) OUTPUT IP3 (dBm) 0 DRIVING LTC2285 642020 G11 40 DIFFERENTIAL INPUT 30 VOUT = 2VP-P COMPOSITE (NOTE 7) 20 10 0 10 –OUT –50 THIRD ORDER IMD (dBc) HARMONIC DISTORTION (dBc) –40 DIFFERENTIAL INPUT VOUT = 2VP-P 0 1.0 Third Order Intermodulation Distortion vs Frequency –50 –100 1.5 642020 G09 Harmonic Distortion vs Frequency –90 +OUT 0.5 642020 G08 –40 RL = 87.5Ω PER OUTPUT 2.0 1.30 1.20 0 1000 100 FREQUENCY (MHz) 2.5 OUTPUT VOLTAGE (V) 4 10 Overdrive Transient Response Small Signal Transient Response 6 OUTPUT VOLTAGE (V) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 INPUT REFERRED NOISE VOLTAGE (nV/√Hz) NOISE FIGURE (dB) Noise Figure and Input Referred Noise Voltage vs Frequency 80 60 40 20 DRIVING LTC2285 0 50 100 150 200 FREQUENCY (MHz) 250 300 642020 G13 0 1 10 100 FREQUENCY (MHz) 1000 642020 G14 642020fa 6 LTC6420-20 PIN FUNCTIONS +INA, –INA, –INB, +INB (Pins 1, 2, 5, 6): Differential Inputs of A and B channel respectively. V – (Pins 3, 4, 13, 14, 21): Negative Power Supply. All four pins, as well as the exposed back, must be connected to same voltage/ground. ENABLEA, ENABLEB (Pins 9, 18): Logic inputs. If low, the amplifier is enabled. If high, the amplifier is disabled and placed in a low power shutdown mode, making the amplifier outputs high impedance. These pins are internally separate. These pins should not be left floating. V+ A , V+ B (Pins 15, 20, 7, 12 ): Positive Power Supply (Normally tied to 3V or 3.3V). Supply pins of A and B channels are internally separate. Bypass each pin with 1000pF and 0.1μF capacitors as close to the pins as possible. –OUTA, +OUTA, –OUTB, +OUTB (Pins 16, 17, 11, 10): Differential Outputs of channels A and B respectively. VOCMA, VOCMB (Pins 19, 8): These pins set the output common mode voltage for the respective channel. They are internally separate. A 0.1μF external bypass capacitor is recommended. Exposed Pad (Pin 21): V –. The Exposed Pad must be connected to same voltage/ground as pins 3, 4, 13, 14. BLOCK DIAGRAM V+ A VOCMA ENABLEA +OUTA 20 19 18 17 RG 100Ω +INA 1 RG 100Ω –INA 2 RG 100Ω –INB 5 +INB 6 ROUT 12.5Ω ++ –– ++ 16 –OUTA ROUT 12.5Ω –– 15 V + A RF 1000Ω V– 3 V– 4 RF 1000Ω RG 100Ω 14 V – 13 V – RF 1000Ω ROUT 12.5Ω + – + 12 V B ROUT 12.5Ω – + 11 –OUTB RF 1000Ω 7 8 9 10 V+ B VOCMB ENABLEB +OUTB 640020 BD 642020fa 7 LTC6420-20 APPLICATIONS INFORMATION Circuit Operation Input Impedance and Matching Each of the two channels of the LTC6420-20 is composed of a fully differential amplifier with on chip feedback and output common mode voltage control circuitry. Differential gain and input impedance are set by 100Ω/1000Ω resistors in the feedback network. Small output resistors of 12.5Ω improve the circuit stability over various load conditions. The differential input impedance of the LTC6420-20 is 200Ω. If a 200Ω source impedance is unavailable, then the differential inputs may need to be terminated to a lower value impedance, e.g. 50Ω, in order to provide an impedance match for the source. Several choices are available. One approach is to use a differential shunt resistor (Figure 1). Another approach is to employ a wide band transformer (Figure 2). Both methods provide a wide band impedance match. The termination resistor or the transformer must be placed close to the input pins in order to minimize the reflection due to input mismatch. Alternatively, one could apply a narrowband impedance match at the inputs of the LTC6420-20 for frequency selection and/or noise reduction. The LTC6420-20 is very flexible in terms of I/O coupling. It can be AC- or DC-coupled at the inputs, the outputs or both. If the inputs are AC-coupled, the input common mode voltage is automatically biased close to VOCM and thus no external circuitry is needed for bias. The LTC6420-20 provides an output common mode voltage set by VOCM , which allows driving an ADC directly without external components such as a transformer or AC coupling capacitors. The input signal can be either single-ended or differential with only minor differences in distortion performance. 1/2 LTC6420-20 100Ω 25Ω Referring to Figure 3, LTC6420-20 can be easily configured for single-ended input and differential output without a balun. The signal is fed to one of the inputs through a 1000Ω 1/2 LTC6420-20 100Ω 25Ω +IN +IN IN + + – 1:4 OUT – VIN + – 66.5Ω IN – 25Ω 1000Ω 100Ω VIN • • OUT + 1000Ω 25Ω –IN 100Ω IN + OUT – IN – OUT + 1000Ω –IN 640020 F01 640020 F02 Figure 2. Input Termination for Differential 50Ω Input Impedance Using a 1:4 Balun Figure 1. Input Termination for Differential 50Ω Input Impedance Using Shunt Resistor RS 50Ω + – 0.1μF 1/2 LTC6420-20 100Ω +IN VIN RT 66.5Ω RS//RT 28.7Ω 1000Ω 0.1μF 100Ω IN + OUT – IN – OUT + 1000Ω – IN 642020 F03 Figure 3. Input Termination for Single-Ended 50Ω Input Impedance 642020fa 8 LTC6420-20 APPLICATIONS INFORMATION matching network while the other input is connected to the same matching network and a source resistor. Because the return ratios of the two feedback paths are equal, the two outputs have the same gain and thus symmetrical swing. In general, the single-ended input impedance and termination resistor R T are determined by the combination of RS , RG and RF . For example, when RS is 50Ω, it is found that the single-ended input impedance is 202Ω and R T is 66.5Ω in order to match to a 50Ω source impedance. The LTC6420-20 is unconditionally stable. However, the overall differential gain is affected by both source impedance and load impedance as follows: AV = VOUT RL 2000 = • VIN RS + 200 25 + RL Driving A/D Converters The LTC6420-20 has been specifically designed to interface directly with high speed A/D converters. The back page of this data sheet shows the LTC6420-20 driving an LTC2285, which is a dual 14-bit, 125Msps ADC. The VOCM pins of the LTC6420-20 are connected to the VCM pins of the LTC2285, which provide a DC voltage level of 1.5V. Both ICs are powered from the same 3V supply voltage. The inputs to the LTC6420-20 can be configured in various ways, as described in the Input Impedance and Matching section of this data sheet. The outputs of the LTC6420-20 may be connected directly to the analog inputs of an ADC, or a simple lowpass or bandpass filter network may be inserted to reduce out-of-band noise. Output Impedance Match Test Circuits The LTC6420-20 can drive an ADC directly without external output impedance matching. Alternatively, the differential output impedance of 25Ω can be matched to a higher value impedance, e.g. 50Ω, by series resistors or an LC network. Due to the fully-differential design of the LTC6420 and its usefulness in applications with differing characteristic specifications, two test circuits are used to generate the information in this data sheet. Test Circuit A is DC1299, a two-port demonstration circuit for the LTC6420/LTC6421 family. The schematic and silkscreen are shown in Figure 4. This circuit includes input and output transformers (baluns) for single-ended-to-differential conversion and impedance transformation, allowing direct hook-up to a 2-port network analyzer. There are also series resistors at the output to avoid loading the amplifier directly with a 50Ω load. Due to the input and output transformers, the –3dB bandwidth is reduced from 1.8GHz to approximately 1.3GHz. Output Common Mode Adjustment The output common mode voltage is set by the VOCM pin, which is a high impedance input. The output common mode voltage is capable of tracking VOCM in a range from 1.1V to 1.6V. The bandwidth of VOCM control is typically 15MHz, which is dominated by a low pass filter connected to the VOCM pin and is aimed to reduce common mode noise generation at the outputs. The internal common mode feedback loop has a –3dB bandwidth of 300MHz, allowing fast rejection of any common mode output voltage disturbance. The VOCM pin should be tied to a DC bias voltage with a 0.1μF bypass capacitor. When interfacing with A/D converters such as the LTC22xx families, the VOCM pin can be connected to the VCM pin of the ADC. Test Circuit B uses a 4-port network analyzer to measure S-parameters and gain/phase response. This removes the effects of the wideband baluns and associated circuitry, for a true picture of the >1GHz S-parameters and AC characteristics. 642020fa 9 LTC6420-20 APPLICATIONS INFORMATION Figure 4a. Top Silkscreen of DC1299, Test Circuit A V+ R1 1.21k 1% TD4 VOCMA TD5 GND J1 +INA C22 0.1μF 1 2 C18 0.1μF C21 [1] T1 5 1 J2 –INA 1 • • 4 3 [2] C22 0.1μF 2 C19 0.1μF R5 C25 [2] 0.1μF 2 C22 [1] 20 V+A R7 OPT R9 [2] 1 2 3 J5 –INB C31 [1] 1 4 C30 0.1μF 2 T3 5 5 1 R10 C34 [2] 0.1μF 2 J7 +INB C30 0.1μF 1 2 • • 4 [2] C22 [1] V+ C14 4.7μF C15 1μF 6 R11 OPT R12 [2] R18 1k 1% C18 0.1μF 19 18 17 VOCMA ENB +OUTA +INA –OUTA V– LTC6420-20 V– +INB V– V+B 7 C19 0.1μF V– 14 V– 13 –OUTB +OUTA 4 2 TCM4-19+ C43 0.1μF C35 1000pF 1 C34 [1] 5 1 V+ J4 1 2 1 C35 [1] J6 2 –OUTA C28 0.1μF 2 C39 0.1μF 11 C32 0.1μF 3 T4 –OUTB 4 R12 R14 2 88.7 [1] C40 1 5 10 0.1μF J8 TCM4-19+ + ENB R15 V R17 1 2 +OUTB JP2 C44 88.7 1.5k C41 0.1μF 1% 1 [1] DIS 2 3 EN NOTES: UNLESS OTHERWISE SPECIFIED [1] DO NOT STUFF [2] VERSION C42 U1 R5, R9, R10, R13 T1, T3 0.1μF –C LTC6420CUDC-20 NONE TCM4-19+ –G LTC6421CUDC-20 NONE TCM4-19+ VOCMB 8 T2 3 R5 R5 88.7 [1] C32 1000pF C30 0.1μF J3 1 2 C17 [1] R4 88.7 16 12 V+B –INB 21 U1 [2] 15 V+A –INA V+ V+ R16 1.21k 1% TD1 VOCMB TD2 V+ 2.85V TO 3.5V 3 + ENA C16 V JP1 0.1μF 1 DIS 2 3 EN R3 1.5k 1% V+ R2 1k 1% ENA +OUTB 9 642020 F04b TD3 GND Figure 4b. Demo Circuit 1299 Schematic (Test Circuit A) 642020fa 10 LTC6420-20 TYPICAL APPLICATIONS Test Circuit B, 4-Port Measurements (Only the Signal-Path Connections Are Shown) Parallel ADC Drivers to Reduce Wideband Noise 3.3V 3.3V C1 0.1μF PORT 1 (50Ω) 1/2 AGILENT E5071C +INA 200Ω –INA 0.1μF RG 100Ω RG 100Ω RF 1000Ω ++ – ++ –– ROUT 12.5Ω +OUTA 37.4Ω ROUT 12.5Ω –OUTA 37.4Ω RF 1000Ω PORT 2 (50Ω) 0.1μF 0.1μF PORT 3 (50Ω) 1/2 AGILENT E5071C PORT 4 (50Ω) 1/2 LTC6420-20 + – C4 0.1μF R5 49.9Ω 0.1μF VIN R6 49.9Ω R3 C2 12pF 10Ω C5 R4 12pF 10Ω R7 49.9Ω 1/2 LTC6420-20 642020 TA02 (B CHANNEL NOT SHOWN) LTC2208 VCM C3 12pF R8 49.9Ω VOCM –3dB FILTER BANDWIDTH = 120MHz 642020 TA03 C6 2.2μF PACKAGE DESCRIPTION UDC Package 20-Lead Plastic QFN (3mm × 4mm) (Reference LTC DWG # 05-08-1742 Rev Ø) 0.75 ± 0.05 0.70 ±0.05 3.50 ± 0.05 2.10 ± 0.05 1.50 REF 3.00 ± 0.10 1.50 REF 19 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.25 × 45° CHAMFER 20 0.40 ± 0.10 2.65 ± 0.05 1 PIN 1 TOP MARK (NOTE 6) 1.65 ± 0.05 2 2.65 ± 0.10 4.00 ± 0.10 PACKAGE OUTLINE 2.50 REF 1.65 ± 0.10 0.25 ±0.05 0.50 BSC 2.50 REF (UDC20) QFN 1106 REV Ø 3.10 ± 0.05 4.50 ± 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.200 REF 0.00 – 0.05 R = 0.115 TYP 0.25 ± 0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 642020fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC6420-20 TYPICAL APPLICATION Dual ADC Driver for Wideband Direct-Conversion Receivers 3V 3V C1 0.1μF C4 0.1μF R1 40.2Ω + – 1/2 VIN LTC6420-20 R2 40.2Ω R3 10Ω C2 12pF R4 10Ω C3 12pF 1/2 LTC2285 VCM –3dB FILTER BANDWIDTH = 140MHz 642020 TA04 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS High-Speed Differential Amplifiers/Differential Op Amps LT®1993-2 800MHz Differential Amplifier/ADC Driver A V = 2V/V, OIP3 = 38dBm at 70MHz LT1993-4 900MHz Differential Amplifier/ADC Driver A V = 4V/V, OIP3 = 40dBm at 70MHz LT1993-10 700MHz Differential Amplifier/ADC Driver A V = 10V/V, OIP3 = 40dBm at 70MHz LT1994 Low Noise, Low Distortion Differential Op Amp 16-Bit SNR and SFDR at 1MHz, Rail-to-Rail Outputs LT5514 Ultralow Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain OIP3 = 47dBm at 100MHz, Gain Control Range 10.5dB to 33dB LT5524 Low Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain OIP3 = 40dBm at 100MHz, Gain Control Range 4.5dB to 37dB LT6402-6 300MHz Differential Amplifier/ADC Driver A V = 6dB, Distortion < –80dBc at 25MHz LT6402-12 300MHz Differential Amplifier/ADC Driver A V = 12dB, Distortion < –80dBc at 25MHz LT6402-20 300MHz Differential Amplifier/ADC Driver A V = 20dB, Distortion < –80dBc at 25MHz LT6411 Low Power Differential ADC Driver/Dual Selectable Gain Amplifier 16mA Supply Current, IMD3 = –83dBc at 70MHz, A V = 1, –1 or 2 LTC6400-20, LTC6400-26 Low Noise, Low Distortion, Differential ADC Drivers A V = 20dB, 26dB; Single Amplifier per IC, High Performance LTC6401-8, LTC6401-14 LTC6401-20, LTC6401-26 Low Noise, Low Distortion, Differential ADC Drivers A V = 8dB, 14dB, 20dB, 26dB; Single Amplifier per IC, Low Power LTC6404-1 Low Noise Rail-to-Rail Output Differential Amplifier/ADC Driver 1.5nV/√Hz, –92dB Distortion at 10MHz LTC6406 3GHz Rail-to-Rail Input Differential Op Amp 1.6nV/√Hz Noise, –72dBc Distortion at 50MHz, 18mA 642020fa 12 Linear Technology Corporation LT 1008 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2008