ON NTHD3102CT1G Power mosfet complementary, 20 v, 5.5 a /â 4.2 a, chipfet Datasheet

NTHD3102C
Power MOSFET
Complementary, 20 V, +5.5 A /−4.2 A,
ChipFETt
Features
•
•
•
•
•
•
Complementary N−Channel and P−Channel MOSFET
Small Size, 40% Smaller than TSOP−6 Package
Leadless SMD Package Provides Great Thermal Characteristics
Leading Edge Trench Technology for Low On Resistance
Reduced Gate Charge to Improve Switching Response
This is a Pb−Free Device
http://onsemi.com
V(BR)DSS
29 mW @ 4.5 V
N−Channel
20 V
5.5 A
37 mW @ 2.5 V
48 mW @ 1.8 V
Applications
•
•
•
•
ID MAX
(Note 1)
RDS(on) TYP
64 mW @ 4.5 V
DC−DC Conversion Circuits
Load/Power Switching
Single or Dual Cell Li−Ion Battery Supplied Devices
Ideal for Power Management Applications in Portable, Battery
Powered Products
P−Channel
−20 V
−4.2 A
83 mW @ 2.5 V
105 mW @ 1.8 V
S2
D1
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Drain−to−Source Voltage
Gate−to−Source Voltage
N−Ch
Value
Unit
VDSS
20
V
VGS
"8.0
V
"8.0
P−Ch
N−Channel
Continuous Drain
Current (Note 1)
P−Channel
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
ID
TA = 85°C
2.9
t≤5s
TA = 25°C
5.5
Steady
State
TA = 25°C
TA = 85°C
2.2
t≤5s
TA = 25°C
4.2
Steady
State
TA = 25°C
ID
PD
Gate−to−Source ESD Rating −
(Human Body Model, Method 3015)
N−Channel MOSFET
P−Channel MOSFET
A
4.0
ChipFET
CASE 1206A
STYLE 2
A
3.1
MARKING
DIAGRAM
PIN CONNECTIONS
W
1.1
2.1
ESD
D2
S1
100
V
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 in sq pad size
(Cu. area = 1.127 in sq [1 oz] including traces).
D1
8
1
S1
1
8
D1
7
2
G1
2
7
D2
6
3
S2
3
D2
5
4
G2
4
(Bottom View)
D6 M
G
t≤5s
G2
G1
6
5
(Top View)
D6 = Specific Device Code
M = Date Code
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
September, 2006 − Rev. 2
1
Publication Order Number:
NTHD3102C/D
NTHD3102C
MAXIMUM RATINGS (continued) (TJ = 25°C unless otherwise noted)
Parameter
N−Channel
Continuous Drain Current (Note 3)
Steady
State
TA = 25°C
P−Channel
Continuous Drain Current (Note 3)
Steady
State
TA = 25°C
Power Dissipation (Note 3)
Pulsed Drain Current
N−Ch
Symbol
Value
Unit
ID
3.0
A
TA = 85°C
2.2
ID
A
2.3
TA = 85°C
1.7
TA = 25°C
PD
tp = 10 ms
IDM
P−Ch
0.6
W
16
A
12.6
TJ, TSTG
−55 to 150
°C
Source Current (Body Diode)
IS
1.7
A
Lead Temperature for Soldering Purposes (1/8″ from case for 10 seconds)
TL
260
°C
Symbol
Max
Unit
RqJA
110
°C/W
Operating Junction and Storage Temperature
THERMAL RESISTANCE RATINGS
Parameter
Junction−to−Ambient − Steady State (Note 2)
Junction−to−Ambient − t ≤ 5 s (Note 2)
60
Junction−to−Ambient − Steady State (Note 3)
195
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
N/P
Drain−to−Source Breakdown Voltage
(Note 4)
V(BR)DSS
N
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
VGS = 0 V
P
IDSS
IGSS
ID = 250 mA
20
ID = −250 mA
−20
V
N
20.2
P
16.2
N
VGS = 0 V, VDS = 16 V
P
VGS = 0 V, VDS = −16 V
N
VGS = 0 V, VDS = 16 V
P
VGS = 0 V, VDS = −16 V
TJ = 25 °C
TJ = 85 °C
mV/°C
1.0
mA
−1.0
5.0
−5.0
N
VDS = 0 V, VGS = ±8.0 V
±100
P
VDS = 0 V, VGS = ±8.0 V
±100
nA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces).
3. Surface−mounted on FR4 board using the minimum recommended pad size (Cu area = TBD in sq).
4. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
2
NTHD3102C
ELECTRICAL CHARACTERISTICS (continued) (TJ = 25°C unless otherwise noted)
Parameter
Symbol
N/P
VGS(TH)
N
Test Conditions
Min
Typ
Max
Unit
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
VGS = VDS
P
Drain−to−Source On Resistance
RDS(on)
Forward Transconductance
gFS
ID = 250 mA
0.4
1.2
ID = −250 mA
−0.4
−1.2
N
VGS = 4.5 V , ID = 4.4 A
29
45
P
VGS = −4.5 V , ID = −3.2 A
64
80
N
VGS = 2.5 V , ID = 4.1 A
37
50
P
VGS = −2.5 V, ID = −2.5 A
83
110
N
VGS = 1.8 V , ID = 1.9 A
48
70
P
VGS = −1.8 V, ID = −0.6 A
105
150
N
VDS = 10 V, ID = 4.4 A
7.7
P
VDS = −10 V , ID = −3.2 A
5.9
mW
S
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
CISS
N
VDS = 10 V
510
P
VDS = −10 V
650
Output Capacitance
COSS
N
VDS = 10 V
100
VDS = −10 V
100
N
VDS = 10 V
50
P
VDS = −10 V
50
P
Reverse Transfer Capacitance
CRSS
f = 1.0 MHz, VGS = 0 V
Total Gate Charge
QG(TOT)
N
VGS = 4.5 V, VDS = 10 V, ID = 4.4 A
P
Threshold Gate Charge
QG(TH)
N
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
pF
5.8
7.9
VGS = −4.5 V, VDS = −10 V, ID = −3.2 A
6.6
8.9
VGS = 4.5 V, VDS = 10 V, ID = 4.4 A
0.96
P
VGS = −4.5 V, VDS = −10 V, ID = −3.2 A
0.98
N
VGS = 4.5 V, VDS = 10 V, ID = 4.4 A
1.2
P
VGS = −4.5 V, VDS = −10 V, ID = −3.2 A
1.4
N
VGS = 4.5 V, VDS = 10 V, ID = 4.4 A
1.56
P
VGS = −4.5 V, VDS = −10 V, ID = −3.2 A
1.64
nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
7.2
N
VGS = 4.5 V, VDD = 10 V,
ID = 4.4 A, RG = 2.5 W
td(OFF)
15.9
15.7
tf
4.6
td(ON)
6.4
tr
td(OFF)
VGS = −4.5 V, VDD = −10 V,
ID = −3.2 A, RG = 2.5 W
P
tf
16.9
16.4
15.0
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
3
ns
NTHD3102C
ELECTRICAL CHARACTERISTICS (continued) (TJ = 25°C unless otherwise noted)
Parameter
Symbol
N/P
Test Conditions
Min
Typ
Max
Unit
IS = 1.7 A
0.68
1.2
V
IS = −1.7 A
−0.7
−1.2
N
IS = 1.7 A
13.5
P
IS = −1.7 A
12.6
IS = 1.7 A
8.6
IS = −1.7 A
8.4
IS = 1.7 A
4.9
P
IS = −1.7 A
4.2
N
IS = 1.7 A
7.0
P
IS = −1.7 A
6.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
N
P
Reverse Recovery Time
tRR
Charge Time
ta
N
Discharge Time
tb
N
P
Reverse Recovery Charge
QRR
VGS = 0 V, TJ = 25 °C
VGS = 0 V,
dIS / dt = 100 A/ms
http://onsemi.com
4
ns
nC
NTHD3102C
TYPICAL N−CHANNEL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
8
8
TJ = 25°C
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
1.6 V
VGS = 8 V to 1.8 V
6
1.4 V
4
1.2 V
2
6
4
25°C
2
1.0 V
125°C
0
0
0
1
2
3
4
5
6
7
8
9
10
0
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.8
0.4
1.2
1.6
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.08
VGS = 4.5 V
0.06
TJ = 125°C
0.04
TJ = 25°C
TJ = −55°C
0.02
2
4
6
8
ID, DRAIN CURRENT (AMPS)
10
0.08
VGS = 2.5 V
TJ = 125°C
0.06
TJ = 25°C
0.04
TJ = −55°C
0.02
0
Figure 3. On−Resistance vs. Drain Current
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
2.0
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 1. On−Region Characteristics
0
TJ = −55°C
2
4
6
8
ID, DRAIN CURRENT (AMPS)
10
Figure 4. On−Resistance vs. Drain Current and
Temperature
0.044
1.6
VGS = 2.5 V
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = 25°C
0.036
VGS = 4.5 V
0.028
0.02
0
2
4
8
6
ID, DRAIN CURRENT (AMPS)
ID = 4 A
VGS = 4.5 V
1.4
1.2
1.0
0.8
0.6
−50
10
Figure 5. On−Resistance vs. Drain Current
−25
75
0
25
50
100
125
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. On−Resistance Variation with
Temperature
http://onsemi.com
5
150
NTHD3102C
TYPICAL N−CHANNEL PERFORMANCE CURVES
5
10
IS, SOURCE CURRENT (AMPS)
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
(TJ = 25°C unless otherwise noted)
4
3
2
1
ID = 4.4 A
TJ = 25°C
0
0
2
4
6
1
TJ = 125°C
TJ = 25°C
0.1
0.01
8
0
0.2
Qg, TOTAL GATE CHARGE (nC)
0.4
0.8
0.6
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 7. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 8. Diode Forward Voltage vs. Current
100
0.2
ID = 250 mA
0.1
t, TIME (ns)
0
−0.1
tr
td(off)
tf
td(on)
10
−0.2
VDS = 10 V
ID = 4.4 A
VGS = 4.5 V
−0.3
−0.4
−50
1
−25
0
25
75
50
100
125
150
1
10
100
TJ, JUNCTION TEMPERATURE (°C)
RG, GATE RESISTANCE (OHMS)
Figure 9. Threshold Voltage
Figure 10. Resistive Switching Time Variation
vs. Gate Resistance
1000
TJ = 25°C
VGS = 0 V
C, CAPACITANCE (pF)
VGS(th), THRESHOLD VARIANCE (V)
VGS = 0 V
TJ = 25°C
800
CISS
600
400
COSS
200
CRSS
0
0
5
10
15
20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Capacitance Variation
http://onsemi.com
6
NTHD3102C
TYPICAL P−CHANNEL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
8
TJ = 25°C
VGS = −8 V to −4 V
−2 V
−1.8 V
−ID, DRAIN CURRENT (AMPS)
−ID, DRAIN CURRENT (AMPS)
8
6
−1.6 V
4
−1.4 V
2
−1.2 V
6
4
2
25°C
−1.0 V
125°C
0
0
0
1
2
3
4
5
6
7
8
9
10
0.8
2.8
0.4
1.2
1.6
2.0
2.4
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 13. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 12. On−Region Characteristics
0.1
VGS = −4.5 V
TJ = 125°C
0.09
0.08
0.07
TJ = 25°C
0.06
TJ = −55°C
0.05
0.04
0
2
8
4
6
−ID, DRAIN CURRENT (AMPS)
10
0.16
VGS = −2.5 V
0.14
TJ = 125°C
0.12
0.10
TJ = 25°C
0.08
TJ = −55°C
0.06
0.04
0
Figure 14. On−Resistance vs. Drain Current
2
6
8
4
−ID, DRAIN CURRENT (AMPS)
10
Figure 15. On−Resistance vs. Drain Current
and Temperature
0.1
1.6
TJ = 25°C
VGS = −2.5 V
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TJ = −55°C
0.09
0.08
0.07
VGS = −4.5 V
0.06
0.05
0.04
0
2
4
8
6
−ID, DRAIN CURRENT (AMPS)
ID = −4 A
VGS = −4.5 V
1.4
1.2
1.0
0.8
0.6
−50
10
Figure 16. On−Resistance vs. Drain Current
−25
0
25
50
100
125
75
TJ, JUNCTION TEMPERATURE (°C)
Figure 17. On−Resistance Variation with
Temperature
http://onsemi.com
7
150
NTHD3102C
TYPICAL P−CHANNEL PERFORMANCE CURVES
5
10
−IS, SOURCE CURRENT (AMPS)
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
(TJ = 25°C unless otherwise noted)
4
3
2
1
ID = −3.2 A
TJ = 25°C
0
0
2
4
6
1
TJ = 125°C
TJ = 25°C
0.1
0.01
0.2
8
Qg, TOTAL GATE CHARGE (nC)
0.4
0.6
0.8
1.0
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 18. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 19. Diode Forward Voltage vs. Current
100
0.2
ID = −250 mA
0.1
tr
t, TIME (ns)
0
−0.1
td(off)
tf
10
td(on)
−0.2
VDS = −10 V
ID = −4.2 A
VGS = −4.5 V
−0.3
−0.4
−50
1
−25
0
25
75
50
100
150
125
1
10
100
TJ, JUNCTION TEMPERATURE (°C)
RG, GATE RESISTANCE (OHMS)
Figure 20. Threshold Voltage
Figure 21. Resistive Switching Time Variation
vs. Gate Resistance
800
TJ = 25°C
VGS = 0 V
C, CAPACITANCE (pF)
−VGS(th), THRESHOLD VARIANCE (V)
VGS = 0 V
TJ = 25°C
600
CISS
400
200
COSS
CRSS
0
0
4
8
12
16
20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 22. Capacitance Variation
http://onsemi.com
8
NTHD3102C
TYPICAL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
Normalized Effective Transient
Thermal Impedance
2
1
Duty Cycle = 0.5
Notes:
PDM
0.2
t1
0.1
t2
0.1
t1
1. Duty Cycle, D = t
2
2. Per Unit Base = RthJA = 90°C/W
0.05
0.02
0.01
10−4
3. TJM − TA = PDMZqJA(t)
4. Surface Mounted
Single Pulse
10−3
10−2
10 −1
1
Square Wave Pulse Duration (sec)
10
100
600
Figure 23. Thermal Response
ORDERING INFORMATION
Device
NTHD3102CT1G
Package
Shipping†
ChipFET
(Pb−Free)
3000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
http://onsemi.com
9
NTHD3102C
PACKAGE DIMENSIONS
ChipFET]
CASE 1206A−03
ISSUE G
D
8
7
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
q
6
L
5
HE
5
6
7
8
4
3
2
1
E
1
2
3
e1
4
b
c
e
STYLE 2:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
A
SOURCE 1
GATE 1
SOURCE 2
GATE 2
DRAIN 2
DRAIN 2
DRAIN 1
DRAIN 1
DIM
A
b
c
D
E
e
e1
L
HE
q
MILLIMETERS
NOM
MAX
1.05
1.10
0.30
0.35
0.15
0.20
3.05
3.10
1.65
1.70
0.65 BSC
0.55 BSC
0.28
0.35
0.42
1.80
1.90
2.00
5° NOM
INCHES
NOM
0.041
0.012
0.006
0.120
0.065
0.025 BSC
0.022 BSC
0.011
0.014
0.071
0.075
5° NOM
MIN
1.00
0.25
0.10
2.95
1.55
MIN
0.039
0.010
0.004
0.116
0.061
MAX
0.043
0.014
0.008
0.122
0.067
0.017
0.079
0.05 (0.002)
SOLDERING FOOTPRINT*
2.032
0.08
2.032
0.08
0.457
0.018
0.635
0.025
1.092
0.043
0.635
0.025
0.178
0.007
0.457
0.018
0.711
0.028
0.66
0.026
SCALE 20:1
ǒ
mm
inches
Ǔ
0.66
0.026
Basic
0.254
0.010
SCALE 20:1
Style 2
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
10
mm Ǔ
ǒinches
NTHD3102C
ChipFET is a trademark of Vishay Siliconix.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
11
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTHD3102C/D