LME49811 www.ti.com SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 LME49811 Audio Power Amplifier Series High Fidelity 200 Volt Power Amplifier Input Stage with Shutdown Check for Samples: LME49811 FEATURES DESCRIPTION • • • • • The LME49811 is a high fidelity audio power amplifier input stage designed for demanding consumer and pro-audio applications. Amplifier output power may be scaled by changing the supply voltage and number of output devices. The LME49811 is capable of driving an output stage to deliver in excess of 500 watts single-ended into an 8 ohm load in the presence of 10% high line headroom and 20% supply regulation. 1 2 Very High Voltage Operation Scalable Output Power Minimum External Components External Compensation Thermal Shutdown APPLICATIONS • • • • • • The LME49811 includes thermal shut down circuitry that activates when the die temperature exceeds 150°C. The LME49811's shutdown function when activated, forces the LME49811 into shutdown state. Powered Subwoofers Pro Audio Powered Studio Monitors Audio Video Receivers Guitar Amplifiers High Voltage Industrial Applications KEY SPECIFICATIONS • • • • Wide Operating Voltage Range: ±20V to ±100V PSRR (f = DC): 115dB (Typ) THD+N (f = 1kHz): 0.00035% (Typ) Output Drive Current: 9mA TYPICAL APPLICATION RF 56 k: +VCC CC +VCC 30 pF QDARN CS+ 0.1 PF CIN RB2 RIN 10 PF 1.8 k: 1.2 k: IN- Ci QMULT Source Ri RB1 10 PF 1.8 k: IN+ + RE1 0.22: 500: RE2 0.22: Sink RS +5V QDARP 56 k: RM SD Shutdown GND Circuitry -VEE 1.4 k: CS 0.1 PF + -VEE Figure 1. Typical Audio Amplifier Application Circuit 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2013, Texas Instruments Incorporated LME49811 SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 www.ti.com LME49811 Connection Diagram 15 +VCC 14 SOURCE 13 SINK 12 NC 11 10 9 8 7 6 5 4 3 2 1 -VEE NC NC NC NC COMP ININ+ GND SD NC Figure 2. Top View See Package Number NDN0015A PIN DESCRIPTIONS Pin Pin Name 1 NC No Connect, Pin electrically isolated Description 2 SD Shutdown Control 3 GND 4 IN+ Non-Inverting Input 5 IN- Inverting Input 6 Comp External Compensation Connection 7 NC No Connect, Pin electrically isolated 8 NC No Connect, Pin electrically isolated 9 NC No Connect, Pin electrically isolated 10 -VEE Negative Power Supply 11 NC No Connect, Pin electrically isolated 12 NC No Connect, Pin electrically isolated 13 Sink Output Sink 14 Source 15 +VCC Device Ground Output Source Positive Power Supply These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 LME49811 www.ti.com SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 ABSOLUTE MAXIMUM RATINGS (1) (2) Supply Voltage |V+| + |V-| 200V Differential Input Voltage +/-6V Common Mode Input Range 0.4 VEE to 0.4 VCC Power Dissipation (3) 4W (4) 2kV ESD Rating (5) 200V ESD Rating Junction Temperature (TJMAX) (6) Soldering Information 150°C NDN Package (10 seconds) Storage Temperature Thermal Resistance (1) (2) (3) (4) (5) (6) 260°C -40°C to +150°C θJA 73°C/W θJC 4°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. Human body model, applicable std. JESD22-A114C. Machine model, applicable std. JESD22-A115-A. The maximum operating junction temperature is 150°C. OPERATING RATINGS (1) (2) Temperature Range TMIN ≤ TA ≤ TMAX Supply Voltage |V+| + |V-| (1) (2) −40°C ≤ TA ≤ +85°C +/-20V ≤ VTOTAL ≤ +/-100V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 3 LME49811 SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS +VCC = -VEE = 50V (1) (2) The following specifications apply for ISD = 1.5mA, Figure 1, unless otherwise specified. Limits apply for TA = 25°C, CC = 30pF. Symbol Parameter Conditions LME49811 Typical (3) Limit (4) Units (Limits) ICC Total Quiescent Power Supply Current VCM = 0V, VO = 0V, IO = 0A 14 17 mA (max) IEE Total Quiescent Power Supply Current VCM = 0V, VO = 0V, IO = 0A 16 19 mA (max) THD+N Total Harmonic Distortion + Noise No load, AV = 29dB VOUT = 20VRMS, f = 1kHz 0.00055 0.0015 % (max) AV Closed Loop Voltage Gain 26 dB (min) AV Open Loop Gain VOM Output Voltage Swing VNOISE Output Noise IOUT Output Current VIN = 1mVRMS, f = 1kHz 93 f = DC 120 dB dB THD+N = 0.05%, Freq = 20Hz to 20kHz 33 VRMS LPF = 30kHz, Av = 29dB 100 μV A-weighted 70 180 μV (max) Outputs Shorted 8 6.5 mA(min) mA(min) mA (max) ISD Current into Shutdown Pin To put part in “play” mode 1.5 1 2 SR Slew Rate VIN = 1.2VP-P, f = 10kHz square Wave, Outputs shorted 16 13 V/μs (min) VOS Input Offset Voltage VCM = 0V, IO = 0mA 1 3 mV (max) IB Input Bias Current VCM = 0V, IO = 0mA 100 PSRR Power Supply Rejection Ratio DC, Input Referred 115 105 dB (min) (1) (2) (3) (4) 4 nA Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of product characterization and are not ensured. Data sheet min/max specification limits are ensured by test or statistical analysis. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 LME49811 www.ti.com SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 ELECTRICAL CHARACTERISTICS +VCC = –VEE = 100V (1) (2) The following specifications apply for ISD = 1.5mA, Figure 1, unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter Conditions LME49811 Typical (3) Limit (4) Units (Limits) ICC Total Quiescent Power Supply Current VCM = 0V, VO = 0V, IO = 0A 17 22 mA (max) IEE Total Quiescent Power Supply Current VCM = 0V, VO = 0V, IO = 0A 19 24 mA (max) THD+N Total Harmonic Distortion + Noise No load, AV = 30dB VOUT = 30VRMS, f = 1kHz 0.00035 0.001 % (max) AV Closed Loop Voltage Gain 26 dB (min) AV Open Loop Gain VOM Output Voltage Swing VNOISE Output Noise IOUT VIN = 1mVRMS, f = 1kHz 93 f = DC 120 dB THD+N = 0.05%, Freq = 20Hz to 20kHz 68 VRMS LPF = 30kHz, Av = 29dB 100 A-weighted 70 180 μV (max) Output Current Outputs Shorted 9 7 mA(min) ISD Current into Shutdown Pin To put part in “play” mode 1.5 1 2 mA(min) mA (max) SR Slew Rate VIN = 1.2VP-P, f = 10kHz square Wave, Outputs shorted 17 14 V/μs (min) VOS Input Offset Voltage VCM = 0V, IO = 0mA 1 3 mV (max) IB Input Bias Current VCM = 0V, IO = 0mA 100 PSRR Power Supply Rejection Ratio f = DC, Input Referred 115 (1) (2) (3) (4) dB μV nA (max) 105 dB (min) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of product characterization and are not ensured. Data sheet min/max specification limits are ensured by test or statistical analysis. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 5 LME49811 SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS Data taken with Bandwidth = 30kHz, AV = 29dB, CC = 30pF, and TA = 25°C except where specified. THD+N vs Frequency +VCC = –VEE = 100V, VO = 14V 10 1 1 THD+N (%) THD+N (%) THD+N vs Frequency +VCC = –VEE = 100V, VO = 30V 10 0.1 0.01 BW = 80 kHz 0.1 0.01 BW = 80 kHz 0.001 0.001 BW = 30 kHz 0.0001 BW = 30 kHz 0.0001 20 100 1k 20 10k 20k 100 FREQUENCY (Hz) Figure 4. THD+N vs Frequency +VCC = –VEE = 50V, VO = 10V 1 THD+N (%) THD+N (%) THD+N vs Frequency +VCC = –VEE = 50V, VO = 20V 10 1 0.1 0.01 BW = 80 kHz 0.001 0.1 0.01 BW = 80 kHz 0.001 BW = 30 kHz BW = 30 kHz 0.0001 20 100 1k 10k 20k 0.0001 20 100 FREQUENCY (Hz) 10 10k 20k FREQUENCY (Hz) Figure 6. THD+N vs Frequency +VCC = –VEE = 20V, VO = 5V THD+N vs Frequency +VCC = –VEE = 20V, VO = 10V 10 1 THD+N (%) THD+N (%) 1k Figure 5. 1 0.1 BW = 80 kHz 0.01 0.001 0.1 0.01 BW = 80 kHz 0.001 BW = 30 kHz BW = 30 kHz 0.0001 0.0001 20 100 1k 10k 20k FREQUENCY (Hz) 20 100 1k 10k 20k FREQUENCY (Hz) Figure 7. 6 10k 20k FREQUENCY (Hz) Figure 3. 10 1k Figure 8. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 LME49811 www.ti.com SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Data taken with Bandwidth = 30kHz, AV = 29dB, CC = 30pF, and TA = 25°C except where specified. 10 THD+N vs Output Voltage +VCC = –VEE = 50V, f = 20Hz 10 1 THD+N (%) THD+N (%) 1 0.1 BW = 80 kHz 0.01 0.001 THD+N vs Output Voltage +VCC = –VEE = 100V, f = 20Hz BW = 30 kHz 0.0001 100m 0.1 BW = 80 kHz 0.01 0.001 1 2 10 20 50 BW = 30 kHz 0.0001 100m 1 Figure 9. 10 THD+N vs Output Voltage +VCC = –VEE = 50V, f = 1kHz 10 THD+N (%) THD+N (%) THD+N vs Output Voltage +VCC = –VEE = 100V, f = 1kHz 1 0.1 BW = 80 kHz 0.01 BW = 30 kHz 0.0001 100m 1 0.1 BW = 80 kHz 0.01 0.001 2 10 20 50 BW = 30 kHz 0.0001 100m 50 100 Figure 12. THD+N vs Output Voltage +VCC = –VEE = 50V, f = 20kHz THD+N vs Output Voltage +VCC = –VEE = 100V, f = 20kHz 10 1 THD+N (%) THD+N (%) 10 Figure 11. 1 0.1 BW = 80 kHz 0.01 0.001 1 OUTPUT VOLTAGE (Vrms) OUTPUT VOLTAGE (Vrms) 10 50 100 Figure 10. 1 0.001 10 OUTPUT VOLTAGE (Vrms) OUTPUT VOLTAGE (Vrms) BW = 30 kHz 0.0001 100m 1 0.1 BW = 80 kHz 0.01 0.001 BW = 30 kHz 2 10 20 50 0.0001 100m OUTPUT VOLTAGE (Vrms) 1 10 50 100 OUTPUT VOLTAGE (Vrms) Figure 13. Figure 14. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 7 LME49811 SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Data taken with Bandwidth = 30kHz, AV = 29dB, CC = 30pF, and TA = 25°C except where specified. 10 THD+N vs Output Voltage +VCC = –VEE = 20V, f = 20kHz 10 1 1 THD+N (%) THD+N (%) THD+N vs Output Voltage +VCC = –VEE = 20V, f = 1kHz 0.1 BW = 80 kHz 0.01 BW = 30 kHz 0.001 0.0001 100m 1 0.1 BW=80 kHz 0.01 BW=30 kHz 0.001 2 10 0.0001 100m 20 OUTPUT VOLTAGE (Vrms) 1 20 Figure 16. THD+N vs Output Voltage +VCC = –VEE = 20V, f = 20kHz 3 Closed Loop Frequency Response +VCC = –VEE = 50V, VIN = 1VRMS 2 1 1 0.1 GAIN (dB) THD+N (%) 10 OUTPUT VOLTAGE (Vrms) Figure 15. 10 2 BW = 80 kHz 0.01 0 -1 0.001 BW = 30 kHz 0.0001 100m -2 -3 1 2 10 20 20 100 10k 200k FREQUENCY (Hz) OUTPUT VOLTAGE (Vrms) Figure 17. 3 1k Figure 18. Closed Loop Frequency Response +VCC = –VEE = 100V, VIN = 1VRMS Output Voltage vs Supply Voltage 100 OUTPUT VOTLAGE (VRMS) 2 GAIN (dB) 1 0 -1 -2 -3 20 100 1k 10k 200k THD+N = 1% 60 40 THD+N = 0.05% 20 0 0 20 40 60 80 100 SUPPLY VOLTAGE (±V) FREQUENCY (Hz) Figure 19. 8 80 Figure 20. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 LME49811 www.ti.com SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Data taken with Bandwidth = 30kHz, AV = 29dB, CC = 30pF, and TA = 25°C except where specified. PSRR vs Frequency +VCC = –VEE = 50V, No Filters Input Referred, VRIPPLE = 1VRMS on VCC pin 0 0 -20 -20 -40 -40 PSRR (dB) PSRR (dB) PSRR vs Frequency +VCC = –VEE = 100V, No Filters Input Referred, VRIPPLE = 1VRMS on VCC pin -60 -80 -60 -80 -100 -100 -120 -120 -140 20 100 1k 10k -140 20 100k 10k 100k FREQUENCY (Hz) Figure 21. Figure 22. PSRR vs Frequency +VCC = –VEE = 100V, No Filters Input Referred, VRIPPLE = 1VRMS on VEE pin PSRR vs Frequency +VCC = –VEE = 50V, No Filters Input Referred, VRIPPLE = 1VRMS on VEE pin 0 0 -20 -20 -40 PSRR (dB) PSRR (dB) -40 -60 -80 -60 -80 -100 -100 -120 -120 20 100 1k 10k -140 20 100k 100 Figure 23. Open Loop and Phase Upper-Phase Lower Gain Supply Current vs Supply Voltage 158 120 135 100 113 80 90 60 68 40 45 20 23 0 0 1k 10k 100k 1M 24 SUPPLY CURRENT (mA) 180 140 100 100k 28 203 160 -20 10 10k Figure 24. PHASE (°) 180 1k FREQUENCY (Hz) FREQUENCY (Hz) GAIN (dB) 1k 100 FREQUENCY (Hz) -23 10M 100M 20 IEE 16 ICC 12 8 4 0 20 30 40 50 60 70 80 90 100 SUPPLY VOTAGE (±V) FREQUENCY (Hz) Figure 25. Figure 26. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 9 LME49811 SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 www.ti.com TEST CIRCUIT RF 56 k: +VCC + CS 0.1 PF Ci 22 PF Ri CC 1.8 k: 30 pF - Test Signal Input CIN RIN 10 PF 1.8 k: + RS 56 k: CS + RM 0.1 PF -VEE 1.4 k: 5V Shutdown Circuitry Figure 27. Test Circuit APPLICATION INFORMATION SHUTDOWN FUNCTION The shutdown function of the LME49811 is controlled by the amount of current that flows into the shutdown pin. If there is less than 1mA of current flowing into the shutdown pin, the part will be in shutdown. This can be achieved by shorting the shutdown pin to ground or by floating the shutdown pin. If there is between 1mA and 2mA of current flowing into the shutdown pin, the part will be in “play” mode. This can be done by connecting a reference voltage to the shutdown pin through a resistor (RM). The current into the shutdown pin can be determined by the equation ISD = (VREF – 2.9) / RM. For example, if a 5V power supply is connected through a 1.4kΩ resistor to the shutdown pin, then the shutdown current will be 1.5mA, at the center of the specified range. It is also possible to use VCC as the power supply for the shutdown pin, though RM will have to be recalculated accordingly. It is not recommended to flow more than 2mA of current into the shutdown pin because damage to the LME49811 may occur. It is highly recommended to switch between shutdown and “play” modes rapidly. This is accomplished most easily through using a toggle switch that alternatively connects the shutdown pin through a resistor to either ground or the shutdown pin power supply. Slowly increasing the shutdown current may result in undesired voltages on the outputs of the LME49811, which can damage an attached speaker. THERMAL PROTECTION The LME49811 has a thermal protection scheme to prevent long-term thermal stress of the device. When the temperature on the die exceeds 150°C, the LME49811 shuts down. It starts operating again when the die temperature drops to about 145°C, but if the temperature again begins to rise, shutdown will occur again above 150°C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion between the thermal shutdown temperature limits of 150°C and 145°C. This greatly reduces the stress imposed on the IC by thermal cycling, which in turn improves its reliability under sustained fault conditions. 10 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 LME49811 www.ti.com SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen so that thermal shutdown is not activated during normal operation. Using the best heat sink possible within the cost and space constraints of the system will improve the long-term reliability of any power semiconductor device, as discussed in the DETERMINING THE CORRECT HEAT SINK section. POWER DISSIPATION AND HEAT SINKING When in “play” mode, the LME49811 draws a constant amount of current, regardless of the input signal amplitude. Consequently, the power dissipation is constant for a given supply voltage and can be computed with the equation PDMAX = ICC* (VCC– VEE). DETERMINING THE CORRECT HEAT SINK The choice of a heat sink for a high-power audio amplifier is made entirely to keep the die temperature at a level such that the thermal protection circuitry is not activated under normal circumstances. The thermal resistance from the die to the outside air, θJA (junction to ambient), is a combination of three thermal resistances, θJC (junction to case), θCS (case to sink), and θSA (sink to ambient). The thermal resistance, θJC (junction to case), of the LME49811 is 0.4 °C/W. Using Thermalloy Thermacote thermal compound, the thermal resistance, θCS (case to sink), is about 0.2°C/W. Since convection heat flow (power dissipation) is analogous to current flow, thermal resistance is analogous to electrical resistance, and temperature drops are analogous to voltage drops, the power dissipation out of the LME49811 is equal to the following: PDMAX = (TJMAX−TAMB) / θJA where • • • TJMAX = 150°C TAMB is the system ambient temperature θJA = θJC + θCS + θSA (1) Once the maximum package power dissipation has been calculated using Equation (1), the maximum thermal resistance, θSA, (heat sink to ambient) in °C/W for a heat sink can be calculated. This calculation is made using Equation (2) which is derived by solving for θSA in Equation (1). θSA = [(TJMAX−TAMB)−PDMAX(θJC +θCS)] / PDMAX (2) Again it must be noted that the value of θSA is dependent upon the system designer's amplifier requirements. If the ambient temperature that the audio amplifier is to be working under is higher than 25°C, then the thermal resistance for the heat sink, given all other things are equal, will need to be smaller. PROPER SELECTION OF EXTERNAL COMPONENTS Proper selection of external components is required to meet the design targets of an application. The choice of external component values that will affect gain and low frequency response are discussed below. The gain of each amplifier is set by resistors RF and Ri for the non-inverting configuration shown in Figure 1. The gain is found by Equation (3) below: AV = RF / Ri (V/V) (3) For best noise performance, lower values of resistors are used. A value of 1kΩ is commonly used for Ri and then setting the value of RF for the desired gain. For the LME49811 the gain should be set no lower than 26dB. Gain settings below 26dB may experience instability. The combination of Ri with Ci (see Figure 1) creates a high pass filter. The low frequency response is determined by these two components. The -3dB point can be found from Equation (4) shown below: fi = 1 / (2πRiCi) (Hz) (4) Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 11 LME49811 SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 www.ti.com If an input coupling capacitor is used to block DC from the inputs as shown in Figure 1, there will be another high pass filter created with the combination of CIN and RIN. When using a input coupling capacitor RIN is needed to set the DC bias point on the amplifier's input terminal. The resulting -3dB frequency response due to the combination of CIN and RIN can be found from Equation (5) shown below: fIN = 1 / (2πRINCIN) (Hz) (5) With large values of RIN oscillations may be observed on the outputs when the inputs are left floating. Decreasing the value of RIN or not letting the inputs float will remove the oscillations. If the value of RIN is decreased then the value of CIN will need to increase in order to maintain the same -3dB frequency response. COMPENSATION CAPACITOR The compensation capacitor (CC) is one of the most critical external components in value, placement and type. The capacitor should be placed close to the LME49811 and a silver mica type will give good performance. The value of the capacitor will affect slew rate and stability. The highest slew rate is possible while also maintaining stability through out the power and frequency range of operation results in the best audio performance. The value shown in Figure 1 should be considered a starting value with optimization done on the bench and in listening testing. SUPPLY BYPASSING The LME49811 has excellent power supply rejection and does not require a regulated supply. However, to eliminate possible oscillations all op amps and power op amps should have their supply leads bypassed with lowinductance capacitors having short leads and located close to the package terminals. Inadequate power supply bypassing will manifest itself by a low frequency oscillation known as “motorboating” or by high frequency instabilities. These instabilities can be eliminated through multiple bypassing utilizing a large electrolytic capacitor (10μF or larger) which is used to absorb low frequency variations and a small ceramic capacitor (0.1μF) to prevent any high frequency feedback through the power supply lines. If adequate bypassing is not provided the current in the supply leads which is a rectified component of the load current may be fed back into internal circuitry. This signal causes low distortion at high frequencies requiring that the supplies be bypassed at the package terminals with an electrolytic capacitor of 470μF or more. OUTPUT STAGE USING BIPOLAR TRANSISTORS With a properly designed output stage and supply voltage of ±100V, an output power up to 500W can be generated at 0.05% THD+N into an 8Ω speaker load. With an output current of several amperes, the output transistors need substantial base current drive because power transistors usually have quite low current gain—typical hfe of 50 or so. To increase the current gain, audio amplifiers commonly use Darlington style devices or additional driver stages. Power transistors should be mounted together with the VBE multiplier transistor on the same heat sink to avoid thermal run away. Please see the section BIASING TECHNIQUES AND AVOIDING THERMAL RUNAWAY for additional information. BIASING TECHNIQUES AND AVOIDING THERMAL RUNAWAY A class AB amplifier has some amount of distortion called Crossover distortion. To effectively minimize the crossover distortion from the output, a VBE multiplier may be used instead of two biasing diodes. A VBE multiplier normally consists of a bipolar transistor (QMULT, see Figure 1) and two resistors (RB1 and RB2, see Figure 1). A trim pot can also be added in series with RB1 for optional bias adjustment. A properly designed output stage, combine with a VBE multiplier, can eliminate the trim pot and virtually eliminate crossover distortion. The VCE voltage of QMULT (also called BIAS of the output stage) can be set by following formula: VBIAS = VBE(1+RB2/RB1) (V) (6) When using a bipolar output stage with the LME49811 (as in Figure 1), the designer must beware of thermal runaway. Thermal runaway is a result of the temperature dependence of VBE (an inherent property of the transistor). As temperature increases, VBE decreases. In practice, current flowing through a bipolar transistor heats up the transistor, which lowers the VBE. This in turn increases the current gain, and the cycle repeats. If the system is not designed properly this positive feedback mechanism can destroy the bipolar transistors used in the output stage. One of the recommended methods of preventing thermal runaway is to use the same heat sink on the bipolar output stage transistor together with VBE multiplier transistor. When the VBE multiplier transistor is mounted to the same heat sink as the bipolar output stage transistors, it temperature will track that of the output transistors. Its VBE is dependent upon temperature as well, and so it will draw more current as the output 12 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 LME49811 www.ti.com SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 transistors heat up, reducing the bias voltage to compensate. This will limit the base current into the output transistors, which counteracts thermal runaway. Another widely popular method of preventing thermal runaway is to use low value emitter degeneration resistors (RE1 and RE2). As current increases, the voltage at the emitter also increases, which decreases the voltage across the base and emitter. This mechanism helps to limit the current and counteracts thermal runaway. LAYOUT CONSIDERATION AND AVOIDING GROUND LOOPS A proper layout is virtually essential for a high performance audio amplifier. It is very important to return the load ground, supply grounds of output transistors, and the low level (feedback and input) grounds to the circuit board common ground point through separate paths. When ground is routed in this fashion, it is called a star ground or a single point ground. It is advisable to keep the supply decoupling capacitors of 0.1μF close as possible to LME49811 to reduce the effects of PCB trace resistance and inductance. Following the general rules will optimize the PCB layout and avoid ground loops problems: a) Make use of symmetrical placement of components. b) Make high current traces, such as output path traces, as wide as possible to accommodate output stage current requirement. c) To reduce the PCB trace resistance and inductance, same ground returns paths should be as short as possible. If possible, make the output traces short and equal in length. d) To reduce the PCB trace resistance and inductance, ground returns paths should be as short as possible. e) If possible, star ground or a single point ground should be observed. Advanced planning before starting the PCB can improve audio performance. Demonstration Board Layout Figure 28. Silkscreen Layer Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 13 LME49811 SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 www.ti.com Figure 29. Top Layer Figure 30. Bottom Layer 14 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 LME49811 www.ti.com SNAS394C – DECEMBER 2007 – REVISED APRIL 2013 REVISION HISTORY Rev Date 1.0 12/19/07 Initial release. Description 1.01 01/04/08 Edited the project title (replaced “Driver” with “Power Amplifier Input Stage”. 1.02 11/11/09 Fixed the spacing between the equations 3, 4, 5, and 6 to the units measures. C 04/05/13 Changed layout of National Data Sheet to TI format. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LME49811 15 PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2015 PACKAGING INFORMATION Orderable Device Status (1) LME49811TB/NOPB LIFEBUY Package Type Package Pins Package Drawing Qty TO-OTHER NDN 15 24 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM Op Temp (°C) Device Marking (4/5) -20 to 75 LME49811 TB (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. 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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2015 Addendum-Page 2 MECHANICAL DATA NDN0015A TB15A (Rev A) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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