Revised December 1999 FST6800 10-Bit Bus Switch with Pre-Charged Outputs General Description Features The Fairchild Switch FST6800 provides 10-bits of highspeed CMOS TTL-compatible bus switching. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The device precharges the B Port to a selectable bias voltage (BiasV) to minimize live insertion noise. ■ 4Ω switch connection between two ports. ■ Minimal propagation delay through the switch. ■ Low lCC. ■ Zero bounce in flow-through mode. ■ Output precharge to minimize live insertion noise. ■ Control inputs compatible with TTL level. The device is organized as a 10-bit switch with a bus enable (OE) signal. When OE is LOW, the switch is ON and Port A is connected to Port B. When OE is HIGH, the switch is OPEN and the B Port is precharged to BiasV through an equivalent 10-kΩ resistor. Ordering Code: Order Number Package Number Package Description FST6800WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide FST6800QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide FST6800MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Diagram Connection Diagram Pin Descriptions Truth Table Pin Name Description OE Bus Switch Enable A Bus A B Bus B © 1999 Fairchild Semiconductor Corporation DS500022 OE B0–B9 Function L A0–A9 Connect H BiasV Precharge www.fairchildsemi.com FST6800 10-Bit Bus Switch with Pre-Charged Outputs June 1997 FST6800 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 3) Supply Voltage (VCC ) −0.5V to +7.0V DC Switch Voltage (VS) −0.5V to +7.0V Power Supply Operating (VCC) 4.0V to 5.5V Bias V Voltage Range −0.5V to +6.0V Precharge Supply (BiasV) 1.5V to VCC DC Input Voltage (VIN) (Note 2) −0.5V to +7.0V Input Voltage (VIN) 0V to 5.5V 0V to 5.5V DC Input Diode Current (lIK) VIN<0V −50mA Output Voltage (VOUT) DC Output (IOUT ) Sink Current 128mA Input Rise and Fall Time (tr, tf) +/− 100mA DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) Switch Control Input −65°C to +150 °C 0nS/V to 5nS/V Switch I/O 0nS/V to DC −40 °C to +85 °C Free Air Operating Temperature (TA) Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions tables will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VCC (V) TA = −40 °C to +85 °C Typ (Note 4) Min Max −1.2 Units Conditions IIN = −18mA VIK Clamp Diode Voltage VIH HIGH Level Input Voltage 4.0–5.5 VIL LOW Level Input Voltage 4.0–5.5 0.8 V II Input Leakage Current 5.5 ±1.0 µA 0≤ VIN ≤5.5V IO Output Current 4.5 mA BiasV = 2.4V, B = 0 IOZ OFF-STATE Leakage Current 5.5 ±1.0 µA 0 ≤A ≤VCC RON Switch On Resistance 4.5 4 7 Ω VIN = 0V, IIN = 64mA (Note 5) 4.5 4 7 Ω VIN = 0V, IIN = 30mA 4.5 2.0 V V 0.25 4.5 8 15 Ω VIN = 2.4V, IIN = 15mA 4.0 11 20 Ω VIN = 2.4V, IIN = 15mA ICC Quiescent Supply Current 5.5 3 µA VIN = VCC or GND, IOUT = 0 ∆ ICC Increase in ICC per Input 5.5 2.5 mA One input at 3.4V Other inputs at VCC or GND Note 4: Typical values are at VCC = 5.0V and T A= +25°C Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. www.fairchildsemi.com 2 TA = −40 °C to +85 °C, CL = 50pF, RU = RD = 500Ω Symbol Parameter VCC = 4.5 – 5.5V Min tPHL,tPLH Prop Delay Bus to Bus (Note 6) tPZH Output Enable Time tPZL tPHZ Output Disable Time tPLZ VCC = 4.0V Max Min 0.25 Units Conditions Figure No. Max 0.25 ns VI = OPEN Figures 1, 2 1.5 6.2 6.5 ns VI = OPEN, BiasV = GND 1.5 6.2 6.5 ns VI = 7V, BiasV = 3V 1.5 6.1 6.5 ns VI = OPEN, BiasV = GND 1.5 7.3 6.8 ns VI = 7V, BiasV = 3V Figure 1 Figure 2 Figure 1 Figure 2 Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance). Capacitance Symbol (Note 7) Parameter Typ Max Units Conditions CIN Control Pin Input Capacitance 3 pF VCC = 5.0V CI/O Input/Output Capacitance 5 pF VCC, OE = 5.0V Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. AC Loading and Waveforms Note: Input driven by 50 Ω source terminated in 50 Ω Note: C L includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500 ns FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms 3 www.fairchildsemi.com FST6800 AC Electrical Characteristics FST6800 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide Package Number MQA24 www.fairchildsemi.com 4 FST6800 10-Bit Bus Switch with Pre-Charged Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC24 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com