LINER LT3844 High voltage, current mode switching regulator controller with programmable operating frequency Datasheet

LT3844
High Voltage, Current Mode
Switching Regulator Controller with
Programmable Operating Frequency
FEATURES
DESCRIPTION
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The LT®3844 is a DC/DC controller used for medium power,
low part count, high efficiency supplies. It offers a wide
4V to 60V input range (7.5V minimum start-up voltage)
and can implement step-down, step-up, inverting and
SEPIC topologies.
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High Voltage Operation: Up to 60V
Output Voltages Up to 36V (Step Down)
Programmable Constant Frequency: 100kHz to
500kHz
Synchronizable up to 600kHz
Burst Mode® Operation: 120μA Supply Current
10μA Shutdown Supply Current
±1.3% Reference Accuracy
Drives N-Channel MOSFET
Programmable Soft-Start
Programmable Undervoltage Lockout
Internal High Voltage Regulator for Gate Drive
Thermal Shutdown
Current Limit Unaffected by Duty Cycle
16-Pin Thermally Enhanced TSSOP Package
The LT3844 includes Burst Mode operation, which reduces
quiescent current below 120μA and maintains high efficiency at light loads. An internal high voltage bias regulator
allows for simple biasing.
Additional features include current mode control for fast
line and load transient response; programmable fixed
operating frequency that can be synchronized to an external clock for noise sensitive applications; a gate driver
capable of driving large N-channel MOSFETs; a precision
undervoltage lockout function; 10μA shutdown current;
short-circuit protection and a programmable soft-start
function.
APPLICATIONS
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Industrial Power Distribution
12V and 42V Automotive and Heavy Equipment
High Voltage Single Board Systems
Distributed Power Systems
Avionics
Telecom Power
The LT3844 is available in a 16-lead thermally enhanced
TSSOP package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5731694, 6498466, 6611131
TYPICAL APPLICATION
High Voltage Step-Down Regulator 48V to 12V, 50W
68μF
22μF
VIN
BOOST
SHDN
TG
CSS
SW
BURST_EN
VCC
86
10k
PGND
VC
SENSE+
SYNC
SENSE–
120pF
10μH
VOUT
12V
50W
0.015Ω
1μF
LT3844
680p
Si7850DP
10Ω
VFB
PDS5100H
68μF
33μF
SGND
R7
49.9k
6
5
EFFICIENCY
84
82
4
3
LOSS
80
2
78
1
76
0.1
130k
fSET
7
VIN = 48V
88
1
LOAD CURRENT (A)
POWER LOSS (W)
1000pF
82.5k
14.7k
90
0.22μF
1M
EFFICIENCY (%)
VIN
36V TO 60V
Efficiency and Power Loss
vs Load Current
0
10
3844 TA01b
3844 TA01
3844fb
1
LT3844
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
Input Supply Voltage (VIN) ......................... 65V to –0.3V
Boosted Supply Voltage (BOOST) .............. 80V to –0.3V
Switch Voltage (SW) (Note 8) ....................... 65V to –1V
Differential Boost Voltage
BOOST to SW ........................................ 24V to –0.3V
Bias Supply Voltage (VCC) .......................... 24V to –0.3V
SENSE+ and SENSE– Voltages ................... 40V to –0.3V
Differential Sense Voltage
SENSE+ to SENSE– ..................................... 1V to –1V
BURST_EN Voltage .................................... 24V to –0.3V
SYNC, VC, VFB, CSS and SHDN Voltages ...... 5V to –0.3V
SHDN Pin Currents ..................................................1mA
Operating Junction Temperature Range (Note 2)
LT3844E (Note 3) ............................... –40°C to 125°C
LT3844I .............................................. –40°C to 125°C
Storage Temperature.............................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
TOP VIEW
VIN
1
16 BOOST
SHDN
2
15 TG
CSS
3
14 SW
BURST_EN
4
VFB
5
VC
6
11 SENSE+
SYNC
7
10 SENSE–
fSET
8
9
17
13 VCC
12 PGND
SGND
FE PACKAGE
16-LEAD PLASTIC TSSOP
TJMAX = 125°C, θJA = 40°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3844EFE#PBF
LT3844EFE#TRPBF
3844EFE
16-Lead Plastic TSSOP
–40°C to 125°C
LT3844IFE#PBF
LT3844IFE#TRPBF
3844IFE
16-Lead Plastic TSSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 20V, VCC = BOOST = BURST_EN = 10V, SHDN = 2V, RSET = 49.9k,
SENSE– = SENSE+ = 10V, SGND = PGND = SW = SYNC = 0V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
l
l
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VIN Operating Voltage Range (Note 4)
VIN Minimum Start Voltage
VIN UVLO Threshold (Falling)
VIN UVLO Threshold Hysteresis
VIN Supply Current
VIN Burst Mode Current
VIN Shutdown Current
VCC > 9V
VBURST_EN = 0V, VFB = 1.35V
VSHDN = 0V
BOOST Operating Voltage Range
BOOST Operating Voltage Range (Note 5)
BOOST UVLO Threshold (Rising)
BOOST UVLO Threshold Hysteresis
VBOOST – VSW
VBOOST – VSW
VBOOST – VSW
BOOST Supply Current (Note 6)
BOOST Burst Mode Current
BOOST Shutdown Current
VBURST_EN = 0V
VSHDN = 0V
TYP
4
3.6
3.8
670
20
20
10
l
l
MAX
60
7.5
4
15
75
20
UNITS
V
V
V
mV
μA
μA
μA
5
400
V
V
V
mV
1.4
0.1
0.1
mA
μA
μA
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LT3844
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 20V, VCC = BOOST = BURST_EN = 10V, SHDN = 2V, RSET = 49.9k,
SENSE– = SENSE+ = 10V, SGND = PGND = SW = SYNC = 0V, unless otherwise noted.
PARAMETER
VCC Operating Voltage Range (Note 5)
VCC Output Voltage
VCC UVLO Threshold (Rising)
VCC UVLO Threshold Hysteresis
CONDITIONS
MIN
Over Full Line and Load Range
VBURST_EN = 0V
VSHDN = 0V
Error Amp Reference Voltage
Measured at VFB Pin
VFB Pin Input Current
VFB = 1.231V
–40
l
1.224
1.215
VSENSE+ – VSENSE–
l
1.3
l
l
0
90
VSENSE(CM) = 0V
VSENSE(CM) = 2V
VSENSE(CM) > 4V
1.7
95
20
–120
2.1
mA
μA
μA
mA
1.231
1.238
1.245
1.35
120
100
l
290
270
Minimum Programmable Frequency
Maximum Programmable Frequency
l
l
500
External Sync Frequency Range
l
100
SYNC Input Resistance
300
1.4
V
mV
36
115
V
mV
μA
μA
μA
310
330
kHz
kHz
100
kHz
kHz
600
kHz
40
l
SYNC Voltage Threshold
1.4
Soft-Start Capacitor Control Current
kΩ
2
2
l
Error Amp Transconductance
Error Amp DC Voltage Gain
Error Amp Sink/Source Current
270
340
V
V
nA
350
–25
–170
Operating Frequency
UNITS
V
V
V
mV
25
SHDN Enable Threshold (Rising)
SHDN Threshold Hysteresis
Input Current
(ISENSE+ + ISENSE–)
l
MAX
20
8.3
8
6.25
500
l
VCC Supply Current (Note 6)
VCC Burst Mode Current
VCC Shutdown Current
VCC Current Limit
Sense Pins Common Mode Range
Current Limit Sense Voltage
l
l
TYP
V
μA
410
μS
62
dB
±30
μA
TG Drive On Voltage (Note 7)
TG Drive Off Voltage
CLOAD = 2200pF
CLOAD = 2200pF
9.8
0.1
V
V
TG Drive Rise/Fall Time
10% to 90% or 90% to 10%, CLOAD = 2200pF
40
ns
Minimum TG Off Time
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350
500
ns
Minimum TG On Time
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250
350
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3844 includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: The LT3844E is guaranteed to meet performance specifications from
0°C to 125°C junction temperature. Specifications over the –40°C to 125°C
operating junction temperature range are assured by design, characterization
and correlation with statistical process controls. The LT3844I is guaranteed
over the full –40°C to 125°C operating junction temperature range.
Note 4: VIN voltages below the start-up threshold (7.5V) are only
supported when the VCC is externally driven above 6.5V.
Note 5: Operating range is dictated by MOSFET absolute maximum VGS.
Note 6: Supply current specification does not include switch drive
currents. Actual supply currents will be higher.
Note 7: DC measurement of gate drive output “ON” voltage is typically
8.6V. Internal dynamic bootstrap operation yields typical gate “ON”
voltages of 9.8V during standard switching operation. Standard operation
gate “ON” voltage is not tested but guaranteed by design.
Note 8: The –1V absolute maximum on the SW pin is a transient condition.
It is guaranteed by design and not subject to test.
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LT3844
TYPICAL PERFORMANCE CHARACTERISTICS
Shutdown Threshold (Falling)
vs Temperature
Shutdown Threshold (Rising)
vs Temperature
1.37
1.36
1.35
1.34
1.33
1.32
–50 –25
0
50
25
75
TEMPERATURE (°C)
100
125
8.2
1.25
8.1
1.23
1.22
1.20
–50 –25
0
25
50
75
TEMPERATURE (°C)
100
8
175
ICC CURRENT LIMIT (mA)
200
VCC (V)
6
5
15 20 25
ICC(LOAD) (mA)
30
35
3
40
4
5
8
9
VIN (V)
7
6
10
11
100
50
–50
12
20
6.3
15
6.2
6.1
125
3844 G07
0
25
50
75
TEMPERATURE (°C)
100
350
TA = 25°C
10
0
0
2
4
125
Error Amp Transconductance
vs Temperature
5
100
–25
3844 G06
ERROR AMP TRANSCONDUCTANCE (μS)
6.4
ICC (mA)
VCC UVLO THRESHOLD, RISING (V)
25
0
25
50
75
TEMPERATURE (°C)
125
ICC vs VCC (SHDN = 0V)
6.5
6.0
–50 –25
150
3844 G05
3844 G04
VCC UVLO Threshold (Rising)
vs Temperature
125
75
4
10
100
ICC Current Limit vs Temperature
VCC vs VIN
7.90
5
0
25
50
75
TEMPERATURE (°C)
3844 G03
9 I = 20mA
CC
TA = 25°C
7
VCC (V)
7.5
–50 –25
125
3844 G02
TA = 25°C
0
7.8
7.6
8.00
7.85
7.9
7.7
1.21
VCC vs ICC(LOAD)
7.95
ICC = 20mA
8.0
1.24
3844 G01
8.05
VCC vs Temperature
1.26
VCC (V)
SHUTDOWN THRESHOLD, FALLING (V)
SHUTDOWN THRESHOLD, RISING (V)
1.38
6
8
10 12 14 16 18 20
VCC (V)
3844 G08
345
340
335
330
325
320
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
3844 G09
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LT3844
TYPICAL PERFORMANCE CHARACTERISTICS
I(SENSE+ + SENSE–) vs
VSENSE(CM)
Operating Frequency
vs Temperature
400
308
TA = 25°C
1.234
306
200
100
0
–100
1.233
ERROR AMP REFERENCE (V)
OPERATING FREQUENCY (kHz)
300
I(SENSE+ + SENSE–) (μA)
Error Amp Reference
vs Temperature
304
302
300
298
296
294
0
290
–50
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VSENSE (CM) (V)
–25
0
25
50
75
TEMPERATURE (°C)
100
3844 G10
125
1.227
–50 –25
102
100
98
96
100
125
100
125
3844 G12
3.86
VIN UVLO THRESHOLD, FALLING (V)
104
50
25
75
0
TEMPERATURE (°C)
VIN UVLO Threshold (Falling)
vs Temperature
4.54
VIN UVLO THRESHOLD, RISING (V)
CURRENT SENSE THRESHOLD (mV)
1.229
VIN UVLO Threshold (Rising)
vs Temperature
106
50
25
75
0
TEMPERATURE (°C)
1.230
3844 G17
Maximum Current Sense
Threshold vs Temperature
94
–50 –25
1.231
1.228
292
–200
1.232
4.52
3.84
4.50
3.82
4.48
4.46
3.80
4.44
3.78
4.42
4.40
–50 –25
50
25
75
0
TEMPERATURE (°C)
3844 G16
100
125
3.76
–50 –25
3844 G14
50
25
75
0
TEMPERATURE (°C)
100
125
3844 G15
PIN FUNCTIONS
VIN (Pin 1): The VIN pin is the main supply pin and should
be decoupled to SGND with a low ESR capacitor located
close to the pin.
supply current is reduced to approximately 9μA. Typical
pin input bias current is <10μA and the pin is internally
clamped to 6V.
SHDN (Pin 2): The SHDN pin has a precision IC enable
threshold of 1.35V (rising) with 120mV of hysteresis. It is
used to implement an undervoltage lockout (UVLO) circuit.
See Applications Information section for implementing
a UVLO function. When the SHDN pin is pulled below
a transistor VBE (0.7V), a low current shutdown mode
is entered, all internal circuitry is disabled and the VIN
CSS (Pin 3): The soft-start pin is used to program the
supply soft-start function. Use the following formula to
calculate CSS for a given output voltage slew rate:
CSS = 2μA(tSS/1.231V)
The pin should be left unconnected when not using the
soft-start function.
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LT3844
PIN FUNCTIONS
BURST_EN (Pin 4): The BURST_EN pin is used to enable or
disable Burst Mode operation. Connect the BURST_EN pin
to ground to enable the burst mode function. Connect the
pin to VFB or VCC to disable the Burst Mode function.
VFB (Pin 5): The output voltage feedback pin, VFB, is
externally connected to the supply output voltage via a
resistive divider. The VFB pin is internally connected to
the inverting input of the error amplifier. In regulation,
VFB is 1.231V.
VC (Pin 6): The VC pin is the output of the error amplifier
whose voltage corresponds to the maximum (peak) switch
current per oscillator cycle. The error amplifier is typically
configured as an integrator circuit by connecting an RC
network from the VC pin to SGND. This circuit creates the
dominant pole for the converter regulation control loop.
Specific integrator characteristics can be configured to
optimize transient response. When Burst Mode operation
is enabled (see Pin 4 description), an internal low impedance clamp on the VC pin is set at 100mV below the burst
threshold, which limits the negative excursion of the pin
voltage. Therefore, this pin cannot be pulled low with a
low impedance source. If the VC pin must be externally
manipulated, do so through a 1k series resistance.
SYNC (Pin 7): The SYNC pin provides an external clock
input for synchronization of the internal oscillator. RSET
is set such that the internal oscillator frequency is 10%
to 25% below the external clock frequency. If unused the
SYNC pin is connected to SGND. For more information see
“Oscillator Sync” in the Applications Information section
of this data sheet.
fSET (Pin 8): The fSET pin programs the oscillator frequency
with an external resistor, RSET . The resistor is required
even when supplying external sync clock signal. See the
Applications Information section for resistor value selection details.
SGND (Pin 9, 17): The SGND pin is the low noise ground
reference. It should be connected to the –VOUT side of the
output capacitors. Careful layout of the PCB is necessary
to keep high currents away from this SGND connection.
See the Applications Information section for helpful hints
on PCB layout of grounds.
SENSE– (Pin 10): The SENSE– pin is the negative input for
the current sense amplifier and is connected to the VOUT
side of the sense resistor for step-down applications. The
sensed inductor current limit is set to 100mV across the
SENSE inputs.
SENSE+ (Pin 11): The SENSE+ pin is the positive input for
the current sense amplifier and is connected to the inductor side of the sense resistor for step-down applications.
The sensed inductor current limit is set to 100mV across
the SENSE inputs.
PGND (Pin 12): The PGND pin is the high current ground
reference for internal low side switch and the VCC regulator
circuit. Connect the pin directly to the negative terminal of
the VCC decoupling capacitor. See the Applications Information section for helpful hints on PCB layout of grounds.
VCC (Pin 13): The VCC pin is the internal bias supply
decoupling node. Use a low ESR 1μF or greater ceramic
capacitor to decouple this node to PGND. Most internal IC
functions are powered from this bias supply. An external
diode connected from VCC to the BOOST pin charges the
bootstrapped capacitor during the off-time of the main
power switch. Back driving the VCC pin from an external
DC voltage source, such as the VOUT output of the regulator supply, increases overall efficiency and reduces power
dissipation in the IC. In shutdown mode this pin sinks
20μA until the pin voltage is discharged to 0V.
SW (Pin 14): In step-down applications the SW pin is
connected to the cathode of an external clamping Schottky
diode, the drain of the power MOSFET and the inductor.
The SW node voltage swing is from VIN during the ontime of the power MOSFET, to a Schottky voltage drop
below ground during the off-time of the power MOSFET.
In start-up and in operating modes where there is insufficient inductor current to freewheel the Schottky diode, an
internal switch is turned on to pull the SW pin to ground
so that the BOOST pin capacitor can be charged. Give
careful consideration in choosing the Schottky diode to
limit the negative voltage swing on the SW pin.
TG (Pin 15): The TG pin is the bootstrapped gate drive for
the top N-Channel MOSFET. Since very fast high currents
are driven from this pin, connect it to the gate of the power
MOSFET with a short and wide, typically 0.02" width, PCB
trace to minimize inductance.
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LT3844
PIN FUNCTIONS
BOOST (Pin 16): The BOOST pin is the supply for the
bootstrapped gate drive and is externally connected to a
low ESR ceramic boost capacitor referenced to SW pin.
The recommended value of the BOOST capacitor, CBOOST ,
is 50 times greater than the total input capacitance of the
topside MOSFET. In most applications 0.1μF is adequate.
The maximum voltage that this pin sees is VIN + VCC,
ground referred.
Exposed Pad (Pin 17): SGND. The exposed leadframe is
internally connected to the SGND pin. Solder the exposed
pad to the PCB ground for electrical contact and optimal
thermal performance.
FUNCTIONAL DIAGRAM
VIN
UVLO
(<4V)
8V
REGULATOR
VIN
VCC
UVLO
(<6V)
1
VIN
BOOSTED SWITCH
DRIVER
BST
UVLO
BOOST
16
CIN
CBOOST
3.8V
REGULATOR
VREF
RA
–
+
INTERNAL
SUPPLY RAIL
DRIVE
CONTROL
FEEDBACK
REFERENCE
1.231V
+
RB
TG
15
M1
SW
14
NOL
SWITCH
LOGIC
SHDN
2
DRIVER
L1
VOUT
D2
VCC
CVCC
–
D3
(OPTIONAL)
PGND
12
–
4
COUT
D1
13
DRIVE
CONTROL
BURST_EN
RSENSE
VFB
5
+
–
R2
R1
gm +
ERROR
AMP
SYNC
7
0.5V
OSCILLATOR
100mV
Q
VC
–
RC
CC1
R
+
CC2
RSET
–
6
+
~1V
CSS CLAMPED TO
VFB + VBE
VREF + 200mV
fSET
8
S
SOFT-START
BURST DISABLE
CURRENT
SENSE
COMPARATOR
+
–
SLOPE COMP
GENERATOR
–
Burst Mode
OPERATION
+
SGND
9
3
CSS
2μA
FAULT CONDITION:
V UVLO
50μA VIN UVLO
CC
VSHDN UVLO
SENSE+
11
SENSE–
10
3844 FD
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LT3844
OPERATION
(Refer to Functional Diagram)
The LT3844 is a PWM controller with a constant frequency,
current mode control architecture. It is designed for low
to medium power, switching regulator applications. Its
high operating voltage capability allows it to step up
or down input voltages up to 60V without the need for
a transformer. The LT3844 is used in nonsynchronous
applications, meaning that a freewheeling rectifier diode
(D1 of Function Diagram) is used instead of a bottom
side MOSFET. For circuit operation, please refer to the
Functional Diagram of the IC and Typical Application on
the front page of the data sheet. The LT3800 is a similar
part that uses synchronous rectification, replacing the
diode with a MOSFET in a step-down application.
Main Control Loop
During normal operation, the external N-channel MOSFET
switch is turned on at the beginning of each cycle. The
switch stays on until the current in the inductor exceeds
a current threshold set by the DC control voltage, VC,
which is the output of the voltage control loop. The voltage
control loop monitors the output voltage, via the VFB pin
voltage, and compares it to an internal 1.231V reference.
It increases the current threshold when the VFB voltage
is below the reference voltage and decreases the current
threshold when the VFB voltage is above the reference
voltage. For instance, when an increase in the load current
occurs, the output voltage drops causing the VFB voltage to
drop relative to the 1.231V reference. The voltage control
loop senses the drop and increases the current threshold.
The peak inductor current is increased until the average
inductor current equals the new load current and the output
voltage returns to regulation.
VCC/Boosted Supply
An internal VCC regulator provides VIN derived gate-drive
power for start-up under all operating conditions with
MOSFET gate charge loads up to 90nC. The regulator can
operate continuously in applications with VIN voltages up to
60V, provided the power dissipation of the regulator does
not exceed 250mW. The power dissipation is calculated
as follows:
Pd(REG) = (VIN – 8V) • fSW • QG
where QG is the MOSFET gate charge.
In applications where these conditions are exceeded, VCC
must be derived from an external source after start-up.
Maximum continuous regulator power dissipation may be
exceeded for short duration VIN transients.
For higher converter efficiency and less power dissipation in the IC, VCC can also be supplied from an external
supply such as the converter output. When an external
supply back drives the internal VCC regulator through an
external diode and the VCC voltage is pulled to a diode
above its regulation voltage, the internal regulator is disabled and goes into a low current mode. VCC is the bias
supply for most of the internal IC functions and is also
used to charge the bootstrapped capacitor (CBOOST) via an
external diode. The external MOSFET switch is biased from
the bootstrapped capacitor. While the external MOSFET
switch is off, an internal BJT switch, whose collector is
connected to the SW pin and emitter is connected to the
PGND pin, is turned on to pull the SW node to PGND and
recharge the bootstrap capacitor. The switch stays on until
either the start of the next cycle or until the bootstrapped
capacitor is fully charged.
Current Limit/Short-Circuit
The inductor current is measured with a series sense
resistor (see the Typical Application on the front page).
When the voltage across the sense resistor reaches the
maximum current sense threshold, typically 100mV, the
TG MOSFET driver is disabled for the remainder of that
cycle. If the maximum current sense threshold is still exceeded at the beginning of the next cycle, the entire cycle
is skipped. Cycle skipping keeps the inductor currents to a
reasonable value during a short-circuit, particularly when
VIN is high. Setting the sense resistor value is discussed
in the “Application Information” section.
MOSFET Driver
The LT3844 contains a high speed boosted driver to turn
on and off an external N-channel MOSFET switch. The
MOSFET driver derives its power from the boost capacitor which is referenced to the SW pin and the source of
the MOSFET. The driver provides a large pulse of current
to turn on the MOSFET fast to minimize transition times.
Multiple MOSFETs can be paralleled for higher current
operation.
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LT3844
OPERATION
(Refer to Functional Diagram)
To eliminate the possibility of shoot through between the
MOSFET and the internal SW pull-down switch, an adaptive nonoverlap circuit ensures that the internal pull-down
switch does not turn on until the gate of the MOSFET is
below its turn on threshold.
Low Current Operation (Burst Mode Operation)
To increase low current load efficiency, the LT3844 is
capable of operating in Linear Technology’s proprietary
Burst Mode operation where the external MOSFET operates
intermittently based on load current demand. The Burst
Mode function is disabled by connecting the BURST_EN
pin to VCC or VFB and enabled by connecting the pin to
SGND.
When the required switch current, sensed via the VC pin
voltage, is below 15% of maximum, Burst Mode operation
is employed and that level of sense current is latched onto
the IC control path. If the output load requires less than
this latched current level, the converter will overdrive the
output slightly during each switch cycle. This overdrive
condition is sensed internally and forces the voltage on the
VC pin to continue to drop. When the voltage on VC drops
150mV below the 15% load level, switching is disabled,
and the LT3844 shuts down most of its internal circuitry,
reducing total quiescent current to 120μA. When the
converter output begins to fall, the VC pin voltage begins
to climb. When the voltage on the VC pin climbs back to
the 15% load level, the IC returns to normal operation and
switching resumes. An internal clamp on the VC pin is set
at 100mV below the output disable threshold, which limits
the negative excursion of the pin voltage, minimizing the
converter output ripple during Burst Mode operation.
During Burst Mode operation, the VIN pin current is 20μA
and the VCC current is reduced to 100μA. If no external
drive is provided for VCC, all VCC bias currents originate
from the VIN pin, giving a total VIN current of 120μA. Burst
current can be reduced further when VCC is driven using an
output derived source, as the VCC component of VIN current
is then reduced by the converter duty cycle ratio.
Start-Up
The following section describes the start-up of the supply
and operation down to 4V once the step-down supply is
up and running. For the protection of the LT3844 and the
switching supply, there are internal undervoltage lockout
(UVLO) circuits with hysteresis on VIN, VCC and VBOOST ,
as shown in the Electrical Characteristics table. Start-up
and continuous operation require that all three of these
undervoltage lockout conditions be satisfied because the
TG MOSFET driver is disabled during any UVLO fault condition. In start-up, for most applications, VCC is powered
from VIN through the high voltage linear regulator of the
LT3844. This requires VIN to be high enough to drive the
VCC voltage above its undervoltage lockout threshold.
VCC, in turn, has to be high enough to charge the BOOST
capacitor through an external diode so that the BOOST
voltage is above its undervoltage lockout threshold. There
is an NPN switch that pulls the SW node to ground each
cycle during the TG power MOSFET off-time, ensuring the
BOOST capacitor is kept fully charged. Once the supply
is up and running, the output voltage of the supply can
backdrive VCC through an external diode. Internal circuitry
disables the high voltage regulator to conserve VIN supply
current. Output voltages that are too low or too high to
backdrive VCC require additional circuitry such as a voltage
doubler or linear regulator. Once VCC is backdriven from
a supply other than VIN, VIN can be reduced to 4V with
normal operation maintained.
Soft-Start
The soft-start function controls the slew rate of the power
supply output voltage during start-up. A controlled output
voltage ramp minimizes output voltage overshoot, reduces
inrush current from the VIN supply, and facilitates supply
sequencing. A capacitor, CSS, connected from the CSS pin
to SGND, programs the slew rate. The capacitor is charged
from an internal 2μA current source producing a ramped
voltage. The capacitor voltage overrides the internal reference to the error amplifier. If the VFB pin voltage exceeds
3844fb
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LT3844
OPERATION
(Refer to Functional Diagram)
the CSS pin voltage then the current threshold set by the
DC control voltage, VC, is decreased and the inductor current is lowered. This in turn decreases the output voltage
slew rate allowing the CSS pin voltage ramp to catch up
to the VFB pin voltage. An internal 100mV offset is added
to the VFB pin voltage relative to the to CSS pin voltage
so that at start-up the soft-start circuit will discharge the
VC pin voltage below the DC control voltage equivalent to
zero inductor current. This will reduce the input supply
inrush current. The soft-start circuit is disabled once the
CSS pin voltage has been charged to 200mV above the
internal reference of 1.231V.
During a VIN UVLO, VCC UVLO or SHDN UVLO event, the
CSS pin voltage is discharged with a 50μA current source.
In normal operation the CSS pin voltage is clamped to a
diode above the VFB pin voltage. Therefore, the value of
the CSS capacitor is relevant in how long of a fault event
will retrigger a soft-start. In other words, if any of the
above UVLO conditions occur, the CSS pin voltage will be
discharged with a 50μA current source. There is a diode
worth of voltage headroom to ride through the fault before
the CSS pin voltage enters its active region and the softstart function is enabled.
Also, since the CSS pin voltage is clamped to a diode above
the VFB pin voltage, during a short circuit the CSS pin voltage is pulled low because the VFB pin voltage is low. Once
the short has been removed the VFB pin voltage starts to
recover. The soft-start circuit takes control of the output
voltage slew rate once the VFB pin voltage has exceeded
the slowly ramping CSS pin voltage, reducing the output
voltage overshoot during a short-circuit recovery.
Slope/Antislope Compensation
The IC incorporates slope compensation to eliminate
potential subharmonic oscillations in the current control
loop. The IC’s slope compensation circuit imposes an
artificial ramp on the sensed current to increase the rising
slope as duty cycle increases.
Typically, this additional ramp affects the sensed current
value, thereby reducing the achievable current limit value
by the same amount as the added ramp represents. As
such, the current limit is typically reduced as the duty cycle
increases. The LT3844, however, contains antislope compensation circuitry to eliminate the current limit reduction
associated with slope compensation. As the slope compensation ramp is added to the sensed current, a similar ramp
is added to the current limit threshold. The end result is that
the current limit is not compromised so the LT3844 can
provide full power regardless of required duty cycle.
Shutdown
The LT3844 includes a shutdown mode where all the
internal IC functions are disabled and the VIN current is
reduced to less than 10μA. The shutdown pin can be used
for undervoltage lockout with hysteresis, micropower shutdown or as a general purpose on/off control of the converter
output. The shutdown function has two thresholds. The
first threshold, a precision 1.23V threshold with 120mV
of hysteresis, disables the converter from switching. The
second threshold, approximately a 0.7V referenced to
SGND, completely disables all internal circuitry and reduces
the VIN current to less than 10μA. See the Application
Information section for more information.
APPLICATIONS INFORMATION
The basic LT3844 step-down (buck) application, shown
in the Typical Application on the front page, converts a
larger positive input voltage to a lower positive or negative
output voltage. This Application Information section assists
selection of external components for the requirements of
the power supply.
RSENSE Selection
The current sense resistor, RSENSE, monitors the inductor
current of the supply (See Typical Application on front
page). Its value is chosen based on the maximum required
output load current. The LT3844 current sense amplifier
has a maximum voltage threshold of, typically, 100mV.
3844fb
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LT3844
APPLICATIONS INFORMATION
Therefore, the peak inductor current is 100mV/RSENSE.
The maximum output load current, IOUT(MAX), is the peak
inductor current minus half the peak-to-peak ripple current, ΔIL.
Allowing adequate margin for ripple current and external component tolerances, RSENSE can be calculated as
follows:
RSENSE =
70mV
IOUT(MAX )
Typical values for RSENSE are in the range of 0.005Ω to
0.05Ω.
for operating frequency is that in noise-sensitive communications systems, it is often desirable to keep the
switching noise out of a sensitive frequency band. The
LT3844 uses a constant frequency architecture that can
be programmed over a 100kHz to 500kHz range with a
single resistor from the fSET pin to ground, as shown in
Figure 1. The nominal voltage on the fSET pin is 1V and
the current that flows from this pin is used to charge an
internal oscillator capacitor. The value of RSET for a given
operating frequency can be chosen from Figure 4 or from
the following equation:
RSET (kΩ) = 8 . 4 • 104 • fSW(– 1 . 31)
Table 1 lists typical resistor values for common operating
frequencies:
Operating Frequency
The choice of operating frequency and inductor value is
a trade off between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET switching losses and gate charge losses. However,
lower frequency operation requires more inductance for a
given amount of ripple current, resulting in a larger inductor size and higher cost. If the ripple current is allowed
to increase, larger output capacitors may be required to
maintain the same output ripple. For converters with high
step-down VIN-to-VOUT ratios, another consideration is
the minimum on-time of the LT3844 (see the Minimum
On-time Considerations section). A final consideration
200
Table 1. Recommended 1% Standard Values
RSET
fSW
191kΩ
100kHz
118kΩ
150kHz
80.6kΩ
200kHz
63.4kΩ
250kHz
49.9kΩ
300kHz
40.2kΩ
350kHz
33.2kΩ
400kHz
27.4kΩ
450kHz
23.2kΩ
500kHz
Step-Down Converter: Inductor Selection
180
The critical parameters for selection of an inductor are
minimum inductance value, volt-second product, saturation current and/or RMS current.
160
RSET (kΩ)
140
120
For a given ΔI, The minimum inductance value is calculated
as follows:
100
80
60
L ≥ VOUT •
40
20
0
100
200
300
400
FREQUENCY (kHz)
500
VIN(MAX ) – VOUT
fSW • VIN(MAX ) • Δ IL
600
3844 G19
fSW is the switch frequency.
Figure 1. Timing Resistor (RSET) Value
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APPLICATIONS INFORMATION
The typical range of values for ΔIL is (0.2 • IOUT(MAX)) to
(0.5 • IOUT(MAX)), where IOUT(MAX) is the maximum load
current of the supply. Using ΔIL = 0.3 • IOUT(MAX) yields a
good design compromise between inductor performance
versus inductor size and cost. A value of ΔIL = 0.3 • IOUT(MAX)
produces a ±15% of IOUT(MAX) ripple current around the DC
output current of the supply. Lower values of ΔIL require
larger and more costly magnetics. Higher values of ΔIL
will increase the peak currents, requiring more filtering
on the input and output of the supply. If ΔIL is too high,
the slope compensation circuit is ineffective and current
mode instability may occur at duty cycles greater than
50%. To satisfy slope compensation requirements the
minimum inductance is calculated as follows:
L > VOUT •
2DCMAX – 1 RSENSE • 8.33
•
DCMAX
fSW
Some magnetics vendors specify a volt-second product
in their data sheet. If they do not, consult the magnetics
vendor to make sure the specification is not being exceeded
by your design. The volt-second product is calculated as
follows:
Volt-second (μsec) =
( VIN(MAX ) – VOUT ) • VOUT
VINN(MAX ) • fSW
The magnetics vendors specify either the saturation current, the RMS current or both. When selecting an inductor
based on inductor saturation current, use the peak current through the inductor, IOUT(MAX) + ΔIL/2. The inductor
saturation current specification is the current at which
the inductance, measured at zero current, decreases by
a specified amount, typically 30%.
When selecting an inductor based on RMS current rating,
use the average current through the inductor, IOUT(MAX).
The RMS current specification is the RMS current at which
the part has a specific temperature rise, typically 40°C,
above 25°C ambient.
After calculating the minimum inductance value, the
volt-second product, the saturation current and the RMS
current for your design, select an off-the-shelf inductor.
Contact the Application group at Linear Technology for
further support.
For more detailed information on selecting an inductor,
please see the “Inductor Selection” section of Linear
Technology Application Note 44.
Step-Down Converter: MOSFET Selection
The selection criteria of the external N-channel standard
level power MOSFET include on resistance(RDS(ON)), reverse transfer capacitance (CRSS), maximum drain source
voltage (VDSS), total gate charge (QG) and maximum
continuous drain current.
For maximum efficiency, minimize RDS(ON) and CRSS.
Low RDS(ON) minimizes conduction losses while low CRSS
minimizes transition losses. The problem is that RDS(ON) is
inversely related to CRSS. Balancing the transition losses
with the conduction losses is a good idea in sizing the
MOSFET. Select the MOSFET to balance the two losses.
Calculate the maximum conduction losses of the
MOSFET:
⎛V ⎞
PCOND = (IOUT(MAX ) )2 ⎜ OUT ⎟ (RDS(ON) )
⎝ VIN ⎠
Note that RDS(ON) has a large positive temperature dependence. The MOSFET manufacturer’s data sheet contains a
curve, RDS(ON) vs Temperature.
Calculate the maximum transition losses:
PTRAN = (k)(VIN)2 (IOUT(MAX))(CRSS)(fSW)
where k is a constant inversely related to the gate driver
current, approximated by k = 2 for LT3844 applications.
The total maximum power dissipation of the MOSFET is
the sum of these two loss terms:
PFET(TOTAL) = PCOND + PTRAN
To achieve high supply efficiency, keep the PFET(TOTAL) to
less than 3% of the total output power. Also, complete
a thermal analysis to ensure that the MOSFET junction
temperature is not exceeded.
TJ = TA + PFET(TOTAL) • θJA
where θJA is the package thermal resistance and TA is the
ambient temperature. Keep the calculated TJ below the maximum specified junction temperature, typically 150°C.
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APPLICATIONS INFORMATION
Note that when VIN is high and fSW is high, the transition
losses may dominate. A MOSFET with higher RDS(ON)
and lower CRSS may provide higher efficiency. MOSFETs
with higher voltage VDSS specification usually have higher
RDS(ON) and lower CRSS.
Choose the MOSFET VDSS specification to exceed the
maximum voltage across the drain to the source of the
MOSFET, which is VIN(MAX) plus any additional ringing
on the switch node. Ringing on the switch node can be
greatly reduced with good PCB layout and, if necessary,
an RC snubber.
The internal VCC regulator is capable of sourcing up to
40mA which limits the maximum total MOSFET gate
charge, QG, to 40mA/fSW . The QG vs VGS specification is
typically provided in the MOSFET data sheet. Use QG at
VGS of 8V. If VCC is back driven from an external supply,
the MOSFET drive current is not sourced from the internal
regulator of the LT3844 and the QG of the MOSFET is not
limited by the IC. However, note that the MOSFET drive
current is supplied by the internal regulator when the
external supply back driving VCC is not available such as
during start-up or short-circuit.
The manufacturer’s maximum continuous drain current
specification should exceed the peak switch current,
IOUT(MAX) + ΔIL/2.
During the supply start-up, the gate drive levels are set by
the VCC voltage regulator, which is approximately 8V. Once
the supply is up and running, the VCC can be back driven
by an auxiliary supply such as VOUT . It is important not
to exceed the manufacturer’s maximum VGS specification.
A standard level threshold MOSFET typically has a VGS
maximum of 20V.
Step-Down Converter: Rectifier Selection
The rectifier diode (D1 on the Functional Diagram) in a
buck converter generates a current path for the inductor
current when the main power switch is turned off. The
rectifier is selected based upon the forward voltage, reverse voltage and maximum current. A Schottky diode is
recommended. Its low forward voltage yields the lowest
power loss and highest efficiency. The maximum reverse
voltage that the diode will see is VIN(MAX).
In continuous mode operation, the average diode current is calculated at maximum output load current and
maximum VIN:
IDIODE( AVG) = IOUT(MAX )
VIN(MAX ) − VOUT
VIN(MAX )
To improve efficiency and to provide adequate margin
for short-circuit operation, a diode rated at 1.5 to 2
times the maximum average diode current, IDIODE(AVG),
is recommended.
Step-Down Converter: Input Capacitor Selection
A local input bypass capacitor is required for buck converters because the input current is pulsed with fast rise and
fall times. The input capacitor selection criteria are based
on the bulk capacitance and RMS current capability. The
bulk capacitance will determine the supply input ripple
voltage. The RMS current capability is used to keep from
overheating the capacitor.
The bulk capacitance is calculated based on maximum
input ripple, ΔVIN:
CIN(BULK ) =
IOUT(MAX ) • VOUT
ΔVIN • fSW • VIN(MIN)
ΔVIN is typically chosen at a level acceptable to the user.
100mV to 200mV is a good starting point. Aluminum electrolytic capacitors are a good choice for high voltage, bulk
capacitance due to their high capacitance per unit area.
The capacitor’s RMS current is:
ICIN(RMS) = IOUT
VOUT ( VIN – VOUT )
( VIN)2
If applicable, calculate it at the worst-case condition,
VIN = 2VOUT . The RMS current rating of the capacitor
is specified by the manufacturer and should exceed the
calculated ICIN(RMS). Due to their low ESR (equivalent
series resistance), ceramic capacitors are a good choice
for high voltage, high RMS current handling. Note that the
ripple current ratings from aluminum electrolytic capacitor
manufacturers are based on 2000 hours of life. This makes
3844fb
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LT3844
APPLICATIONS INFORMATION
it advisable to further derate the capacitor or to choose a
capacitor rated at a higher temperature than required.
The combination of aluminum electrolytic capacitors and
ceramic capacitors is an economical approach to meeting the input capacitor requirements. The capacitor voltage rating must be rated greater than VIN(MAX). Multiple
capacitors may also be paralleled to meet size or height
requirements in the design. Locate the capacitor very close
to the MOSFET switch and use short, wide PCB traces to
minimize parasitic inductance.
Step-Down Converter: Output Capacitor Selection
The output capacitance, COUT , selection is based on the
design’s output voltage ripple, ΔVOUT and transient load
requirements. ΔVOUT is a function of ΔIL and the COUT
ESR. It is calculated by:
ΔVOUT
⎛
⎞
1
= ΔIL • ⎜ ESR +
(8 • fSW • COUT ) ⎟⎠
⎝
The maximum ESR required to meet a ΔVOUT design
requirement can be calculated by:
Output Voltage Programming
A resistive divider sets the DC output voltage according
to the following formula:
⎛ V
⎞
R2 = R1⎜ OUT – 1⎟
⎝ 1.231V ⎠
The external resistor divider is connected to the output
of the converter as shown in Figure 2. Tolerance of the
feedback resistors will add additional error to the output
voltage.
Example: VOUT = 12V; R1 = 10k
⎛ 12V
⎞
R2 = 10k ⎜
− 1⎟ = 87.48k − use 86.6k 1%
⎝ 1.231V ⎠
The VFB pin input bias current is typically 25nA, so use
of extremely high value feedback resistors could cause a
converter output that is slightly higher than expected. Bias
current error at the output can be estimated as:
ΔVOUT(BIAS) = 25nA • R2
Supply UVLO and Shutdown
( ΔVOUT )(L)( fSW )
ESR(MAX) =
⎛
⎞
V
VOUT • ⎜ 1 – OUT ⎟
⎝ VIN(MAX ) ⎠
Worst-case ΔVOUT occurs at highest input voltage. Use
paralleled multiple capacitors to meet the ESR requirements. Increasing the inductance is an option to lower
the ESR requirements. For extremely low ΔVOUT , an additional LC filter stage can be added to the output of the
supply. Application Note 44 has some good tips on sizing
an additional output filter.
The SHDN pin has a precision voltage threshold with
hysteresis which can be used as an undervoltage lockout
threshold (UVLO) for the power supply. Undervoltage
lockout keeps the LT3844 in shutdown until the supply
input voltage is above a certain voltage programmed by
the user. The hysteresis voltage prevents noise from falsely
tripping UVLO.
Resistors are chosen by first selecting RB. Then:
⎛ VSUPPLY(ON) ⎞
RA = RB • ⎜
– 1⎟
⎝ 1.35V
⎠
L1
VOUT
R2
VSUPPLY
COUT
RA
SHDN PIN
VFB PIN
R1
RB
3844 F02
Figure 2. Output Voltage Feedback Divider
3844 F03
Figure 3. Undervoltage Lockout Circuit
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LT3844
APPLICATIONS INFORMATION
VSUPPLY(ON) is the input voltage at which the undervoltage
lockout is disabled and the supply turns on.
Example: Select RB = 49.9kΩ, VSUPPLY(ON) = 14.5V (based
on a 15V minimum input voltage)
⎛ 14.5V ⎞
RA = 49.9k • ⎜
–1
⎝ 1.35V ⎟⎠
= 486.1k (499k resistor is selected)
If low supply current in standby mode is required, select
a higher value of RB.
The supply turn off voltage is 9% below turn on. In the
example the VSUPPLY(OFF) would be 13.2V.
If additional hysteresis is desired for the enable function,
an external positive feedback resistor can be used from
the LT3844 regulator output.
The shutdown function can be disabled by connecting the
SHDN pin to the VIN through a large value pull-up resistor.
This pin contains a low impedance clamp at 6V, so the SHDN
pin will sink current from the pull-up resistor(RPU):
V – 6V
I SHDN = IN
RPU
Because this arrangement will clamp the SHDN pin to the
6V, it will violate the 5V absolute maximum voltage rating of
the pin. This is permitted, however, as long as the absolute
maximum input current rating of 1mA is not exceeded.
Input SHDN pin currents of <100μA are recommended:
a 1M or greater pull-up resistor is typically used for this
configuration.
the CSS pin voltage enters its active region is approximated
by the following formula:
tFAULT =
CSS • 0 . 65V
50μ A
Oscillator SYNC
The oscillator can be synchronized to an external clock.
Set the RSET resistor at least 10% below the desired sync
frequency.
It is recommended that the SYNC pin be driven with a
square wave that has amplitude greater than 2V, pulse
width greater than 1ms and rise time less than 500ns. The
rising edge of the sync wave form triggers the discharge
of the internal oscillator capacitor.
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. Express
percent efficiency as:
% Efficiency = 100% - (L1 + L2 + L3 + ...)
where L1, L2, etc. are individual loss terms as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, four main contributors usually account for most
of the losses in LT3844 circuits:
1. LT3844 VIN and VCC current loss
2. I2R conduction losses
3. MOSFET transition loss
Soft-Start
4. Schottky diode conduction loss
The desired soft-start time (tSS) is programmed via the
CSS capacitor as follows:
1. The VIN and VCC currents are the sum of the quiescent
currents of the LT3844 and the MOSFET drive currents.
The quiescent currents are in the LT3844 Electrical Characteristics table. The MOSFET drive current is a result
of charging the gate capacitance of the power MOSFET
each cycle with a packet of charge, QG. QG is found in
the MOSFET data sheet. The average charging current is
calculated as QG • fSW . The power loss term due to these
currents can be reduced by backdriving VCC with a lower
voltage than VIN such as VOUT .
CSS =
2μ A • tSS
1 . 231V
The amount of time in which the power supply can withstand
a VIN, VCC or VSHDN UVLO fault condition (tFAULT) before
3844fb
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LT3844
APPLICATIONS INFORMATION
2. I2R losses are calculated from the DC resistances of the
MOSFET, the inductor, the sense resistor and the input
and output capacitors. In continuous conduction mode
the average output current flows through the inductor
and RSENSE but is chopped between the MOSFET and
the Schottky diode. The resistances of the MOSFET
(RDS(ON)) and the RSENSE multiplied by the duty cycle
can be summed with the resistances of the inductor
and RSENSE to obtain the total series resistance of the
circuit. The total conduction power loss is proportional
to this resistance and usually accounts for between 2%
to 5% loss in efficiency.
3. Transition losses of the MOSFET can be substantial with
input voltages greater than 20V. See MOSFET Selection
section.
4. The Schottky diode can be a major contributor of power
loss especially at high input to output voltage ratios (low
duty cycles) where the diode conducts for the majority
of the switch period. Lower Vf reduces the losses. Note
that oversizing the diode does not always help because
as the diode heats up the Vf is reduced and the diode
loss term is decreased.
I2R losses and the Schottky diode loss dominate at
high load currents. Other losses including CIN and
COUT ESR dissipative losses and inductor core losses
generally account for less than 2% total additional loss
in efficiency.
PCB Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation. These
items are illustrated graphically in the layout diagram of
Figure 3.
1. Keep the signal and power grounds separate. The
signal ground consists of the LT3844 SGND pin, the
Exposed Pad on the backside of the LT3844 IC and the
(–) terminal of VOUT . The signal ground is the quiet
ground and does not contain any high, fast currents.
The power ground consists of the Schottky diode anode,
the (–) terminal of the input capacitor and the ground
return of the VCC capacitor. This ground has very fast
high currents and is considered the noisy ground. The
two grounds are connected to each other only at the
(–) terminal of VOUT .
2. Use short wide traces in the loop formed by the
MOSFET, the Schottky diode and the input capacitor to
minimize high frequency noise and voltage stress from
parasitic inductance. Surface mount components are
preferred.
3. Connect the VFB pin directly to the feedback resistors
independent of any other nodes, such as the SENSE– pin.
Connect the feedback resistors between the (+) and (–)
terminals of COUT. Locate the feedback resistors in close
proximity to the LT3844 to keep the high impedance
node, VFB, as short as possible.
4. Route the SENSE– and SENSE+ traces together and
keep as short as possible.
5. Locate the VCC and BOOST capacitors in close proximity
to the IC. These capacitors carry the MOSFET driver’s
high peak currents. Place the small-signal components
away from high frequency switching nodes (BOOST, SW
and TG). In the layout shown in Figure 3, place all the
small-signal components on one side of the IC and all
the power components on the other. This helps to keep
the signal and power grounds separate.
6. A small decoupling capacitor (100pF) is sometimes
useful for filtering high frequency noise on the feedback
and sense nodes. If used, locate as close to the IC as
possible.
7. The LT3844 packaging will efficiently remove heat from
the IC through the Exposed Pad on the backside of the
part. The Exposed Pad is soldered to a copper footprint
on the PCB. Make this footprint as large as possible
to improve the thermal resistance of the IC case to
ambient air. This helps to keep the LT3844 at a lower
temperature.
8. Make the trace connecting the gate of MOSFET M1 to
the TG pin of the LT3844 short and wide.
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APPLICATIONS INFORMATION
VIN+
RA
1
VIN
BOOST
TG
RB
2
3
CSS
4
5
6
R2
RC
7
CC1
R1
8
CC2
RSET
9
LT3844
SHDN
CSS
SW
15
CIN
M1
VIN–
L1
14
RSENSE
+
D2
17
BURST_EN
VFB
CBOOST
16
VCC
PGND
13
12
COUT
CVCC
D3
VC
SENSE+
11
SYNC
SENSE–
10
VOUT
D1
–
fSET
SGND
3844 F04
Figure 4. LT3844 Layout Diagram (See PCB Layout Checklist)
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APPLICATIONS INFORMATION
Minimum On-Time Considerations (Buck Mode)
Minimum on-time, tON(MIN), is the smallest amount of time
that the LT3844 is capable of turning the top MOSFET on
and off again. It is determined by internal timing delays
and the amount of gate charge required turning on the
top MOSFET. Low duty cycle applications may approach
this minimum on-time limit and care should be taken to
ensure that:
tON =
VOUT
> tON(MIN)
VIN • fSW
where tON(MIN) is typically 350ns worst case.
If the duty cycle falls below what can be accommodated by
the minimum on-time, the LT3844 will begin to skip cycles.
The output will be regulated, but the ripple current and
ripple voltage will increase. If lower frequency operation
is acceptable, the on-time can be increased above tON(MIN)
for the same step-down ratio.
Similar to the buck converter, the typical range of values
for ΔIL is (0.2 • IL(MAX)) to (0.5 • IL(MAX)), where IL(MAX)
is the maximum average inductor current.
IL(MAX ) = IOUT(MAX ) •
VOUT
VIN(MIN)
Using ΔIL = 0.3 • IL(MAX) yields a good design compromise
between inductor performance versus inductor size and
cost.
The inductor must not saturate at the peak operating
current, IL(MAX) + ΔIL/2. The inductor saturation current
specification is the current at which the inductance, measured at zero current, decreases by a specified amount,
typically 30%.
Boost Converter Design
One drawback of boost regulators is that they cannot be
current limited for output shorts because the current steering diode makes a direct connection between input and
output. Therefore, the inductor current during an output
short circuit is only limited by the available current of the
input supply.
The LT3844 can be used to configure a boost converter
to step-up voltages to as high as hundreds of volts. An
example of a boost converter circuit schematic is shown
in the Typical Applications section. The following sections
are a guide to designing a boost converter:
After calculating the minimum inductance value and the
saturation current for your design, select an off-the-shelf
inductor. For more detailed information on selecting an
inductor, please see the “Inductor Selection” section of
Linear Technology Application Note 19.
The maximum duty cycle of the main switch is:
DCMAX =
VOUT − VIN(MIN)
VOUT
Boost Converter: Inductor Selection
The critical parameters for selection of an inductor are
minimum inductance value and saturation current. The
minimum inductance value is calculated as follows:
LMIN =
VIN(MIN)
Δ IL • fSW
• DCMAX
fSW is the switch frequency.
Boost Converter: MOSFET Selection
The selection criteria of the external N-channel standard
level power MOSFET include on resistance (RDS(ON)), reverse transfer capacitance (CRSS), maximum drain source
voltage (VDSS), total gate charge (QG) and maximum
continuous drain current.
For maximum efficiency, minimize RDS(ON) and CRSS.
Low RDS(ON) minimizes conduction losses while low
CRSS minimizes transition losses. The problem is that
RDS(ON) is inversely related to CRSS. Balancing the transition losses with the conduction losses is a good idea
in sizing the MOSFET. Select the MOSFET to balance the
3844fb
18
LT3844
APPLICATIONS INFORMATION
two losses. Calculate the maximum conduction losses of
the MOSFET:
⎛ IOUT(MAX ) ⎞
PCOND = DCMAX ⎜
• RDS(ON)
⎝ 1− DCMAX ⎟⎠
Note that RDS(ON) has large positive temperature dependence. The MOSFET manufacturer’s data sheet contains
a curve, RDS(ON) vs Temperature. Calculate the maximum
transition losses:
PTRAN =
(k )( VOUT )2 (IOUT(MAX) )(CRSS )( fSW )
(1− DCMAX )
where k is a constant inversely related to the gate driver
current, approximated by k = 2 for LT3844 applications.
The total maximum power dissipation of the MOSFET is
the sum of these two loss terms:
PFET(TOTAL) = PCOND + PTRAN
To achieve high supply efficiency, keep the PFET(TOTAL) to
less than 3% of the total output power. Also, complete
a thermal analysis to ensure that the MOSFET junction
temperature is not exceeded.
TJ = TA + PFET(TOTAL) • θJA
where θJA is the package thermal resistance and TA is the
ambient temperature. Keep the calculated TJ below the
maximum specified junction temperature, typically 150°C.
Note that when VOUT is high (>20V), the transition losses
may dominate. A MOSFET with higher RDS(ON) and lower
CRSS may provide higher efficiency. MOSFETs with higher
voltage VDSS specification usually have higher RDS(ON)
and lower CRSS.
Choose the MOSFET VDSS specification to exceed the
maximum voltage across the drain to the source of the
MOSFET, which is VOUT plus the forward voltage of the
rectifier, typically less than 1V.
The internal VCC regulator is capable of sourcing up to
40mA which limits the maximum total MOSFET gate
charge, QG, to 40mA / fSW . The QG vs VGS specification
is typically provided in the MOSFET data sheet. Use QG at
VGS of 8V. If VCC is back driven from an external supply,
the MOSFET drive current is not sourced from the internal
regulator of the LT3844 and the QG of the MOSFET is not
limited by the IC. However, note that the MOSFET drive
current is supplied by the internal regulator when the
external supply back driving VCC is not available such as
during start-up or short-circuit.
The manufacturer’s maximum continuous drain current
specification should exceed the peak switch current which is
the same as the inductor peak current, IL(MAX) + ΔIL/2.
During the supply start-up, the gate drive levels are set by
the VCC voltage regulator, which is approximately 8V. Once
the supply is up and running, the VCC can be back driven
by an auxiliary supply such as VOUT . It is important not
to exceed the manufacturer’s maximum VGS specification.
A standard level threshold MOSFET typically has a VGS
maximum of 20V.
Boost Converter: Rectifier Selection
The rectifier is selected based upon the forward voltage,
reverse voltage and maximum current. A Schottky diode
is recommended for its low forward voltage and yields the
lowest power loss and highest efficiency. The maximum
reverse voltage that the diode will see is VOUT . The average
diode current is equal to the maximum output load current,
IOUT(MAX). A diode rated at 1.5 to 2 times the maximum
average diode current is recommended. Remember boost
converters are not short-circuit protected.
Boost Converter: Output Capacitor Selection
In boost mode, the output capacitor requirements are
more demanding due to the fact that the current waveform
is pulsed instead of continuous as in a buck converter.
The choice of component(s) is driven by the acceptable
ripple voltage which is affected by the ESR, ESL and bulk
capacitance. The total output ripple voltage is:
⎛
ESR ⎞
1
ΔVOUT = IOUT(MAX ) ⎜
+
⎝ fSW • COUT 1− DCMAX ⎟⎠
where the first term is due to the bulk capacitance and the
second term due to the ESR.
3844fb
19
LT3844
APPLICATIONS INFORMATION
The choice of output capacitor is also driven by the RMS
ripple current requirement. The RMS ripple current is:
IRMS(COUT ) = IOUT(MAX ) •
VOUT − VIN(MIN)
VIN(MIN)
At lower output voltages (<30V) it may be possible to satisfy both the output ripple voltage and RMS requirements
with one or more capacitors of a single type. However, at
output voltages above 30V where capacitors with both low
ESR and high bulk capacitance are hard to find, the best
approach is to use a combination of aluminum electrolytic
and ceramic capacitors. The low ESR ceramic capacitor
will minimize the ESR while the Aluminum Electrolytic
capacitor will supply the required bulk capacitance.
Boost Converter: Input Capacitor Selection
The input capacitor of a boost converter is less critical
than the output capacitor, due to the fact that the inductor
is in series with the input and the input current waveform
is continuous. The input voltage source impedance determines the size of the input capacitor, which is typically
in the range of 10μF to 100μF. A low ESR capacitor is
recommended though not as critical as with the output
capacitor. The RMS input capacitor ripple current for a
boost converter is:
IRMS(CIN) = 0 . 3 •
VIN(MIN)
L • fSW
• DCMAX
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to
the input of the converter and solid tantalum capacitors
can fail catastrophically under these conditions. Be sure
to specify surge-tested capacitors.
Boost Converter: RSENSE Selection
The boost application in the Typical Applications section
has the location of the current sense resistor in series with
the inductor with one side referenced to VIN. This location
was chosen for two reasons. Firstly, the circulating current
is always monitored so in the case of an output overvoltage
or input overcurrent condition the main switch will skip
cycles to protect the circuitry. Secondly, the VIN node can
be considered low noise since it is heavily filtered and the
input current is not pulsed but continuous.
In the case where the input voltage exceeds the voltage
limits on the LT3844 Sense pins, the sense resistor can
be moved to the source of the MOSFET. In both cases the
resistor value is the calculated using the same formula.
The LT3844 current comparator has a maximum threshold
of 100mV/RSENSE. The current comparator threshold sets
the peak of the inductor current. Allowing adequate margin
for ripple current and external component tolerances,
RSENSE can be calculated as follows:
RSENSE =
70mV
IL(MAX )
Where IL(MAX) is the maximum average inductor current
as calculated in the Boost Converter: Inductor Selection
section.
3844fb
20
LT3844
TYPICAL APPLICATIONS
All Ceramic Capacitor Application, 24V to 3.3V at 5A, fSW = 250kHz
VIN
24V
(VOLTAGE
TRANSIENTS
UP TO 60V)
CIN
22μF
s3
R3
1M
1
2
C1
2200pF
3
4
5
SHDN
R4
10k
C2
680pF
8
TG
SW
BURST_EN
LT3844
VFB
VCC
PGND
15
13
12
11
SYNC
SENSE–
10
SGND
M1
14
SENSE+
fSET
C5
0.22μF
16
VC
7
C3
100pF
BOOST
CSS
6
R1
3.32k
R2
5.62k
VIN
L1
6.8μH
D2
IN4148
C4
2.2μF
RSENSE
0.01Ω
VOUT
3.3V
5A
D1
COUT
100μF
s2
9
3844 TA02
L1 = VISHAY, IHLP5050FD-01
M1 = VISHAY, SI7852DP
D1 = DIODES INC, PDS760
COUT = TDK, C4532X5R0J107K
CIN = TDK, C4532X7R2A225K
R5
63.4k
8V to 20V to 8V, 25W SEPIC Application
VIN
12V
CIN1
22μF
25V
s3
CIN2
1μF
25V
R4
1M
1
2
C1
3300pF
3
4
5
6
R2
54.9k
R1
10k
R5
40.2k
C2
100pF
C3
680pF
VIN
SHDN
TG
CSS
SW
BURST_EN
LT3844
VFB
VCC
PGND
14
13
12
SENSE+
11
SYNC
SENSE–
10
fSET
SGND
L1
D2
VOUT
8V
25W
15
VC
7
8
BOOST
C5
22mF
25V
s3
•
16
9
M1
C4
1μF
25V
R6
10Ω
56pF
R7
10Ω
+
L1
RSENSE
0.01Ω
•
COUT2
22μF
25V
COUT1
330μF
16V
3844 TA03
R3
49.9k
L1 = COILTRONICS, VERSAPAC VP5-0083
CIN, C5, COUT2 = TDK, C4532X7R1E226M
D2 = ONSEMI, MBRD660
COUT = SANYO OS-CON, 16SVP330M
CIN = VISHAY, Si7852DP
3844fb
21
LT3844
TYPICAL APPLICATIONS
Two Phase Spread Spectrum 24V Input to 12V, 6A Output
R3
3M
1
2
R6
270k
C1
2200pF
3
4
5
R4
4.99k
SHDN
8
CSS
SW
BURST_EN
VCC
LT3844
R22
10k
VC
SENSE+
SYNC
SENSE–
SYNC1
4
SGND
fSET
15
M1
14
13
12
L1
15μH
D1a
BAV70
C4
2.2μF
RSENSE
0.02Ω
VOUT
12V
6A
COUT
22μF
25V
D1
11
10
D1b
BAV70
9
V+
C15
0.22μF
16V
R13
3M
R21
49.9k
3
PGND
VFB
16
R5
49.9k
CIN
6.8μF
50V
s3
2
TG
7
SYNC1
C2
680pF
R2
87.5k
1
BOOST
6
R1
10k
VIN
18V
TO
36V
VIN
C5
0.22μF
16V
1
2
SET
R16
270k
10
C11
2200pF
4
9
MOD
LTC6902
8
PH
GND
DIV
OUT1
OUT2
3
5
5
VIN
SHDN
C13
47pF
SYNC2
R12
87.5k
3
R11
10k
SW
BURST_EN
VCC
LT3844
VFB
PGND
VC
SENSE+
SYNC
SENSE–
7
8
TG
CSS
6
SYNC2
BOOST
fSET
R15
49.9k
SGND
16
15
M11
14
13
12
C14
2.2μF
D11a
BAV70
RSENSE
0.02Ω
D11
11
10
L1
15μH
D11b
BAV70
9
L1, L11 = VISHAY, IHLP5050FD-01
M1, M11 = VISHAY, Si7850DP
D1, D11 = DIODES INC, PDS760
COUT = TDK, C4532X7R1E226K
CIN = TDK, C4532X7R1H685K
3844 TA04
1
OUT
VIN
LT1121-5
GND
2
3844fb
22
LT3844
PACKAGE DESCRIPTION
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BC
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
6.60 ±0.10
9
2.94
(.116)
4.50 ±0.10
6.40
2.94
(.252)
(.116)
BSC
SEE NOTE 4
0.45 ±0.05
1.05 ±0.10
0.65 BSC
1 2 3 4 5 6 7 8
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
0.25
REF
1.10
(.0433)
MAX
0° – 8°
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
FE16 (BC) TSSOP 0204
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
3844fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT3844
TYPICAL APPLICATION
12V to 48V 50W Step-Up Converter with 400kHz Switching Frequency
RSENSE
0.01Ω
D1
BAV99
1
VIN
12V
+
CIN
33μF
25V
s2
C1
0.1μF
25V
C4
4700pF
R2
383k
C2
120pF
BOOST
R4
4.7M 2
SHDN
3
CSS
4
SW
14
13
6
VC
11
SENSE+
SYNC
SENSE–
fSET
SGND
L1
6.8μH
15
VCC
BURST_EN
LT3844
12
PGND
VFB
8
C3
4700pF
TG
16
5
7
R6
40k
R1
10k
VIN
D2
C5
2.2μF
25V
M1
VOUT
48V
50W
+
COUT2
220μF
COUT1
330μF
10
9
R5
33.2k
3844 TA05
M1 = VISHAY, Si7370DP
L1 = VISHAY, IHLP5050FD-01
D2 = DIODES INC., PDS560
CIN = SANYO, 25SVP33M
COUT1 = SANYO, 63CE220FST
COUT2 = TDK, C4532X7R2A225K
RSENSE = IRC, LRF2512-01-R010-F
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3844fb
24 Linear Technology Corporation
LT 0309 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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