ON NIS6111QPT1 Bers ic (better efficiency rectifier system) Datasheet

NIS6111
BERStIC (Better Efficiency
Rectifier System)
Ultra Efficient, High Speed Diode
The NIS6111 ORing diode is a high speed, high efficiency, hybrid
rectifier, designed for low voltage, high current systems, such as
those required for today’s digital circuits. It couples a high speed
integrated circuit with a power MOSFET to create a diode with the
same forward drop characteristics as a MOSFET. It offers increased
efficiency for switching power supplies as well as in ORing diode
applications.
It offers a low on resistance that can be further reduced by the
addition of external MOSFETs. It features the highest reverse
recovery speed of any device in the industry.
Features
•
•
•
•
•
•
Low Forward Drop Improves System Efficiency
Ultra High Speed
Can be used in High Side and Low Side Configurations
24 V Rating
Allows use of External MOSFETs for Extended Current Handling
Capacity
Pb−Free Package is Available*
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MARKING
DIAGRAM
1
PLLP32
CASE 488AC
1
32
NIS6111= Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
ÇÇÇÇÇÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇÇÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇÇÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇÇÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇÇÇÇ
Ç
ÇÇ
ÇÇÇÇÇÇÇ
Ç
ÇÇÇÇÇÇ
ÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇ
Ç
ÇÇÇÇÇÇ
Ç
ÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇ
ÇÇÇÇÇÇ
Ç
PIN CONNECTIONS
4
1
Applications
•
•
•
•
Redundant Power Supplies for High−Availability Systems
Static ORing Diodes
Low Voltage, Isolated Outputs
Flyback, Forward Converter, Half Bridge Converters
PIN ASSIGNMENT
5
3
2
(Bottom View)
Cathode
Pin
Symbol
1
Anode
2
Bias
Output of Internal Voltage Regulator provides power for
internal only. No external components required at this pin.
3
Gate
Gate Driver Output for Internal and External
N−Channel MOSFET
4
Cathode
5
Reg In
NIS6111
AWLYYWWG
4
Function
Power Input Connected to System
5
3
Anode
Input of Internal Voltage Regulator
NTD110N02R
ORDERING INFORMATION
Device
NIS6111QPT1
NIS6111QPT1G
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
August, 2005 − Rev. 5
1
Equivalent Circuit
Power Output Connected to System
© Semiconductor Components Industries, LLC, 2005
Gate
Reg In
1
Package
Shipping†
PLLP32
1500 Tape & Reel
PLLP32
(Pb−Free)
1500 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NIS6111/D
NIS6111
MAXIMUM RATINGS (TJ = 25°C, unless otherwise noted.)
Symbol
Value
Unit
VRRM
24
V
Vregmax
28
V
Average Rectified Forward Current
IFAV
30
A
Non−repetitive Peak Surge Current
IFSM
90
A
Analog Die Thermal Resistance (Min Copper Area)
qA j−a
83
°C/W
MOSFET Die Thermal Resistance (Min Copper Area)
qM j−a
78
°C/W
Analog Die Thermal Resistance (Junction−to−Top of Board)
qA j−t
4.9
°C/W
MOSFET Die Thermal Resistance (Junction−to−Top of Board)
qM j−t
0.6
°C/W
Analog Die Thermal Resistance (Junction−to−Bottom of Board) (Note 4)
qA j−b
30
°C/W
MOSFET Die Thermal Resistance (Junction−to−Bottom of Board) (Note 4)
qM j−b
7.0
°C/W
Tstg
−55 to 150
°C
TJ
−40 to 125
°C
Rating
Peak Repetitive Reverse Voltage (VK to VA)
Peak Regulator Input (Reg In) Voltage
Storage Temperature Range
Operating Temperature Range
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.
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2
NIS6111
ELECTRICAL CHARACTERISTICS (TJ = 25°C, Reg In = 8.0 V, unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
RON
−
−
3.7
4.7
4.5
−
mW
Reverse Leakage Current (VR = 24 VDC)
IDSS
−
−
10
mA
Reverse Leakage Current (VR = 24 VDC, TJ = 125°C)
IDSS
−
−
100
mA
FET Turn−on Time (Imax = 3.0 A, I rev = 1.0 A, Vrev = 5.0 V)
tsat
−
45
−
ns
Turnoff Propagation
Delay Time (Vds = Voffset to ID = 0)
tpd
−
35
−
ns
VSD
−
−
0.75
0.8
−
1.2
Vdc
Supply Voltage (Pin 2 to Pin 1), Internal Bias Voltage
VCC
4.8
5.0
5.2
V
Cap Charge Time
(0.5 V Initial Charge, 5.0 V @ Reg In, to 4.5 V, C = 0.22 mF)
TJ = −40°C to 125°C
tchg
tchg
2.0
−
3.7
4.7
5.0
−
ms
ms
Headroom (for Vcap = 4.7 V)
Vhd
1.0
1.27
1.5
V
Minimum Duty Cycle for Operation (Freq = 100 kHz) (Note 5)
dmin
−
2.0
−
%
Characteristic
SYNCHRONOUS RECTIFIER
ON STATE
Conduction Mode ON Resistance
(I = 10 Adc, VGS = 5.0 V)
(I = 20 Adc, VGS = 5.0 V)
OFF STATE
SWITCHING (See Figures 1 and 3) (Note 2)
BODY DIODE
Forward On−Voltage (Notes 1 and 3)
I = 10 Adc, VGS = 0 V
I = 20 Adc, VGS = 0 V
POWER SUPPLY (VR = 20 V, TJ = 255C)
Delay Time (Tamb = 20°C)
Td
51
ns
Minimum Voltage Required for Operation (VUVLO + Vhd)
4.8
V
Minimum Voltage Required for Full Gate Drive (VCC + Vhd)
6.3
V
Reg In Voltage (Pin 5 to Pin 1)
CONTROL CIRCUIT
Bias Supply Current (VBIAS = 5.0 V)
Input Offset Voltage
Shutdown Voltage (UVLO)
Turn−on Voltage (UVLO)
1.
2.
3.
4.
5.
Pulse width v 300 ms, duty cycle v 2%.
Pulse width 2.0 ms, duty cycle t5%.
Switching characteristics are independent of operating junction temperature.
Based on 0.062″ FR4 board, double−sided 1 oz copper.
Minimum time required to recharge internal capacitor.
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3
IBIAS
0.8
1.3
1.8
mA
IOS
−
2.0
5.0
mV
VUVLO
3.35
3.55
3.65
V
VTO
3.65
3.81
3.95
V
NIS6111
Vrev
Reg In
Cathode
Vsat
Vfwd
tsat
Voltage
Regulator
Imax
Bias
trev
−
+
Gate
Irev
Figure 2. Functional Block Diagram
1.8
ID = 55 A
VGS = 4.5 V
1.6
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
Figure 1. Switching Waveform
Anode
1.4
1.2
1.0
0.8
0.6
−50
−25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (°C)
Figure 3. Synchronous Buck Turn Off Delay
Figure 4. On−Resistance Variation with Temperature
1.6
70
1.4
HEADROOM VOLTAGE (V)
80
DELAY TIME (nS)
60
50
40
30
20
10
0
−40
−20
0
20
40
60
80
100
1.2
1.0
0.8
0.6
0.4
0.2
0
−40
120
TEMPERATURE (°C)
−20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 6. Headroom versus Temperature
Figure 5. Delay Time versus Temperature
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4
120
NIS6111
85
80
75
JA (A) − (A) Heated
qJA (C/W)
70
65
60
JA (M) − (M) Heated
55
50
45
40
0
500
1000
1500
2000
2500
3000
3500
COPPER AREA
4000
4500
5000
5500
6000
(mm2)
Figure 7. Thermal Resistance vs. Copper Area for MOSFET (M) and Analog Die (A)
5.15 V
Load
Source 1
I2
15 V
5.2 V
Source 2
Figure 8. Test Circuit for Short Circuit ORing Test
18 V
Figure 9. Waveforms from Short Circuit ORing Test
Reg In
Anode
Cathode
Load
Gate
Load
5.0 V
12 V
Reg In
NTD110N02R
Cathode
Figure 10. Positive ORing Diode Connection with
Additional External FETs
Anode
Figure 11. Negative ORing Diode Connection
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5
NIS6111
OPERATING DESCRIPTION
Introduction
maximum charge voltage is reached, the switch is turned
off. If there is not sufficient reverse voltage to maintain a
5.0 V charge on the capacitor, the bias supply will charge
it to within 1.0 V of the reverse voltage.
The Regulator Input pin can be connected to the cathode
and will recharge the internal capacitor when the BERS is
reversed biased. This input requires a minimum voltage of
4.7 V to operate. In some cases this amount of reverse
voltage may not be available. When this is the case, the
Reg In pin can be connected to a higher voltage source. It
is not necessary that this source be synchronous with the
cathode voltage.
The Reg In voltage should not be allowed to go more
negative than the anode of the device. If this scenario can
occur, a small switching diode should be placed in series
with the Reg In pin.
The BERS rectifier offers a new concept in rectification
for low voltage, high current outputs. This product
combines a high speed integrated circuit with a power
MOSFET, to create a device with speeds better than an
ultrafast silicon rectifier, and a forward drop that is less than
that of a Schottky diode.
This device is specifically designed for the low voltage
outputs required by today’s digital circuits. Current digital
products operate on voltages of less than 5.0 V and currents
in the tens to hundreds of amperes. BERS can greatly
increase the efficiency of low voltage, high current
converters, by reducing the rectifier drop to several
hundred millivolts.
This device consists of four major circuits as well as a
capacitor. BERS contains a power supply to regulate the
voltage on the bias supply cap, a high speed comparator to
sense the conduction state of the device, a high speed
driver, a power FET and a capacitor.
Comparator/Driver
The polarity comparator is a medium gain, ultra high
speed design. It is integrated with the driver circuit, to
optimize the switching speed of the device. The
comparator input has a low offset voltage which biases the
inverting input several millivolts above ground. This is to
assure that at zero (or very low) current levels, the device
is off.
Bias Supply
The internal bias supply is a high current, switching
regulator. It will maintain a regulated voltage on the
internal capacitor as long as sufficient voltage is available
at the Reg In pin. When this pin is high, a current limited
switch allows current to charge the capacitor. When the
Reg In
Cathode
Bias
UVLO
+
−
Cap
−
+
Power Supply
Comparator and Driver
Figure 12. Detailed Block Diagram
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6
FET
NIS6111
PACKAGE DIMENSIONS
PLLP32
CASE 488AC−01
ISSUE A
D
A
ÇÇÇÇ
ÇÇÇÇ
ÇÇÇÇ
ÇÇÇÇ
THERMAL #1
INDEX AREA
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO METALLIZED
TERMINAL AND IS MEASURED BETWEEN
0.25 MM AND 40 MM FROM TERMINAL TIP
4. UNILATERAL COPLANARITY ZONE APPLIES
TO THE EXPOSED HEAT SINK SLUG AS
WELL AS THEIR TERMINALS.
E
0.15 C
2X
B
TOP VIEW
0.15 C
2X
A3
0.10 C
A
0.08 C
A1
SIDE VIEW
D2
D1
F1
0.10
M
32X b
C A B
0.05
M
C
C
F1
F2
ÇÇÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇÇÇ
Ç
Ç
ÇÇÇÇÇ
ÇÇÇÇÇÇÇ
Ç
Ç
ÇÇÇÇÇ
ÇÇÇÇÇÇÇ
ÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇÇÇ
ÇÇ
Ç
Ç
F1
8
7
6
5
e
4
3
2
L2
L1
L
E2
17
18
19
E1
20
21
22
23
2X H
24
#1
L3
K
9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
D4
D3
J
G
L
D5
BOTTOM VIEW
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7
DIM
A
A1
A3
b
D
D1
D2
D3
D4
D5
E
E1
E2
e
F1
F2
G
H
J
K
L
L1
L2
L3
MILLIMETERS
MIN
NOM
MAX
1.750 1.850 1.950
0.000
−−−− 0.050
0.254 REF
0.350 0.400 0.450
9.000 BSC
5.987 6.087 6.187
1.924 2.024 2.124
2.713 2.813 2.913
1.584 1.684 1.784
3.547 3.647 3.747
9.000 BSC
4.472 4.572 4.672
0.638 0.738 0.838
0.800 BSC
1.500 REF
1.324 1.424 1.524
2.700 2.800 2.900
2.000 REF
1.016 BSC
0.381 REF
0.500 0.600 0.700
0.062 0.162 0.262
0.760 0.770 0.870
0.281 0.381 0.481
NIS6111
BERS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
The product described herein (NIS6111), may be covered by U.S. patents including 6,271,712. There may be other patents pending.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your
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NIS6111/D
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