PCA EP9733-30 8 pin sil 5 tap ttl compatible active delay line Datasheet

8 Pin SIL 5 Tap TTL Compatible Active Delay Lines
TAP DELAYS
±5% or ±2 nS†
1.0
1.5
2.0
2.5
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
12.0
± 0.5
± 0.5
±1
±1
±1
± 1.5
TOTAL DELAYS
±5% or ±2 nS†
*4 ± 0.5
*6 ± 0.5
*8 ± 1.0
*10
*12
*16
*20
30
35
40
45
50
60
Part
Number
Pkg. A
Part
Number
Pkg. B
TAP DELAYS
±5% or ±2 nS†
EP9677-4
EP9677-6
EP9677-8
EP9677-10
EP9677-12
EP9677-16
EP9677-20
EP9677-30
EP9677-35
EP9677-40
EP9677-45
EP9677-50
EP9677-60
EP9733-4
EP9733-6
EP9733-8
EP9733-10
EP9733-12
EP9733-16
EP9733-20
EP9733-30
EP9733-35
EP9733-40
EP9733-45
EP9733-50
EP9733-60
TOTAL DELAYS
±5% or ±2 nS†
15
20
25
30
35
40
50
60
70
80
90
100
75
100
125
150
175
200
250
300
350
400
450
500
Part
Number
Pkg. A
Part
Number
Pkg. B
EP9677-75
EP9677-100
EP9677-125
EP9677-150
EP9677-175
EP9677-200
EP9677-250
EP9677-300
EP9677-350
EP9677-400
EP9677-450
EP9677-500
EP9733-75
EP9733-100
EP9733-125
EP9733-150
EP9733-175
EP9733-200
EP9733-250
EP9733-300
EP9733-350
EP9733-400
EP9733-450
EP9733-500
†Whichever is greater.
Delay times referenced from input to leading edges at 25°C, 5.0V, with no load.
*Delay times referenced from 1st tap
1st tap is the inherent delay: approx. 7 nS
DC Electrical Characteristics
Parameter
Test Conditions
VOH
VOL
VIK
IIH
Schematic
Min Max Unit
High-Level Output Voltage
Low-Level Output Voltage
Input Clamp Voltage
High-Level Input Current
VCC = min. VIL = max. I OH = max
VCC = min. VIH = min. I OL= max
VCC = min. II = IIK
VCC = max. VIN = 2.7V
VCC = max. VIN = 5.25V
IIL
Low-Level Input Current
VCC = max. VIN = 0.5V
IOS
Short Circuit Output Current VCC = max. VOUT = 0.
(One output at a time)
I CCH High-Level Supply Current VCC = max. VIN = OPEN
I CCL Low-Level Supply Current
VCC = max. VIN = 0
TRO Output Rise Time
Td ≤ 500 nS (0.75 to 2.4 Volts)
NH
Fanout High-Level Output
VCC = max. VOH = 2.7V
NL
Fanout Low-Level Output
VCC = max. VOL = 0.5V
Recommended
Operating Conditions
VCC
VIH
VIL
IIK
IOH
IOL
PW*
d*
TA
Supply Voltage
High-Level Input Voltage
Low-Level Input Voltage
Input Clamp Current
High-Level Output Current
Low-Level Output Current
Pulse Width of Total Delay
Duty Cycle
Operating Free-Air Temperature
2.7
-40
0.5
-1.2V
50
1.0
-2
-100
V
V
V
µA
mA
mA
mA
1
3
VCC
4
5
6
8
GROUND
Package Dimensions
Min
Max
Unit
4.75
2.0
5.25
V
V
V
mA
mA
mA
%
%
°C
0.8
-18
-1.0
20
40
0
40
+70
.820 Max.
.300 Max.
PCA
EP9677-4
Date Code
Pkg. A
Pkg. B
.190
Max
.190
.
Max
.015
Min.
.150 Min.
Input Pulse Test Conditions @ 25° C
VCC
DSD9677
Pulse Input Voltage
Pulse Width % of Total Delay
Pulse Rise Time (0.75 - 2.4 Volts)
Pulse Repetition Rate @ Td ≤ 200 nS
Pulse Repetition Rate @ Td > 200 nS
Supply Voltage
Unit
3.2
110
2.0
1.0
100
5.0
.020
Typ.
.100 Typ.
Volts
%
nS
MHz
KHz
Volts
.010
Typ.
C
L
.010
Typ.
.065
Typ.
QAF-CSO1 Rev. B 8/25/94
Rev. A 2/5/96
Unless Otherwise Noted Dimensions in Inches
Tolerances:
Fractional = ± 1/32
.XX = ± .030
.XXX = ± .010
OUTPUT
INPUT 2
115
mA
115
mA
4
nS
20 TTL LOAD
10 TTL LOAD
*These two values are inter-dependent.
EIN
PW
TRI
PRR
7
ELECTRONICS
INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: (818) 892-0761
FAX: (818) 894-5791 31
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