ON NCP706MX21TAG 1a, 1% precision very low dropout voltage regulator with enable Datasheet

NCP706
1A, 1% Precision Very Low
Dropout Voltage Regulator
with Enable
The NCP706 is a Very Low Dropout Regulator which provides up to
1 A of load current and maintains excellent output voltage accuracy of
1% including line, load and temperature variations. The operating
input voltage range from 2.4 V up to 5.5 V makes this device suitable
for Li−ion battery powered products as well as post−regulation
applications. The product is available in 2.1 V and 2.2 V fixed output
voltage options. NCP706 is fully protected against overheating and
output short circuit.
Very small 8−pin XDFN8 1.6 x 1.2, 04P package makes the device
especially suitable for space constrained portable applications such as
tablets and smartphones.
Features
• Operating Input Voltage Range: 2.4 V to 5.5 V
• Fixed Output Voltage Option: 2.1 V, 2.2 V
•
•
•
•
•
•
•
•
•
MARKING
DIAGRAM
XXMG
G
XDFN8
CASE 711AS
XX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(*Note: Microdot may be in either location)
Other Output Voltage Options available on request.
Low Quiescent Current of typ. 200 mA
Very Low Dropout: 300 mV Max. at IOUT = 1 A
±1% Accuracy Over Load/Line/Temperature
High PSRR: 60 dB at 1 kHz
Internal Soft−Start to Limit the Inrush Current
Thermal Shutdown and Current Limit Protections
Stable with a 4.7 mF Ceramic Output Capacitor
Available in XDFN8 1.6 x 1.2, 04P 8−pin package
These are Pb−Free Devices
PIN CONNECTION
OUT 1
8 IN
OUT 2
7 IN
N/C 3
6 EN
SNS 4
5 GND
(Top View)
Typical Applications
•
•
•
•
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Tablets, Smartphones,
Wireless Handsets, Portable Media Players
Portable Medical Equipment
Other Battery Powered Applications
IN 8
1 OUT
IN 7
2 OUT
EN 6
3 N/C
GND 5
4 SNS
(Bottom View)
VIN = 2.4 (2.5) − 5.5 V
VOUT = 2.1 (2.2) V @ 1 A
IN
CIN
EN
ON
OFF
OUT
NCP706
SNS
GND
ORDERING INFORMATION
See detailed ordering and shipping information on page 11 of
this data sheet.
COUT
4.7 mF
Ceramic
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2013
July, 2013 − Rev. 2
1
Publication Order Number:
NCP706/D
NCP706
Figure 2. Simplified Internal Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
XDFN8
Pin Name
1
OUT
2
OUT
3
N/C
Not connected. This pin can be tied to ground to improve thermal dissipation.
4
SNS
Remote sense connection. This pin should be connected to the output voltage rail.
5
GND
Power supply ground.
6
EN
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator
into shutdown mode.
7
IN
Input pin. A small capacitor is needed from this pin to ground to assure stability.
8
IN
−
Exposed
Pad
Description
Regulated output voltage. A minimum 4.7 mF ceramic capacitor is needed from this pin to ground to
assure stability.
This pad enhances thermal performance and is electrically connected to GND. It is recommended
that the exposed pad is connected to the ground plane on the board or otherwise left open.
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2
NCP706
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 V to 6 V
V
Output Voltage
VOUT
−0.3 V to VIN + 0.3 V
V
Enable Input
VEN
−0.3 V to VIN + 0.3 V
V
Output Short Circuit Duration
tSC
Indefinite
s
TJ(MAX)
125
°C
Input Voltage (Note 1)
Maximum Junction Temperature
Storage Temperature
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latch−up Current Maximum Rating tested per JEDEC standard: JESD78
THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, XDFN8 1.6x1.2, 04P
Thermal Resistance, Junction−to−Air
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3
Symbol
Value
Unit
RqJA
160
°C/W
NCP706
ELECTRICAL CHARACTERISTICS − VOLTAGE VERSION 2.1 V
−40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 0.3 V or 2.4 V, whichever is greater; IOUT = 10 mA, CIN = COUT = 4.7 mF, VEN = 0.9 V, unless
otherwise noted. Typical values are at TJ = +25°C. (Note 3)
Test Conditions
Parameter
Operating Input Voltage
Symbol
Min
VIN
2.4
UVLO
1.2
2.079
Typ
Max
Unit
5.5
V
1.6
1.9
V
2.10
2.121
Undervoltage lock−out
VIN rising
Output Voltage Accuracy
VOUT + 0.3 V ≤ VIN ≤ 4.5 V, IOUT = 0 – 1 A
VOUT
Line Regulation
VOUT + 0.3 V ≤ VIN ≤ 4.5 V, IOUT = 10 mA
RegLINE
2
mV
Load Regulation
IOUT = 0 mA to 1 A
RegLOAD
2
mV
Load Transient
IOUT = 10 mA to 1A or 10 mA to 1 A in 10 ms,
COUT = 10 mF
TranLOAD
±120
mV
Dropout voltage (Note 4)
IOUT = 1 A, VOUT(nom) = 2.1 V
VDO
Output Current Limit
VOUT = 90% VOUT(nom)
ICL
Quiescent current
IOUT = 0 mA
IQ
180
Ground current
IOUT = 1 A
IGND
200
Shutdown current
VEN ≤ 0 V, VIN = 2.0 to 5.5 V
Reverse Leakage Current
in Shutdown
VIN = 5.5 V, VOUT = VOUT(NOM),
VEN < 0.4 V
EN Pin High Threshold
EN Pin Low Threshold
VEN Voltage increasing
VEN Voltage decreasing
EN Pin Input Current
VEN = 5.5 V
IEN
Turn−on Time
COUT = 4.7 mF,
from assertion EN pin to 98% Vout(nom)
tON
Power Supply Rejection Ratio
VIN = 2.6 V,
VOUT = 2.1 V
IOUT = 0.5 A
Output Noise Voltage
VOUT = 2.1 V, VIN = 2.6 V, IOUT = 0.5 A
f = 100 Hz to 100 kHz
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
1.1
IREV
VEN_HI
VEN_LO
f = 100 Hz
f = 1 kHz
f = 10 kHz
300
V
mV
A
230
mA
mA
0.1
1
mA
1.5
5
mA
0.4
V
V
500
nA
0.9
100
ms
200
PSRR
60
60
40
dB
VNOISE
280
mVrms
Temperature increasing from TJ = +25°C
TSD
160
°C
Temperature falling from TSD
TSDH
−
20
−
°C
3. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at
TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
4. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 0.3 V.
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NCP706
ELECTRICAL CHARACTERISTICS − VOLTAGE VERSION 2.2 V
−40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 0.3 V or 2.5 V, whichever is greater; IOUT = 10 mA, CIN = COUT = 4.7 mF, VEN = 0.9 V, unless
otherwise noted. Typical values are at TJ = +25°C. (Note 5)
Test Conditions
Parameter
Operating Input Voltage
Symbol
Min
VIN
2.5
UVLO
1.2
2.178
Typ
Max
Unit
5.5
V
1.6
1.9
V
2.2
2.222
Undervoltage lock−out
VIN rising
Output Voltage Accuracy
VOUT + 0.3 V ≤ VIN ≤ 4.5 V, IOUT = 0 – 1 A
VOUT
Line Regulation
VOUT + 0.3 V ≤ VIN ≤ 4.5 V, IOUT = 10 mA
RegLINE
2
mV
Load Regulation
IOUT = 0 mA to 1 A
RegLOAD
2
mV
Load Transient
IOUT = 10 mA to 1A or 10 mA to 1 A in 10 ms,
COUT = 10 mF
TranLOAD
±120
mV
Dropout voltage (Note 6)
IOUT = 1 A, VOUT(nom) = 2.2 V
VDO
Output Current Limit
VOUT = 90% VOUT(nom)
ICL
Quiescent current
IOUT = 0 mA
IQ
180
Ground current
IOUT = 1 A
IGND
200
Shutdown current
VEN ≤ 0 V, VIN = 2.0 to 5.5 V
EN Pin High Threshold
EN Pin Low Threshold
VEN Voltage increasing
VEN Voltage decreasing
EN Pin Input Current
VEN = 5.5 V
IEN
100
Turn−on Time
COUT = 4.7 mF, from assertion EN pin to 98%
Vout(nom)
tON
200
ms
Power Supply Rejection Ratio
VIN = 3.2 V, VOUT = 2.2 V
IOUT = 0.5 A
f = 100 Hz
f = 1 kHz
f = 10 kHz
PSRR
55
70
60
dB
Output Noise Voltage
VOUT = 2.2 V, VIN = 2.7 V, IOUT = 0.5 A
f = 100 Hz to 100 kHz
VNOISE
300
mVrms
Thermal Shutdown Temperature
Temperature increasing from TJ = +25°C
TSD
160
°C
Thermal Shutdown Hysteresis
Temperature falling from TSD
TSDH
300
1.1
0.9
−
mV
A
0.1
VEN_HI
VEN_LO
V
230
mA
1
0.4
20
mA
500
−
mA
V
nA
°C
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at TJ = TA =
25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
6. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 0.3 V.
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5
NCP706
TYPICAL CHARACTERISTICS
VIN = 2.4 V
IOUT = 10 mA
COUT = 4.7 mF
VOUT(NOM) = 2.1 V
2.098
2.096
2.094
2.092
OUTPUT VOLTAGE (V)
2.090
−40
−20
0
20
40
60
80
100
2.196
2.192
2.188
2.184
−40
120
40
60
80
100
Figure 4. Output Voltage vs. Temperature
2.0
1.6
VIN = VEN
TA = 25°C
COUT = 4.7 mF
VOUT(NOM) = 2.1 V
1.2
0.8
IOUT = 10 mA
IOUT = 50 mA
IOUT = 250 mA
IOUT = 500 mA
0.4
1.0
2.0
3.0
4.0
120
1.6
VIN = VEN
TA = 25°C
COUT = 4.7 mF
VOUT(NOM) = 2.2 V
1.2
0.8
IOUT = 10 mA
IOUT = 50 mA
IOUT = 250 mA
IOUT = 500 mA
0.4
0.0
5.0
0.0
1.0
2.0
3.0
4.0
5.0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 5. Output Voltage vs. Input Voltage
Figure 6. Output Voltage vs. Input Voltage
QUIESCENT CURRENT (mA)
240
IOUT = 0
COUT = 4.7 mF
VOUT(NOM) = 2.1 V
TA = 125°C
220
TA = 25°C
200
TA = −40°C
180
160
140
20
Figure 3. Output Voltage vs. Temperature
2.0
240
0
TEMPERATURE (°C)
2.4
0.0
−20
TEMPERATURE (°C)
260
QUIESCENT CURRENT (mA)
2.200
2.4
0.0
VIN = 2.5 V
IOUT = 10 mA
COUT = 4.7 mF
VOUT(NOM) = 2.2 V
2.204
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
2.100
2.208
OUTPUT VOLTAGE (V)
2.102
2.0
2.5
3.0
3.5
4.0
4.5
5.0
200
TA = 125°C
180
TA = 25°C
160
TA = −40°C
140
120
5.5
IOUT = 0
COUT = 4.7 mF
VOUT(NOM) = 2.2 V
220
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 7. Quiescent Current vs. Input Voltage
Figure 8. Quiescent Current vs. Input Voltage
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NCP706
TYPICAL CHARACTERISTICS
260
VIN = 2.4 V
VIN = 4.0 V
VIN = 5.5 V
240
VIN = 3.0 V
VIN = 5.0 V
GROUND CURRENT (mA)
GROUND CURRENT (mA)
260
220
200
180
COUT = 4.7 mF
TA = 25°C
VOUT(NOM) = 2.1 V
160
140
0.0
0.1
0.2
0.3 0.4 0.5 0.6 0.7
OUTPUT CURRENT (A)
0.8
0.9
200
180
COUT = 4.7 mF
TA = 25°C
VOUT(NOM) = 2.2 V
160
0.0
Figure 9. Ground Current vs. Output Current
1.8
1.6
1.4
SHORT CURRENT LIMIT (A)
SHORT CURRENT LIMIT (A)
0.2
0.3 0.4 0.5 0.6 0.7
OUTPUT CURRENT (A)
0.8
0.9 1.0
1.8
VOUT = 0
VEN = VIN
COUT = 4.7 mF
TA = 25°C
VOUT(NOM) = 2.1 V
1.2
1
0.8
0.6
2.0
2.5
3.0
3.5
4.0
4.5
5.0
1.4
1.2
1.0
0.8
0.6
2.0
3.5
4.0
4.5
5.0
Figure 11. Short Current Limitation vs. Input
Voltage
Figure 12. Short Current Limitation vs. Input
Voltage
DROPOUT VOLTAGE (V)
25°C
0.15
−40°C
0.10
0.05
0.2
0.4
0.6
0.8
VEN = VIN
COUT = 4.7 mF
VOUT(NOM) = 2.2 V
0.30
125°C
0.20
0
3.0
INPUT VOLTAGE (V)
0.35
0.25
2.5
INPUT VOLTAGE (V)
VEN = VIN
COUT = 4.7 mF
VOUT(NOM) = 2.1 V
0.30
0.00
VOUT = 0
VEN = VIN
COUT = 4.7 mF
TA = 25°C
VOUT(NOM) = 2.2 V
1.6
0.4
5.5
0.35
DROPOUT VOLTAGE (V)
0.1
Figure 10. Ground Current vs. Output Current
2
0.4
VIN = 3.0 V
VIN = 5.0 V
220
140
1.0
VIN = 2.5 V
VIN = 4.0 V
VIN = 5.5 V
240
0.25
125°C
0.20
25°C
0.15
−40°C
0.10
0.05
0.00
1
5.5
0
0.2
0.4
0.6
0.8
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
Figure 13. Dropout Voltage vs. Output Current
Figure 14. Dropout Voltage vs. Output Current
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1
NCP706
3.0
2.5
VIN = 2.6 V + 200 VPP Modulation
IOUT = 500 mA
TA = 25°C
VOUT(NOM) = 2.1 V
80
2.0
1.5
60
40
1.0
COUT = 22 mF
COUT = 10 mF
COUT = 4.7 mF
20
0.5
0.0
VOUT(NOM) = 2.1 V
VOUT(NOM) = 2.2 V
0.0
1.0
2.0
3.0
4.0
0
0.1
5.0
FORCED OUTPUT VOLTAGE (V)
10
FREQUENCY (kHz)
Figure 15. Reverse Leakage Current in
Shutdown
Figure 16. PSRR vs. Frequency & Output
Capacitor
100
1
100
VIN = 2.7 V + 200 VPP Modulation
IOUT = 500 mA
TA = 25°C
VOUT(NOM) = 2.2 V
80
80
70
60
40
100
1000
VIN = 3.7 V + 200 VPP Modulation
COUT = 4.7 mF
TA = 25°C
VOUT(NOM) = 2.1 V
90
PSRR (dB)
PSRR (dB)
100
VIN = 5.5 V
VEN = 0
CIN = COUT = 4.7 mF
TA = 25°C
PSRR (dB)
REVERSE LEAKAGE CURRENT IN
SHUTDOWN (mA)
3.5
60
50
40
30
20
0
20
COUT = 22 mF
COUT = 10 mF
COUT = 4.7 mF
0.1
1
10
100
0
1000
0
10
Figure 18. PSRR vs. Frequency & Output
Current
2.5
VIN = 3.2 V + 200 VPP Modulation
COUT = 4.7 mF
TA = 25°C
VOUT(NOM) = 2.2 V
IOUT = 10 mA
IOUT = 100 mA
IOUT = 500 mA
0.1
100
Figure 17. PSRR vs. Frequency & Output
Capacitor
OUTPUT NOISE DENSITY (mV/√Hz)
PSRR (dB)
1.0
FREQUENCY (kHz)
60
20
0.1
FREQUENCY (kHz)
80
40
IOUT = 10 mA
IOUT = 100 mA
IOUT = 500 mA
10
1
10
FREQUENCY (kHz)
100
1000
Figure 19. PSRR vs. Frequency & Output
Current
1000
IOUT = 500 mA
VIN = 2.7 V
TA = 25°C
VOUT(NOM) = 2.1 V
2.0
1.5
1.0
0.5
0.0
0.01
COUT = 4.7 mF
COUT = 10 mF
0.1
1
10
FREQUENCY (kHz)
100
1000
Figure 20. Output Noise Density vs. Frequency
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NCP706
TYPICAL CHARACTERISTICS
OUTPUT NOISE DENSITY (mV/√Hz)
2.5
IOUT = 500 mA
VIN = 2.6 V
TA = 25°C
VOUT(NOM) = 2.2 V
2.0
1.5
1.0
0.5
0.0
0.01
COUT = 4.7 mF
COUT = 10 mF
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 21. Output Noise Density vs. Frequency
Figure 22. Turn−on by Coupled Input and
Enable Pins
Figure 23. Turn−on by Coupled Input and
Enable Pins
Figure 24. Turn−on by Enable Signal
Figure 25. Turn−on by Enable Signal
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NCP706
TYPICAL CHARACTERISTICS
Figure 26. Line Transient Response
Figure 27. Line Transient Response
Figure 28. Load Transient Response
Figure 29. Load Transient Response
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NCP706
APPLICATIONS INFORMATION
Input Decoupling (Cin)
Thermal
A 4.7 mF capacitor either ceramic or tantalum is
recommended and should be connected as close as possible
to the pins of NCP706 device. Higher values and lower ESR
will improve the overall line transient response.
As power across the NCP706 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature rise for the part.
This is stating that when the NCP706 has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation.
The power dissipation across the device can be roughly
represented by the equation:
Output Decoupling (Cout)
The minimum decoupling value is 4.7 mF and can be
augmented to fulfill stringent load transient requirements.
The regulator accepts ceramic chip capacitors MLCC. If a
tantalum capacitor is used, and its ESR is large, the loop
oscillation may result. Larger values improve noise
rejection and PSRR.
P D + ǒV IN * V OUTǓ * I OUT [W]
Enable Operation
(eq. 1)
The maximum power dissipation depends on the thermal
resistance of the case and circuit board, the temperature
differential between the junction and ambient, PCB
orientation and the rate of air flow.
The maximum allowable power dissipation can be
calculated using the following equation:
The enable pin EN will turn on or off the regulator. These
limits of threshold are covered in the electrical specification
section of this data sheet. If the enable is not used then the
pin should be connected to VIN.
Hints
P MAX + ǒT J * T AǓńq JA [W]
Please be sure the Vin and GND lines are sufficiently wide.
If their impedance is high, noise pickup or unstable
operation may result.
Set external components, especially the output capacitor,
as close as possible to the circuit.
The sense pin SNS trace is recommended to be kept as far
from noisy power traces as possible and as close to load as
possible.
(eq. 2)
Where (TJ − TA) is the temperature differential between
the junction and the surrounding environment and qJA is the
thermal resistance from the junction to the ambient.
Connecting the exposed pad and non connected pin 3 to
a large ground pad or plane helps to conduct away heat and
improves thermal relief.
ORDERING INFORMATION
Nominal Ooutput
Voltage
Marking
Package
Shipping†
NCP706MX21TAG
2.1 V
QM
XDFN8
(Pb−Free)
3000 / Tape & Reel
NCP706MX22TAG
2.2 V
QR
XDFN8
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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NCP706
PACKAGE DIMENSIONS
XDFN8 1.6x1.2, 0.4P
CASE 711AS
ISSUE O
D
L1
DETAIL A
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
0.10 C
0.10 C
TOP VIEW
MOLD CMPD
DETAIL B
ALTERNATE
CONSTRUCTION
A
DETAIL B
A3
A1
8X
C
SIDE VIEW
DETAIL A
SEATING
PLANE
1.44
PACKAGE
OUTLINE
D2
1
MILLIMETERS
MIN
MAX
0.35
0.45
0.00
0.05
0.125 REF
0.13
0.23
1.60 BSC
1.20
1.40
1.20 BSC
0.20
0.40
0.40 BSC
0.15
0.25
0.05 REF
RECOMMENDED
MOUNTING FOOTPRINT*
0.08 C
NOTE 3
DIM
A
A1
A3
b
D
D2
E
E2
e
L
L1
ÉÉ
ÇÇ
EXPOSED Cu
0.10 C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
ALTERNATE TERMINAL
CONSTRUCTIONS
E
PIN ONE
IDENTIFIER
2X
L
L
A
B
8X
0.35
1.40
4
E2
0.44
8X
1
0.26
0.40
PITCH
DIMENSIONS: MILLIMETERS
8X
L
8
5
e
e/2
8X
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
b
0.10 C A
B
0.05 C
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
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