IK Semicon IW4528BDW Dual monostable multivibrator high-voltage silicon-gate cmo Datasheet

TECHNICAL DATA
Dual Monostable Multivibrator
IW4528B
High-Voltage Silicon-Gate CMOS
The IW4528B is a dual, retriggerable, resettable monostable
multivibrator. It may be triggered from either edge of an input pulse, and
produces an output pulse over a wide range of widths, the duration of
which is determined by the external timing components CX and RX.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4528BN Plastic
IW4528BDW SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=VCC
PIN 1, PIN 8, PIN 15 = GND
Rev. 00
IW4528B
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
-0.5 to +20
V
VCC
DC Supply Voltage (Referenced to GND)
VIN
DC Input Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
VOUT
IIN
DC Input Current, per Pin
±10
mA
PD
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
PD
Power Dissipation per Output Transistor
100
mW
-65 to +150
°C
265
°C
Tstg
TL
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VIN, VOUT
TA
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
Max
Unit
3.0
18
V
0
VCC
V
-55
+125
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or
VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
Rev. 00
IW4528B
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC
Symbol
Parameter
VIH
Minimum High-Level
Input Voltage
V
≥-55°C
25°C
≤125
°C
Unit
VOUT= 0.5 V or VCC - 0.5V
VOUT= 1.0 V or VCC - 1.0 V
VOUT= 1.5 V or VCC - 1.5V
5.0
10
15
3.5
7
11
3.5
7
11
3.5
7
11
V
VIL
Maximum Low -Level VOUT= 0.5 V or VCC - 0.5V
Input Voltage
VOUT= 1.0 V or VCC - 1.0 V
VOUT= 1.5 V or VCC - 1.5V
5.0
10
15
1.5
3
4
1.5
3
4
1.5
3
4
V
VOH
Minimum High-Level
Output Voltage
VIN=GND or VCC
5.0
10
15
4.95
9.95
14.95
4.95
9.95
14.95
4.95
9.95
14.95
V
VOL
Maximum Low-Level
Output Voltage
VIN=GND or VCC
5.0
10
15
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
IIN
Maximum Input
Leakage Current
VIN= GND or VCC
18
±0.1
±0.1
±1.0
µA
ICC
Maximum Quiescent
Supply Current
(per Package)
VIN= GND or VCC
5.0
10
15
5
10
20
5
10
20
150
300
600
µA
IOL
Minimum Output Low VIN= GND or VCC
(Sink) Current
UOL=0.4 V
UOL=0.5 V
UOL=1.5 V
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.36
0.9
2.4
Minimum Output
VIN= GND or VCC
High (Source) Current UOH=4.6 V
UOH=9.5 V
UOH=13.5 V
5.0
10
15
-0.64
-1.6
-4.2
-0.51
-1.3
-3.4
-0.36
-0.9
-2.4
IOH
Test Conditions
Guaranteed Limit
mA
mA
Rev. 00
IW4528B
AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
VCC
Symbol
V
≥-55°C
25°C
≤125°C
Unit
Maximum ClockFrequency, (Figure 1)
5.0
10
15
1.5
3
4
1.5
3
4
0.75
1.5
2
MHz
tPHL, tPLH
Maximum Propagation Delay, Clock or Enable
to Output (Figures 1,3)
5.0
10
15
560
230
160
560
230
160
1120
460
320
ns
tPHL
Maximum Propagation Delay, Reset to Output
(Figure 2)
5.0
10
15
650
225
170
650
225
170
1300
450
340
ns
tTHL, tTLH
Maximum Output Transition Time, Any Output
(Figure 1)
5.0
10
15
200
100
80
200
100
80
400
200
160
ns
fmax
CIN
Parameter
Guaranteed Limit
Maximum Input Capacitance
-
7.5
pF
TIMING REQUIREMENTS (CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
VCC
Symbol
Parameter
Guaranteed Limit
V
≥-55°C
25°C
≤125°C
Unit
tw
Minimum Pulse Width, Clock (Figure 1)
5.0
10
15
200
100
70
200
100
70
400
200
140
ns
tw
Minimum Pulse Width, Reset (Figure 2)
5.0
10
15
250
110
80
250
110
80
500
220
160
ns
tw
Minimum Pulse Width, Enable (Figure 3)
5.0
10
15
400
200
140
400
200
140
800
400
280
ns
Maximum Input Rise and Fall Times
(Figure 1)
5.0
10
15
15
5
5
15
5
5
15
5
5
µs
tr, tf
Rev. 00
IW4528B
Rev. 00
IW4528B
N SUFFIX PLASTIC DIP
(MS - 001BB)
A
Dimension, mm
9
16
Symbol
MIN
MAX
A
18.67
19.69
B
6.1
7.11
B
1
8
5.33
C
F
L
C
D
0.36
0.56
F
1.14
1.78
G
2.54
H
7.62
-T- SEATING
PLANE
N
G
K
M
H
D
J
0.25 (0.010) M T
NOTES:
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
J
0°
10°
K
2.92
3.81
L
7.62
8.26
M
0.2
0.36
N
0.38
D SUFFIX SOIC
(MS - 012AC)
Dimension, mm
A
16
9
H
B
1
G
P
8
R x 45
C
-TK
D
SEATING
PLANE
J
0.25 (0.010) M T C M
NOTES:
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B ‑ 0.25 mm (0.010) per side.
F
M
Symbol
MIN
MAX
A
9.8
10
B
3.8
4
C
1.35
1.75
D
0.33
0.51
F
0.4
1.27
G
1.27
H
5.72
J
0°
8°
K
0.1
0.25
M
0.19
0.25
P
5.8
6.2
R
0.25
0.5
Rev. 00
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