Gamma GM3842AD8T High performance current mode pwm controller Datasheet

Features
Description
Low Start-Up and Operating Current
Automatic Feed Forward Compensation
Current Mode Operating Frequency up to
500kHz
Trimmed Oscillator Discharge Current for
Precise Duty Cycle Control
Latching PWM for Cycle-By-Cycle Current
Limiting
Undervoltage Lockout with Hysteresis
High Current Totem Pole Output
The GM384XA Have Start-up Current 0.17mA
GM384XA series is high performance with fixed-frequency
current mode PWM controllers. They are specially designed for off-Line and DC-to-DC converter applications.
They require minimal external components to precisely tailor performance in a wide variety of applications.
GM384XA series includes a trimmed oscillator for precise
duty cycle control, a temperature-compensated reference,
high gain error amplifier, a current-sensing comparator,
and a high-current totem pole output for driving a power
MOSFET.
On-chip protection features include undervoltage lockouts
with hysteresis for both input and reference, cycle-by-cycle
current limiting, programmable output deadtime, and a
latch for single pulse metering. All these are in a simple
DIP-8 or SOP-8 package!
GM3842A and GM3844A have UVLO thresholds of 16V
(on)/10V(off); GM3843A and GM3845A have UVLO thresh-
ate within 50% duty cycle.
SIMPLIFIED BLOCK DIAGRAM
VCC
7
5.0V
REFERENCE
Vref 8
R
VREF
Undervoltage
LOCKOUT
R
RT/ CT 4
Voltage Feedback Input 2
VCC
Undervoltage
LOCKOUT
7 VC
OSCILLATOR
6 Output
Latching
PWM
Error
Amplifier
+
-
5 Power Ground
3 Current Sense Input
Output Compensation 1
5
GND
GM 431
www.gammamicro.com
1
V1.0
ate within 100% duty cycle; GM3844A and GM3845A oper-
GM3842A, GM3843A, GM3844A, GM3845A
olds of 8.4V (on)/ 7.6V (off). GM3842A and GM3843A oper-
MARKING INFORMATION & PIN CONFIGURATIONS (TOP VIEW)
SOP - 8
VCC
VREF
DIP - 8
OUTPUT
GND
VCC
VREF
8 7 6 5
OUTPUT
GND
8 7 6 5
GM384X
Ayww
GM384X
Ayww
1 2 3 4
COMP
FB
1 2 3 4
RT / C T
ISENSE
COMP
FB
RT / C T
ISENSE
A
= Assembly Location
Y
= Year
W W = Weekly
GM3842A, GM3843A, GM3844A, GM3845A
ORDERING INFORMATION (Green Package Products are available now!)
2
Ordering Number
Package
Shipping
GM3842AS8T
SOP - 8
100 Units/ Tube
GM3842AS8R
SOP - 8
2,500 Units/ Tape & Reel
GM3842AD8T
DIP-8
60 Units/ Tube
GM3843AS8T
SOP - 8
100 Units/ Tube
GM3843AS8R
SOP - 8
2,500 Units/ Tape & Reel
GM3843AD8T
DIP-8
60 Units/ Tube
GM3844AS8T
SOP - 8
100 Units/ Tube
GM3844AS8R
SOP - 8
2,500 Units/ Tape & Reel
GM3844AD8T
DIP-8
60 Units/ Tube
GM3845AS8T
SOP - 8
100 Units/ Tube
GM3845AS8R
SOP - 8
2,500 Units/ Tape & Reel
GM3845AD8T
DIP-8
60 Units/ Tube
* For detail ordering number identification, please see last page.
** For green package products, please add " G" at the end of each part number.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
VALUE
UNIT
VCC
30
V
Output Current, Source or Sink *
IO
±1.0
A
Input Voltage (analog inputs pins 2)
VI
- 0.3 to + 5.5
V
Maximum Power Dissipation (TA= 25°C)
PD
1.0
W
ISINK(E.A)
10
mA
Storage Temperature Range
Tstg
- 65 to + 150
°C
Lead Temperature (soldering 5 sec.)
TL
260
°C
PARAMETER
Supply Voltage (low impedance source)
Error Amp Output Sink Current
* Note: Maximum Package Power Dissipation Limits must be observed.
FUNCTION
PIN lead
FUNCTION
1
COMP
This pin is Error Amplifier output and is made available for loop compensation.
2
VFB
This is the inverting input of the Error Amplifier. It is normally connected to the
switching power supply output through a resistor divider.
3
ISENSE
A voltage proportional to inductor current connected to this input. The PWM
uses this information to terminate the output switch conduction.
4
RT/ CT
Oscillator frequency and maximum Output cycle are programmed by connecting
resistor RT to VREF and capacitor CT to ground.
5
GND
6
Output
7
VCC
8
VREF
This pin is the combined control circuitry and power ground.
This output directly drives the gate of a power MOSFET. Peak current up to 1.0A
are sourced and sunk by this pin.
This pin is the positive supply of the control integrated circuit (IC)
This is the reference output. It provides charging current for capacitor CT
through resistor RT.
GM3842A, GM3843A, GM3844A, GM3845A
PACKAGE PIN DESCRIPTION
3
Power Management
REPRESENTATIVE BLOCK DIAGRAM
VCC
VIN
VCC 7
8
Reference
Regulator
Vref
R
2.5V
R
VC
-
7
Vref
UVLO
-
4
Output
Oscillator
+
6
TQ
1.0mA
1/2 Vref
Q
-
5
R
-
Voltage
Feedback
Input
Power
Ground
S
2R
+
2
Q1
(Toggle flip flop used only
in GM3844A, GM3845A)
CT
GM3842A, GM3843A, GM3844A, GM3845A
+
+
3.6V +
4
VCC UVLO
-
Internal
Baias
RT
36V
+
1.0V
Error
Amplifier
+
3
R
1
PWM Latch
Current Sense
Comparator
Output
Compensation
Current
Sense
Input
5
GND
+
+
--
=
Sink Only
Positive True Logic
RS
TIMING DIAGRAM
Capacitor CT
Latch "Set" Input
Output/ Compensation
Current Sense Input
Latch "Reset" Input
Output
Latch RT/ Small CT
Small RT/ Latch CT
ELECTRICAL CHARACTERISTICS
(TA = 0°C to 70°C, *VCC=15V, CT=3.3nF, RT=10kW, unless otherwise specified )
CHARACTERISTICS
UNIT
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
VREF
TJ= 25°C, IREF= 1mA
4.9
5.0
5.1
V
6.0
20
mV
Reference Section
Reference Output Voltage
Line Regulation
DVREF
12V
Load Regulation
DVREF
1mA
Short Circuit Output Current
ISC
VCC 25V
IREF 20mA
TA=25°C
6.0
25
mV
-100
-180
mA
52
57
kHz
0.05
1.0
%
Oscillator Section
Oscillation Frequency
Frequency Change with Voltage
Oscillator Amplitude
TJ= 25°C
f
12V
Df/ DVCC
V(OSC)
47
VCC 25V
(Peak to Peak)
V
1.6
Error Amplifier Section
Input Bias Current
IBIAS
VFB= 3V
Input Voltage
VI(EA)
VPIN1=2.5V
Open Loop Voltage Gain
AVOL
Power Supply Rejection Ratio
PSRR
Output Sink Current
ISINK
2V
12V
-0.1
-2
2.42
2.5
2.58
VO 4V
65
90
VCC 25V
V
dB
60
70
dB
VPIN2=2.7V, VPIN1=1.1V
2
7
mA
mA
ISOURCE
VPIN2=2.3V, VPIN1=5V
-0.5
-1.0
High Output Voltage
VOH
VPIN2=2.3V, RL=15kW to GND
5.0
6.0
Low Output Voltage
VOL
VPIN2=2.7V, RL=15kW to PIN8
Output Source Current
µA
V
0.8
1.1
V
V/ V
Current Sense Input Voltage Gain
Maximum Input Signal
GV
VI(MAX)
Supply Voltage Rejection
SVR
Input Bias Current
IBIAS
(Note 1 and 2)
2.85
3.0
3.15
VPIN1=5V (Note 1)
0.9
1.0
1.1
12V
VCC 25V (Note 1)
VPIN3=3V
V
dB
70
-3.0
-10
ISINK= 20mA
0.08
0.4
ISINK= 200mA
1.4
2.2
µA
Output Section
Low Output Voltage
High Output Voltage
VOL
VOH
ISOURCE= 20mA
13
13.5
ISOURCE= 200mA
12
13
V
V
Rise Time
tR
TJ= 25°C, CL= 1nF(Note 3)
45
150
nS
Fall Time
tF
TJ= 25°C, CL= 1nF(Note 3)
35
150
nS
Undervoltage Lockout Section
Start Threshold
Minimum Operating Voltage
(after tum ON)
VTH(ST)
VOPR(MIN)
GM3842A, GM3844A
14.5
16.0
17.5
GM3843A, GM3845A
7.8
8.4
9.0
GM3842A, GM3844A
8.5
10
11.5
GM3843A, GM3845A
7.0
7.6
8.2
V
V
GM3842A, GM3843A, GM3844A, GM3845A
Current Sense Section
5
ELECTRICAL CHARACTERISTICS (Continued)
(TA = 0°C to 70°C, *VCC=15V, CT=3.3nF, RT=10kW, unless otherwise specified )
CHARACTERISTICS
SYMBOL
TYP
MAX
UNIT
95
97
100
%
47
48
50
%
0
%
TEST CONDITIONS
MIN
GM3842A, GM3843A
GM3844A, GM3845A
PWM Section
D(MAX)
Maximum Duty Cycle
D(MIN)
Minimum Duty Cycle
Total Standby Current
IST
Start-Up Current
GM3842A/ 43A/ 44A/ 45A
0.17
0.3
mA
VPIN3= VPIN2=0V
13
17
mA
ICC(OPR)
Operating Supply Current
VZ
Zener Voltage
ICC= 25mA
30
38
V
* Adjust VCC above the Startup threshold before setting to 15 V.
Note1: Parameter measured at trip point of latch with VPIN2 = 0.
Note2: Gain defined as A=DVPIN1 / DVPIN3 ; 0
VPIN3
0.8V
GM3842A, GM3843A, GM3844A, GM3845A
Note3: These parameters, although guaranteed, are not 100% tested in production
6
TYPICAL PERFORMANCE CHARACTERISTICS
RT
%
(KW)
CT= 1000pF
50
CT= 200pF
CT= 1nF
20
CT= 500pF
10
VCC= 15V
TA=25°C
50
30
CT= 5nF
20
CT= 10pF
10
CT= 2nF
CT= 2nF
5
CT= 5nF
30
CT= 1000pF
3
2 VCC= 15V
1 TA=25°C
20
CT= 200pF
5
CT= 10pF
10
CT= 500pF
CT= 1nF
2
1
50
100
200 300 500
fosc
(kHz)
Figure 1. Timing Resistor vs. Oscillator Frequency
10
20
30
50
100
200 300 500
fosc
(kHz)
Figure 2. Output Dead-Time vs. Oscillator Frequency
TYPICAL PERFORMANCE CHARACTERISTICS
Dmax
(%)
(dB)
VCC= 15V
CT= 3.3nF
TA=25°C
90
80
80
60
70
40
60
20
50
0
40
1
VCC= 15V
VO= 2V to 4V
RL= 100K
TA= 25°C
2
3
RT (kW)
5
-20
10
Figure 3. Maximum Output Duty Cycle vs.
Timing Resistor (GM3842A/43A)
Vth
(V) VCC= 15V
100
1k
10k
100k
1M
f (Hz)
Figure 4. Error Amp Open-Loop Gain vs.
Frequency
ISC
(mA)
1.0
100
TA= 125°C
0.8
90
TA= 25°C
0.6
VCC= 15V
80
0.4
0.2
60
0
2
4
6
VO (V)
Figure 5. Current Sense Input Threshold vs.
Error Amp Output Voltage
Vsat
(V)
-1
50
0
25
50
75
100 T (°C)
A
Figure 6. Reference Short Circuit Current vs.
Temperature
ICC
(mA) ISense= 0V
Sourse Saturation
(Load to Ground)
-2
VCC= 15V
VFB= 0V
RT= 10K
TA= 25°C
20 C = 3.3nF
T
80µs Pulsed Load 120Hz Rate
10
2
1
0
0
GM3843A/ 45A
15
Sink Saturation
(Load to VCC)
5
GM3842A/ 44A
3
0
200
400
600
IO (mA)
Figure 7. Output Saturation Voltage vs.
Load Current TA= 25°C
0
10
20
30
VCC(V)
Figure 8. Supply Current vs. Supply Voltage
GM3842A, GM3843A, GM3844A, GM3845A
70
7
OPERATING DESCRIPTION
GM3842A, GM3843A, GM3844A and GM3845A are high performance with fixed frequency, current mode
controllers. They are designed for off-ine and DC-to-DC converter applications offering great versatility with
minimal external components. A representative block diagram is shown on page 4.
Oscillator
The oscillator frequency is determined by the values of the timing components RT and CT. Capacitor CT is
charged from the 5.0 V reference through resistor RT to approximately 2.8 V and discharged to 1.2 V by an
internal current sink. During the of CT, the oscillator generates an internal blanking pulse that holds the center
input of the NOR gate high. This causes the output to be in a low state, thus producing a controlled amount of
Figure 2 show RT versus oscillator frequency and Figure 2, Output deadtime versus frequency, both for given
values of CT output deadtime.
Note that different values of RT and CT will give the same oscillator frequency, but only one combination will yield
a specific output deadtime at a given frequency. The oscillator thresholds are temperature compensated. These
interned circuit vefinements minimizes refinements of oscillator frequency and maximum output duty cycle. In
many noise sensitive applications, it may be desirable to frequency-lock the converter to an external system
clock. This can be accmplished by applying a clock signal to the circuit shown in Figure 9. For best locking
results, set the free-unning oscillator frequency to about 10% less than the clock frequency. A method for multi
unit synchronization is shown in Figure 10. You can get very accurate output duty cycle clamping by tweaking the
clock waveform.
Error Amplifier
GM3842A, GM3843A, GM3844A, GM3845A
GM384XA series has a fully compensated error amplifier with access to both the inverting input and output, and
providing DC voltage gain of 90 dB (typical). The noninverting input is internally biased at 2.5 V and is not pinned
out. The converter output voltage is typically divided down and monitored by the inverting input. The maximum
input bias current is -2.0 µA, which can cause an output voltage error that is equal to the product of the input bias
current and the equivalent input divider source resistance.
8
The Error Amplifier Output (Pin 1) allows external loop compensation. The output voltage is offset by the two
diode drops ( 1.4 V) and divided by three before it connects to the inverting input of the Current Sense
Comparator. This assures that no drive pulses appear at the Output (Pin 6) when Pin 1 is at its lowest state
(VOL). This happens when the power supply is operating and the load is removed, or at the beginning of a softstart interval (Figures 11, 12). The Error Amp minimum feedback resistance is limited by the amplifier's source
current (0.5 mA) and the required output voltage (VOH) to reach the comparator's 1.0 V clamp level:
Rf(min)
3.0(1.0V) + 1.4V
= 8800W
0.5mA
Current Sense Comparator and PWM Latch
GM384XA series operates as a current mode controller, whereby output switch conduction is initiated by the
oscillator and terminated when the peak inductor current reaches the threshold level established by the Error
Amplifier Output/Compensation (Pin1). The error signal controls the peak inductor current cycle-by-cycle basis.
The Current Sense Comparator PWM Latch configuration assures that only a single pulse appears at the Output
during any given oscillator cycle. The inductor current is converted to a voltage by inserting the groundreferenced sense resistor RS in series with the source of output switch Q1. This voltage is monitored by the
Current Sense Input (Pin 3) and compared to a level derived from the Error Amp Output. The peak inductor
current under normal operating conditions is controlled by the voltage at pin 1 where:
Ipk=
V(PIN1) - 1.4V
3 RS
When the power supply output is overloaded or if output voltage sensing is lost, the chip operation is not normal.
In these situations, the Current Sense Comparator threshold will be internally clamped to 1.0 V and the
maximum peak switch current is:
1.0V
Ipk(mak)= R
S
When designing a high power switching regulator, it becomes desirable to reduce the internal clamp voltage in
order, to keep a reasonable level of power dissipation of RS. Adjusting the internal clamp voltage is very simple,
as shown in Figure 11. The two external diodes compensate the internal diodes so you get a constant clamp
voltage over temperature. Avoid too much reduction of the Ipk(max) clamp voltage, or you will get noise pickup and
erratic results.
A narrow spike on the leading edge of the current waveform often occurs and can cause the power supply
instability when the output load is light. This spike is caused by power transformer interwinding capacitance and
output rectifier recovery time. You can eliminate this problem by adding an RC filter on the Current Sense Input,
with a time constant similar to the spike's duration; see Figure 16.
Undervoltage Lockout
Two UVLO comparators in GM384XA series assure that the chips are fully functional before the output stage is
enabled. The positive power supply terminal (VCC) and the reference output (Vref) have separate comparators.
Each has built-in hysteresis to prevent erratic output behavior as their thresholds are reached. The VCC
comparator's upper and lower thresholds are 16 V/10 V for GM3842A and GM3844A, and 8.4V/7.6V for
GM3843A and GM3845A.
The Vref comparator's upper and lower thresholds are 3.6V/3.4 V. The large hysteresis and low startup current of
the GM3842A and GM3844A makes them ideal for off-line converter applications where efficient bootstrap
startup is required.
Output
GM384XA series has a single totem pole output stage that was designed for direct drive of power MOSFETs. It
provides up to ±1.0 A peak drive current and has a typical rise/ fall time of 50 ns with a 1.0 nF load. Additional
internal circuitry keeps the output in a sinking mode whenever a UVLO is active. This eliminates the need for an
external pull-down resistor.
Reference
The 5.0 V bandgap reference is trimmed to ±1.0% tolerance at TJ = 25°C on the GM384XA series. Its primary
purpose is to supply charging current to the oscillator timing capacitor. The reference has short circuit protection
and it can provide more than 20mA for powering additional control system circuitry.
Design Considerations
Do not make your converter to use wire-wrap or plug-in prototype boards. High-frequency circuit layout
techniques must be observed to prevent pulsewidth jitter. This is usually caused by excessive noise pick-up
imposed on the Current Sense or Voltage Feedback inputs. You can improve noice immunity by lowering circuit
impedances at these points. The PCB layout should have a ground plane with low-current signal and highcurrent switch and output grounds returning on separate paths to the input filter capacitor. Ceramic bypass
capacitors (0.1 µF) connected directly to VCC, VC, and Vref may be required, depending upon circuit layout, to
provide a low impedance path for filtering high frequency noise. All high-current loops should be as short as
possible and use heavy copper runs to minimize radiated EMI. The Error Amp compensation circuitry and the
converter output voltage divider should be placed as close as possible to the GM384XA, and as far as possible
from the power switch and other noise- generating components.
GM3842A, GM3843A, GM3844A, GM3845A
GM3843A and GM3845A are intended for lower voltage DC-to-DC converter applications. A 36 V zener is
connected as a shunt regulator from VCC to ground. Its purpose is to protect the IC from excessive voltage that
can occur during system startup. The minimum operating voltage for GM3842A and GM3844A is 11V; for
GM3843A and GM3845A it is 8.2V.
9
Current mode converters can exhibit subharmonic oscillations when operating at a duty cycle greater than 50%
with continuous inductor current. This instability is independent of the regulators closed–loop characteristics and
is caused by the simultaneous operating conditions of fixed frequency and peak current detecting. Figure 9.A
shows the phenomenon graphically. At t0, switch conduction begins and causes causing the inductor current to
rise at a slope of m1. This slope is a function of the input voltage divided by the inductance. At t1, the Current
Sense Input
reaches the threshold established by the control voltage.
This causes the switch to turn off and the current to decay at a slope of m2 until the next oscillator cycle. The
unstable condition can be shown if a pertubation is added to the control voltage, and resulting in a small DI
(dashed line). With a fixed oscillator period, the current decay time is reduced and the minimum current at switch
turn–on (t2) is increased by DI + DI m2/m1. The minimum current at next cycle (t3) decreases to (DI + DI m2/m1)
(m2/m1). This pertubation is multiplied by m2.m1 on each succeeding cycle, alternately increasing and decreasing
the inductor current at switch turn–on. Several oscillator cycles may be required before the inductor current
reaches zero, which caused causing the process to commence again. If m2/m1 is greater than 1, the converter
will be unstable. Figure 9.B shows that by adding an artificial ramp, that is synchronized with the PWM clock to
the control voltage, the DI pertubation will decrease to zero on succeeding cycles. This compensation ramp (m3)
must have a slope equal to or slightly greater than m2/2 for stability. With m2/2 slope compensation, the average
inductor current follows the control voltage yielding true current mode operation. The compensating ramp can be
A
GM3842A, GM3843A, GM3844A, GM3845A
DI
10
Control Voltage
m2
Inductor
Current
m1
m2
m1
DI + DI
(DI + DI
m2 m2
)(
)
m1 m1
Oscillator Period
t0
Control Voltage
t1
t2
t3
B
m3
DI
m1
m2
Inductor
Current
Oscillator Period
t4
t5
Figure 9. Continuous Current Waveforms
t6
Figure 10. External Clock Synchronization
8
Vref
R
Internal
Bias
RT
R
4
External
Sync
Input
Oscillartor
CT
0.01
+
47
2R
+
2
Error
Amplifier
R
1
* The diode clamp is required if the Sync amplitude is
large enough to cause the bottom side of CT to go
5
Figure 11. External DUTY CYCLE CLAMP and multi-unit synchronization
8
R
Internal
Bias
RA
4
8
R
4
3
6
5
+
-
R
+
-
S
+
Q
5.0k
2
C
Oscillator
5.0k
RB
7
+
-
2
5.0k
1
2R
Error
Amplifier
R
1
GND 5
To Additional GM384XA series
f=
1.44
(RA + 2RB) C
Dmax
RB
RA + 2RB
GM3842A, GM3843A, GM3844A, GM3845A
more than 300 mV below ground.
11
VCC
Figure 12. Adjustable reduction of clamp level
Vclamp=
1.67
R2
( R1 + 1)
IPK(max)=
where: 0
+0.33X10-3 (
R1 + R2
)
R1 + R2
Vclamp
VCC 7
8
+
-
5.0 Vref
RS
R
Vclamp
1.0V
VIN
R
+
7
-
Internal
Bias
R2
+
+
-
-
4
Q1
6
Oscillator
+
Vclamp
+
2
1
1.0mA
Q
+
Error
Amplifier
5
S
2R
R
Comp/ Latch
3
R
1.0V
R1
RS
GM3842A, GM3843A, GM3844A, GM3845A
5
12
Figure 13. Soft-start circuit
8
5.0 Vref
R
Internal
Bias
R
4
+
-
+
-
Oscillator
+
2
+
Error
Amplifier
1
1.0mA
S
2R
Q
+
R
1.0V
1.0M
tsoft-start
3600C in µF
C
5
R
VCC
Figure 14. Adjustable buffered reduction of clamp level with soft-start
Vclamp=
1.67
VCC 7
R2
( R1 + 1)
Vclamp
IPK(max)=
RS
8
+
-
5.0 Vref
+
-
R
where: 0
Vclamp
1.0V
Internal
Bias
R
VC
tsoftstart= -ln [ 1]
3Vclamp
C
VIN
4
+
-
7
+
6
Oscillator
Q1
R1 + R2
R1 + R2
Vcalmp
1.0mA
+
2
R2
1
Q
+
-
Error
Amplifier
5
S
2R
R
Comp/ Latch
3
R
1.0V
Figure 15. Current sensing power mosfet
VPIN 5=
RS
5
R1 MPSA63
VCC
RS IPK RDS(on)
VIN
VCC 7
RDS(on) + RS
If= SENSEFET= MTP10N10M
RS= 200
+
-
5.0 Vref
Then : VPIN 5= 0.075 lPK
+
-
+
-
7
+
-
D
SENSEFET
S
6
G
M
5
S
+
-
K
Q
R
Power Ground to
Input Source Retum
Comp/ Latch
3
R
For proper operation during over current
conditions, a reduction of the Ipk(max)
clamp level must be implemented.
Refer to Figures 11 and 12.
1.0V
5
1/4W
Control Circuitry Ground
RS
GM3842A, GM3843A, GM3844A, GM3845A
C
13
Figure 16. current wavefrom spike suppression
VCC
VCC
VIN
7
+
-
5.0 Vref
+
-
+
7
+
-
-
Q1
8
TQ
5
GM3842A, GM3843A, GM3844A, GM3845A
S
14
Q
+
-
R
Comp/ Latch
R
3
R
1.0V
C
RS
5
* The addition of the RC filter will eliminate instability caused by the leading edge spike on the current waveform.
Figure 17. MOSFET Parasitic Oscillations
VIN
VCC
7
+
5.0 VREF
-
+
7
-
+
-
Rg
6
+
-
Q1
5
S
+
R
Q
3
Comp/ Latch
Rs
Figure 18. Isolated MOSFET Drive
VO
+
2.5V
RI
2
+
-
CI
RD
RF
EA
1.0mA
2R
R
1
5
Error Amp compensation circuit for stabilizing any current-mode topology except
for boost and flyback converters operating with continuous inductor current.
GM3842A, GM3843A, GM3844A, GM3845A
Series gate resistor Rg will damp any high frequency parasitic oscillations caused by the MOSFET input
capacitance and any series wiring inductance in the gate-source circuit.
15
8
Figure 19. Latched Shutdown
R
Bias
R
4
OSC
+
1.0mA
+
2
-
2R
EA
1
R
MCR101
5
2N3905
GM3842A, GM3843A, GM3844A, GM3845A
2N3903
16
The MCR101 SCR must be selected for a holding of less than 0.5 mA at TA (min).
The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10 k.
Figure Error Amplifier Compensation
VO
+
2.5V
RP
RI
2
+
-
CP
RD
CI
RF
EA
1.0mA
2R
R
1
5
Error Amp compensation circuit for stabilizing current-mode boost and flyback topologies operating with
continuous inductor current.
SOP-8 PACKAGE OUTLINE DIMENSIONS
0 ° ~8 °
0.0285 ± 0.0105
0.725 ± 0.275
Pad Layout
0.060
1.52
0.238 ± 0.008
6.04 ± 0.2
0.155 ± 0.004
3.94 ± 0.1
0.275
0.155
7.0
4.0
PIN INDENT
0.024
0.050
0.6
1.270
0.05
1.27
0.008 ± 0.002
0.203 ± 0.05
Inches
( mm )
0.693 ± 0.504
4.91 ± 0.1
0.057 ± 0.004
1.45 ± 0.1
0.063 ± 0.006
1.60 ± 0.15
0.007 ± 0.003
0.175 ± 0.075
DIP-8 PACKAGE OUTLINE DIMENSIONS
0.252 ± 0.008
6.40 ± 0.2
0.3 ± 0.008
7.62 ± 0.2
0.362 ± 0.008
9.20 ± 0.2
0.012 ± 0.004
0.304 ± 0.1
0.3425 ± 0.0155
8.70 ± 0.4
0.134 ± 0.008
3.40 ± 0.2 0.158 ± 0.012
4.01 ± 0.3
0.02 MIN
0.51 MIN
0.13 ± 0.008
3.30 ± 0.2
0.018 ± 0.004
0.46 ± 0.10
0.1 ± 0.008
2.54 ± 0.2
0.06 ± 0.006
1.524 ± 0.15
Inches
( mm )
GM3842A, GM3843A, GM3844A, GM3845A
0.016 ± 0.004
0.406 ± 0.1
17
ORDERING NUMBER
GM 3842 A S8 R
Gamma Micro.
Shipping
R: Tape & Reel
Circuit Type
Package
S8: SOP-8
D8: DIP-8
GM3842A, GM3843A, GM3844A, GM3845A
"A" Version
18
19
GM3842A, GM3843A, GM3844A, GM3845A
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