ON NTR4518N Single nâ channel power mosfet Datasheet

NTR4518N
Power MOSFET
30 V, 2.5 A, Single N−Channel, SOT−23
Features
•
•
•
•
Leading Planar Technology for Low Gate Charge / Fast Switching
4.5 V Rated for Low Voltage Gate Drive
SOT−23 Surface Mount for Small Footprint (3 x 3 mm)
This is a Pb−Free Device
http://onsemi.com
V(BR)DSS
Applications
• DC−DC Conversion
• Load/Power Switch for Portables
• Load/Power Switch for Computing
RDS(on) TYP
85 mW @ 10 V
30 V
2.5 A
105 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
N−Channel
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
2.0
A
Parameter
ID MAX
D
Continuous Drain
Current (Note 1)
Steady
State
TA = 25°C
TA = 85°C
1.5
t ≤ 10 s
TA = 25°C
2.5
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
PD
0.73
W
Continuous Drain
Current (Note 2)
Steady
State
TA = 25°C
ID
1.5
A
Power Dissipation
(Note 2)
TA = 85°C
TA = 25°C
G
S
3
1.1
PD
0.42
W
tp = 10 ms
IDM
6.0
A
C = 100 pF,
RS = 1500 W
ESD
125
V
TJ,
Tstg
−55 to
150
°C
Source Current (Body Diode)
IS
2.0
A
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
MARKING DIAGRAM/
PIN ASSIGNMENT
Drain
3
1
2
Pulsed Drain Current
ESD Capability (Note 3)
Operating Junction and Storage Temperature
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
This document contains information on a product under development.
ON Semiconductor reserves the right to change or discontinue this
product without notice.
TR3
M
G
1
Gate
2
Source
= Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
NTR4518NT1G
This document, and the information contained herein, is CONFIDENTIAL AND
PROPRIETARY and the property of Semiconductor Components Industries,
LLC., dba ON Semiconductor. It shall not be used, published, disclosed or
disseminated outside of the Company, in whole or in part, without the written
permission of ON Semiconductor. Reverse engineering of any or all of the
information contained herein is strictly prohibited.
TR3 M G
G
SOT−23
CASE 318
STYLE 21
Package
Shipping†
SOT−23
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
E 2006, SCILLC. All Rights Reserved.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 0
1
Publication Order Number:
NTR4518N/D
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
NTR4518N
THERMAL RESISTANCE RATINGS
Symbol
Max
Unit
Junction−to−Ambient − Steady State (Note 1)
Parameter
RqJA
170
°C/W
Junction−to−Ambient − t < 10 s (Note 1)
RqJA
100
Junction−to−Ambient − Steady State (Note 2)
RqJA
300
1. Surface−mounted on FR4 board using 1 in sq pad size.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
3. ESD Rating Information: HBM Class 0.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
36
IDSS
VGS = 0 V, VDS = 24 V
1.0
VGS = 0 V, VDS = 24 V, TJ = 125°C
10
IGSS
VDS = 0 V, VGS = "20 V
"100
nA
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250 mA
1.75
3.0
V
Drain−to−Source On−Resistance
RDS(on)
VGS = 10 V, ID = 2.5 A
85
110
mW
VGS = 4.5 V, ID = 2.0 A
105
140
VDS = 4.5 V, ID = 2.5 A
5.3
S
135
pF
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
V
mA
ON CHARACTERISTICS (Note 4)
Forward Transconductance
gFS
1.0
CHARGES AND CAPACITANCES
Ciss
Input Capacitance
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
VGS = 0 V, f = 1.0 MHz,
VDS = 15 V
52
15
VGS = 0 V, f = 1.0 MHz,
VDS = 24 V
130
250
42
75
Crss
13
25
Total Gate Charge
QG(TOT)
3.6
7.0
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
0.7
Total Gate Charge
QG(TOT)
1.9
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
VGS = 10 V, VDS = 15 V,
ID = 2.5 A
VGS = 4.5 V, VDS = 24 V,
ID = 2.5 A
pF
nC
0.3
0.6
nC
0.3
0.6
0.9
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(on)
5.8
12
5.8
10
14
25
tf
1.6
5.0
td(on)
4.8
tr
td(off)
tr
td(off)
VGS = 10 V, VDD = 15 V,
ID = 1 A, RG = 6 W
VGS = 10 V, VDD = 24 V,
ID = 2.5 A, RG = 2.5 W
tf
6.7
13.6
1.8
http://onsemi.com
2
ns
ns
NTR4518N
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
1.2
V
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
VGS = 0 V, IS = 2.0 A
0.85
Reverse Recovery Time
tRR
9.2
ns
Reverse Recovery Charge
QRR
VGS = 0 V, IS = 2.0 A,
dIS/dt = 100 A/ms
4.0
nC
4. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
3
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
NTR4518N
TYPICAL PERFORMANCE CURVES
10 V
6V
5V
4.5 V
4.2 V
8
4V
VDS ≥ 10 V
3.8 V
TJ = 25°C
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
10
3.6 V
6
3.4 V
3.2 V
4
3V
2
2.8 V
8
4
100°C
25°C
2.6 V
0
1
2
3
4
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
3
4
5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
2
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
0.3
ID = 2.5 A
TJ = 25°C
0.25
0.2
0.15
0.1
0.05
0
4
6
3
5
7
8
9
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
2
10
TJ = 25°C
0.11
VGS = 4.5 V
0.10
0.09
0.08
VGS = 10 V
0.07
2
3
6
5
4
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1000
1.8
VGS = 0 V
ID = 2.5 A
VGS = 10 V
IDSS, LEAKAGE (nA)
1.6
6
0.12
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = −55°C
0
1.4
1.2
1.0
TJ = 150°C
100
10
TJ = 100°C
0.8
0.6
−50
1
−25
0
25
50
75
100
125
150
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
http://onsemi.com
4
30
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
NTR4518N
VGS = 0 V
VDS = 0 V
TJ = 25°C
C, CAPACITANCE (pF)
Ciss
VDS
QG
10
200
Crss
100
Coss
0
10
15
15
5
VGS
0
VDS
5
10
15
20
30
25
VGS
5
QGS
5
QGD
ID = 2.5 A
TJ = 25°C
0
0
0
1
2
3
QG, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
4
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 7. Capacitance Variation
100
3
IS, SOURCE CURRENT (AMPS)
VDD = 24 V
ID = 2.5 A
VGS = 10 V
t, TIME (ns)
10
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
300
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES
td(off)
tf
10
td(on)
tr
10
2
1
0
0.3
1
1
VGS = 0 V
TJ = 25°C
100
0.4
0.5
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE (OHMS)
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
http://onsemi.com
5
1
CONFIDENTIAL AND PROPRIETARY
NOT FOR PUBLIC RELEASE
NTR4518N
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AN
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. 318−01 THRU −07 AND −09 OBSOLETE, NEW
STANDARD 318−08.
D
SEE VIEW C
3
HE
E
c
1
DIM
A
A1
b
c
D
E
e
L
L1
HE
2
b
0.25
e
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
L1
VIEW C
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
6
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTR4518N/D