¡ Semiconductor MSM6791 MSM6791 ¡ Semiconductor DRAM Interface IC GENERAL DESCRIPTION The MSM6791 can be used as a memory for voice data by connecting OKI solid-state recording and playback ICs (MSM6688 and MSM6788). FEATURES • DRAM (¥ 1-bit configuration) 1M-bit DRAM (MSM511000A, MSM511001A) : 8 pcs. can be connected. 4M-bit DRAM (MSM514100A, MSM514101A) : 8 pcs. can be connected. 16M-bit DRAM (MSM5116100A) : 2 pcs. can be connected. Note: MSM511002A/MSM514102A that corresponds to a static column mode cannot be used. • Power supply voltage : • Built-in refresh circuit (RAS only refresh) • Original oscillation frequency: • Bit rates: 5V single rail 8MHz 10kbps, 12.5kbps, 16kbps in MSM6788 connection (8kHz sampling fixation) 7.5kbps, 9.4kbps, 12kbps in MSM6788 connection (6kHz sampling fixation) 16kbps~32kbps in MSM6688 connection (4kHz~8kHz sampling) • Package: 44-pin plastic QFP (QFP44-P-910-2K) (Product name : MSM6791GS-2K) ¡ Semiconductor MSM6791 BLOCK DIAGRAM TEST TEST GND GND V DD VDD SAD Sin Pout CK 13 Column and Row Address Counter 13 12 Column or Row Address Multiplexer 3 LD SAS CK A0 A1 A2 A3 Row.A11 10 Address Multiplexer TAS A4 A5 A6 A7 R XT XT OSC A8 Column Address Counter Rerfresh Counter A9 12 A10 A11 WE CAS1 RWCK CAS2 CS1 CS2 CS3 CAS3 Timing Controller CAS4 CAS5 DRAM Controller CS4 CAS6 CAS7 M1 CAS Controller CAS8 M2 XWE RAS DOUT XDIN MSM6791 ¡ Semiconductor A11 A10 A9 A8 A7 VDD A6 A5 A4 A3 A2 44 43 42 41 40 39 38 37 36 35 34 PIN CONFIGURATION (TOP VIEW) RWCK 1 33 A1 DOUT 2 32 A0 WE 3 31 RAS SAD 4 30 XDIN SAS 5 29 XWE 20 21 22 CAS4 CAS5 CAS6 19 23 CAS3 11 CAS2 NC 18 CAS7 CAS1 CAS8 24 17 25 10 16 9 CS2 VDD CS1 TEST XT 15 26 14 8 M2 TAS M1 XT 13 GND 27 CS4 28 7 12 6 CS3 GND TEST 44-Pin Plastic QFP NC: No-connection pin ¡ Semiconductor MSM6791 PIN DESCRIPTION Symbol Type VDD – Power supply GND – Ground XT I Oscillator XT O Oscillator TEST I IC test. Use this pin by setting to ‘L’ level. TEST I IC test. Use this pin by setting to ‘H’ level. SAD I Read/write head address SAS I Clock to take the serial address data in the internal register TAS I Serial address data taken in the address register to the internal address counter Description Clock to read and write the information of the data register. The internal operation starts by the fall edge of RWCK. In a read mode, the data taken in XDIN is latched and it is output to the RWCK I DOUT pin. In a write mode, the DI/O output data of MSM6688/6788/6789 is taken in the DIN pin of the DRAM. In addition, the internal address counter automatically increments by the fall edge of RWCK and the address data output from A0 to A11. WE I Select a read mode and write mode. XWE O DRAM control A0~A11 O DRAM address RAS O DRAM control O DRAM control XDIN I Data input DOUT O Data output ~ CAS1 CAS8 CS1 Chip select data in connecting DRAM CS2 CS3 By inputting a "L" level signal to each pin, up to 32M-bit of memory (8M-bit of memory for I CS4 each pin) can be controlled for four Pins. These pins become the input pins to select the highest address in 16M-bit DRAM connection. Set the connecting pattern of DRAM. Connecting M1 I M2 M2 M1 L L Mode 1 L H 4M-bit DRAM ¥ 1~8pcs. connectable Mode 2 H L (4M-bit DRAM ¥ 1pcs.) + (1M-bit DRAM ¥ 0~3pcs.) connectable Mode 3 H H 16M-bit DRAM ¥ 1~2pcs. connectable Mode Mode 0 DRAM Connecting Pattern 1M-bit DRAM ¥ 1~8pcs. connectable MSM6791 ¡ Semiconductor ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Symbol VDD Input Voltage VI Output Voltage VO Input Current II Output Current Storage Temperature Condition Ta = 25˚C Unit –0.5 to +7 V –0.5 to VDD+0.5 V –0.5 to VDD+0.5 V GND = 0V –10 to +10 mA –20 to +20 mA — –65 to +150 ˚C IO TSTG Rating RECOMMENDED OPERATING CONDITIONS GND = 0V Symbol Range Unit Supply Voltage Parameter VDD 4.5 to 5.5 V Operating Temperature TOP –40 to +85 ˚C Oscillation Frequency fOSC 8 MHz ELECTRICAL CHARACTERISTICS DC Characteristics (Ta = –40 to +85˚C, VDD = 5V±10% GND = 0V) Parameter Symbol Condition Min. Typ. *1 Max. Unit — 3.5 — VDD+0.3 V "H" Level Input Voltage VIH "L" Level Input Voltage VIL — –0.3 — 1.5 V "H" Level Input Current IIH VIH = VDD — 0.01 10 mA "L" Level Input Current IIL VIL = GND –10 –0.01 — mA 3-state Output Leak Current IOZH VOH = VDD — 0.01 10 mA (includes open-drain output) IOZL VOL = GND –10 –0.01 — mA H" Level Output Voltage VOH IOH = –5.0 mA 2.4 4.20 VDD V "L" Level Output Voltage VOL IOL = 5.0 mA VSS 0.24 0.5 V — — 3 mA Operational Current Consumption Output open fOSC = 8MHz IDD *1 TYP means VDD=5.0V, Ta=25°C VIH = VDD VIL = GND RSEL1 RSEL2 AVDD 8MHz MSM511000A (4) MSM511000A (3) MSM511000A (2) Figure 2. Application Circuit Example with eight 1M-bit DRAM connections. (connection mode 0) MSM511000A (5) MSM6791 TEST GND GND GND MSM511000A (6) DGND XT XT A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CAS RAS WE DOUT DIN VCC MSM511000A (7) AGND MSM6688/6788 CAS1 CAS2 CAS3 CAS4 CAS5 CAS6 CAS7 CAS8 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAS XWE XDIN VDD MSM511000A (1) M1 M2 CS1 CS2 CS3 CS4 SAD SAS TAS RWCK WE DOUT SADX SAS TAS RWCK WE DI/O CS1 CS2 CS3 CS4 TEST VDD DVDD 1M-bit DRAM ¥ 8 ¡ Semiconductor MSM6791 APPLICATION CIRCUITS MSM511000A (8) RSEL1 RSEL2 AVDD 8MHz TEST GND GND XT XT MSM6791 AGND DGND MSM6688/6788 CAS1 CAS2 CAS3 CAS4 CAS5 CAS6 CAS7 CAS8 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAS XWE XDIN VDD GND MSM514100A (8) MSM514100A (7) MSM514100A (6) MSM514100A (5) MSM514100A (4) MSM514100A (3) MSM514100A (2) Figure 3. Application Circuit Example with eight 4M-bit DRAM connections. (connection mode 1) A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CAS RAS WE DOUT DIN VCC MSM514100A (1) M1 M2 CS1 CS2 CS3 CS4 SAD SAS TAS RWCK WE DOUT SADX SAS TAS RWCK WE DI/O CS1 CS2 CS3 CS4 TEST VDD DVDD 4M-bit DRAM ¥ 8 MSM6791 ¡ Semiconductor APPLICATION CIRCUITS (Continued) MSM6688/6788 8MHz MSM6791 TEST GND GND XT XT VCC CAS A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAS WE DOUT DIN VCC GND CAS A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAS WE DOUT DIN VCC GND CAS A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAS WE DOUT DIN VCC GND Figure 4. Application Circuit Example with one 4M-bit DRAM and three 1M-bit DRAM connections. (connection mode 2) GND MSM514100A (1) CAS RAS WE DOUT DIN A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 MSM511000A (2) CAS1 CAS2 CAS3 CAS4 CAS5 CAS6 CAS7 CAS8 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAS XWE XDIN VDD MSM511000A (3) M2 M1 CS1 CS2 CS3 CS4 SAD SAS TAS RWCK WE DOUT SADX SAS TAS RWCK WE DI/O CS1 CS2 CS3 CS4 TEST VDD DVDD 1M-bit DRAM ¥ 3 MSM511000A (4) AGND DGND RSEL1 RSEL2 AVDD 4M-bit DRAM ¥ 1 ¡ Semiconductor MSM6791 APPLICATION CIRCUITS (Continued) MSM6688/6788 8MHz MSM6791 TEST GND GND XT XT A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CAS1 CAS2 CAS3 CAS4 CAS5 CAS6 CAS7 CAS8 RAS WE DOUT DIN VCC RAS XWE XDIN VDD VCC VCC CAS GND GND A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAS WE DOUT DIN VCC Figure 5. Application Circuit Example with two 16M-bit DRAM connections. (connection mode 3) CAS GND GND MSM5116100 (1) M2 M1 CS1 CS2 CS3 CS4 SAD SAS TAS RWCK WE DOUT SADX SAS TAS RWCK WE DI/O CS1 CS2 CS3 CS4 TEST VDD DVDD MSM5116100 (2) AGND DGND RSEL1 RSEL2 AVDD 16M-bit DRAM ¥ 2 MSM6791 ¡ Semiconductor APPLICATION CIRCUITS (Continued) RSEL1 RSEL2 AVDD MSM6688/6788 8MHz MSM514100A (4) MSM514100A (3) MSM514100A (2) Figure 6. Application Circuit Example when DRAM is used as a record/ playback memory of MSM6688/6788 and two 2M-bit serial voice ROMs (MSM6596-XXX) are used. GND MSM514100A (5) MSM6596-XXX (2) DOUT CS1 CS2 TEST GND VCC MSM514100A (6) SADX SASX SADY SASY RDCK TAS VCC A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CAS RAS XWE DOUT DIN MSM514100A (7) MSM6596-XXX (1) DOUT CS1 CS2 TEST GND SADX SASX SADY SASY RDCK TAS VCC CAS1 CAS2 CAS3 CAS4 CAS5 CAS6 CAS7 CAS8 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAS XWE XDIN VDD TEST GND GND MSM6791 DGND XT XT M1 M2 CS1 CS2 CS3 CS4 SAD SAS TAS RWCK WE DOUT TEST VDD MSM514100A (1) AGND CS1 CS2 CS3 CS4 DROM SADX SAS TAS RWCK WE DI/O SADY DVDD 4M-bit DRAM ¥ 8 ¡ Semiconductor MSM6791 APPLICATION CIRCUITS (Continued) MSM514100A (8)