Datasheet
Termination Regulator for DDR-SDRAMs
BD3537F
General Description
Key Specifications
BD3537F is a termination regulator that complies with
JEDEC requirements for DDR-SDRAM, This linear
power supply uses a built-in N-channel MOSFET and
high-speed OP-AMPS specially designed to provide
excellent transient response. It has a sink/source
current capability up to 1.8A and has a power supply
bias requirement of 5.0V for driving the N-channel
MOSFET. For BD3537F, ceramic capacitor can be
used as output capacitor enabling significant package
profile downsizing as the total regulator part.
Termination Input Voltage Range:
1.746V to 1.854V
VCC Input Voltage Range:
4.75V to 5.25V
Output Current:
1.8A (Max)
High side FET ON-Resistance:
0.3Ω(Typ)
Low side FET ON-Resistance:
0.3Ω(Typ)
Standby Current:
50µA (Typ)
Operating Temperature Range: -30°C to +100°C
Package
W(Typ) x D(Typ) x H(Max)
Features
Incorporates a Push-Pull Power Supply for
Termination (VTT)
Incorporates an Enabler
Incorporates an Undervoltage Lockout (UVLO)
Incorporates a Thermal Shutdown Protector (TSD)
Compatible with Dual Channel (DDR-II)
Incorporates Soft-start Function
Applications
Power supply for DDR I/II - SDRAM
SOP8
5.00mm x 6.20mm x 1.71mm
Typical Application Circuit, Block Diagram
VTT_IN
VDDQ
C2
C1
R1
C4
R2
VCC
REF
VTT_IN
VCC
VCC
-
Reference
+
Block
UVLO
Enable
Block
Thermal
Protection
+
-
-
EN
TSD
EN
UVLO
VTT
VCC
C3
VTT
+
TSD
EN
UVLO
TSD
GND
○Product structure：Silicon monolithic integrated circuit
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BD3537F
Pin Configuration
Pin Descriptions
TOP VIEW
Pin
No.
1
VTT_IN 1
8 N.C
GND 2
7 N.C
REF
VTT
3
4
6 VCC
5 N.C
Pin
Pin Function
Name
VTT_IN Termination power supply pin
2
GND
Ground pin
3
REF
Reference voltage output pin
4
VTT
Termination output pin
5
N.C
Non connection
6
VCC
VCC pin
7
N.C
Non connection
8
N.C
Non connection
Description of Blocks
1.
VCC
The VCC pin is for the independent power supply input that operates the external circuit of the IC. It is the voltage pin
that drives the IC’s amplifier circuits. The VCC input is 5V and the maximum current consumption is 2.5mA. A bypass
capacitor of 1μF or so should be connected to this pin when using the IC in an application circuit.
2.
VTT_IN
VTT_IN is a power supply input pin for VTT output. Input voltage may range up to 1.8V, but consideration must be
given to the current limit dictated by the ON-Resistance of the IC and the change in allowable loss due to input/output
voltage difference.
Take note that a high-impedance voltage input at VTT_IN may result in oscillation or degradation in ripple rejection, so
connecting a 10μF capacitor with minimal change in capacitance to VTT_IN terminal is recommended. However, the
impedance may depend on the characteristics of the power supply input and the impedance of the PC board wiring,
which must be carefully checked before use.
3.
VTT
VTT is the output pin for the DDR memory termination voltage and it has a sink/source current capability of ±1.8A. The
output voltage is same as REF voltage. The output is turned to OFF when REF pin is “LOW” or when either the VCC
UVLO or thermal shutdown protection function is activated.
Always connect a capacitor to VTT pin for a loop gain and phase compensation and a reduction in output voltage
variation in the event of sudden load change. Be careful in choosing the capacitor as insufficient capacitance may
cause an oscillation and high ESR (Equivalent Series Resistance) may result in increased output voltage variation
during a sudden change in load. A 10 μF or so ceramic capacitor is recommended, though ambient temperature and
other conditions should also be considered. A low ESR ceramic capacitor may reduce a loop gain phase margin and
may cause an oscillation, which may be improved by connecting a resister in series with the OS - capacitor (several hundred µF).
4.
REF
A ”High” input of 0.6V or higher to REF turns ON the VTT output. A “Low” input of 0.15 V or less, on the other hand,
turns VTT to a Hi-Z state.
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Absolute Maximum Ratings
Parameter
Input Voltage
REF Input Voltage
Termination Input Voltage
Symbol
Limit
Unit
VCC
7 (Note 1)
V
VREF
(Note 1)
V
7 (Note 1)
V
7
VVTT_IN
Output Current
IVTT
1.8
A
Power Dissipation1
Pd1
0.56 (Note 2)
W
Power Dissipation2
Pd2
0.69 (Note 3)
W
Operating Temperature Range
Topr
-30 to +100
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Tjmax
+150
°C
Maximum Junction Temperature
(Note 1) Should not exceed Pd.
(Note 2) Derate by 4.48mW/°C for Ta over 25°C (no heat sink).
(Note 3) Derate by 5.52mW/°C for Ta over 25°C (when mounted on 70mm x 70mm x 1.6mm Glass-epoxy PCB).
Caution: Operating the IC over the absolute maximum ratings may damage the IC. In addition, it is impossible to predict all destructive situations such as
short-circuit modes, open circuit modes, etc. Therefore, it is important to consider circuit protection measures, like adding a fuse, in case the IC is operated in a
special mode exceeding the absolute maximum ratings
Recommended Operating Conditions (Ta=25°C)
Parameter
Input Voltage
Termination Input Voltage
Reference Voltage
Symbol
Min
Max
Unit
VCC
4.75
5.25
V
VVTT_IN
1.746
1.854
V
VREF
0.6
1.6
V
Electrical Characteristics
(Unless otherwise noted, Ta=25°C, VCC=5V, VREF=0.9V, VVTT_IN=1.8V)
Standard Value
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Standby Current
IST
-
50
90
µA
VREF <0.15V(Shutdown)
Bias Current
ICC
-
1
2.5
mA
VREF =0.9V
Termination Output Voltage 1
VVTT1
VREF-20m
VREF
VREF+20m
V
IVTT =0A
Termination Output Voltage 2
VVTT2
VREF-20m
VREF
VREF+20m
V
IVTT=-1.8A to +1.8A
Source Current
IVTT+
1.8
-
-
A
Sink Current
IVTT-
-
-
-1.8
A
Upper Side ON-Resistance 1
RHRON1
-
0.3
0.5
Ω
Lower Side ON-Resistance 1
RLRON1
-
0.3
0.5
Ω
UVLO Threshold Voltage
VUVLO
3.5
3.8
4.1
V
UVLO Hysteresis Voltage
∆VUVLO
100
160
220
mV
EN-ON Voltage
VENH
0.6
-
-
V
EN-OFF Voltage
VENL
-
-
0.15
V
[Termination]
[UVLO block]
VCC : sweep up
VCC : sweep down
[Enable Block]
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Typical Waveforms
VVTT (50mV/Div.)
VVTT (50mV/Div.)
IVTT (1A/Div.)
IVTT (1A/Div.)
Figure 1. DDRI
(-1A → +1A)
Figure 2. DDRI
(+1A → -1A)
VVTT (50mV/Div.)
VVTT (50mV/Div.)
IVTT (1A/Div.)
IVTT (1A/Div.)
Figure 4. DDR II
(-1A → +1A)
Figure 3. DDR II
(-1A → +1A)
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Typical Waveforms – continued
VTT
VTT
REF
REF
VTT_IN
VTT_IN
VCC
VCC
Figure 5. Input Sequence 1
Figure 6. Input Sequence 2
VTT
VREF(500mV/div)
REF
VVTT(500mV/div)
VTT_IN
IVTT_IN(50mA/div)
VCC
(100µsec/div)
Figure 8. Soft Start
Figure 7. Input Sequence 3
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Typical Performance Curves
0.912
Terminal Output
VTT(V)Voltage : VVTT (V)
VTT (V)
Terminal Output Voltage : VVTT (V)
1.258
1.256
1.254
1.252
1.250
1.248
1.246
0.910
0.908
0.906
0.904
0.902
0.900
0.898
0.896
1.244
-2
-1
0
1
2
-2
0
1
2
Figure 10. Terminal Output Voltage vs Output Current
(DDR-II)
Figure 9. Terminal Output Voltage vs Output Current
(DDR-I)
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Output Current
: IVTT (A)
ITT(A)
Output Current
: IVTT (A)
ITT(A)
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BD3537F
Application Information
1.
Soft Start Function
(1) When input REF voltage
VCC
REF
EN shutdown (0.6V/TYP)
VTTIN
VTT
tSOFT
Include soft start
(2) When input VCC voltage
VCC
UVLO released (3.8V/TYP)
REF
VTTIN
VTT
tSOFT
Include soft start
(3) When input VTTIN voltage
VCC
REF
VTTIN
VTT
No soft start
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BD3537F
2.
Evaluation Board
■BD3537F Evaluation Board circuit
C10
VTTIN
U1
3
C9
C2
GND
4
C7
C1
GND
VTT
R1
VREF
VTT
VTTIN
C8
1
VDDQ
C12
C13
REF
M1
R3
EN
R2
BD3537F
VCC
SW
VCC
M0
R4
6
C4
C11
GND
C3
C6
C5
VCC
GND
2
GND
GND
■BD3537F Evaluation Board Application Components
部品
U1
M0
M1
C1
C2
C3
C4
C5
C6
C7
定格
メーカー
ROHM
型名
BD3537F
10µF
1µF
KYOCERA
KYOCERA
CM316B106M10A
CM05B105K10A
1µF
KYOCERA
CM05B105K10A
部品
C8
C9
C10
R1
R2
R3
R4
R5
R6
定格
メーカー
型名
10µF
KYOCERA
CM316B106M10A
100kΩ
100kΩ
ROHM
ROHM
MCR03
MCR03
■BD3537F (SOP8) Evaluation Board Layout
Silk Screen
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BD3537F
3.
Power Dissipation
In thermal design, consider the temperature range where IC is guaranteed to operate and appropriate margins. The
temperature conditions that need to be considered are listed below:
(1) Ambient temperature Ta: 100°C or lower
(2) Chip junction temperature Tj: 150°C or lower
The chip junction temperature Tj can be considered as follows:
Most of heat loss in BD3537F occurs at the output N-Channel FET. The lost power is determined by multiplying the
voltage between IN and OUT by the output current. Since this IC is packaged for high-power applications, its thermal
derating characteristics significantly depend on the PCB. So when designing, the size of the PCB to be used should be
carefully considered.
Power dissipation (W) = {Input voltage (VVTT_IN) – Output voltage (VVTT = VREF)} x IOUT (Ave)
If VVTT_IN=1.8V, VREF=0.9V, and IOUT (Ave)=0.5A, for instance, the power dissipation is determined as follows:
Power consumption (W) = 1.8 (V) - 0.9 (V) 0.5(A)
= 0.4(W)
◎SOP8(BD3537F)
[W]
0.70
Power Dissipation [Pd]
(1) 70mm x 70mm x 1.6mm Glass-epoxy PCB
θj-c=181°C/W
(2) With no heat sink
θj-a=222°C/W
(1) 0.69W
0.60
0.50
(2) 0.56W
0.40
100°C
0.30
0.20
0.10
0
0
25
50
75
100
125
[°C]
Ambient Temperature [Ta]
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BD3537F
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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Operational Notes – continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 11. Example of monolithic IC structure
13. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will exceed 175°C which will activate the TSD circuit that will turn OFF all output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
14. Capacitor Across Output and GND
If a large capacitor is connected between the output pin and ground pin, current from the charged capacitor can flow
into the output pin and may destroy the IC when the VCC or IN pin is shorted to ground or pulled down to 0V. Use a
capacitor smaller than 1000µF between output and ground.
15. Output Capacitor
Do not fail to connect a output capacitor to VTT output terminal for stabilization of output voltage. The output capacitor
works as a loop gain phase compensator and an output voltage variation reducer in the event of sudden change in
load. Insufficient capacitance may cause an oscillation. And if the equivalent series resistance (ESR) of this capacitor
is high, the variation in output increases in the event of sudden change in load. It is recommended to connect a 10 μF
or so ceramic capacitor, though it depends on ambient temperature and load conditions. It is therefore requested to
carefully check under the actual temperature and load conditions to be applied.
16. Input Capacitor s Setting
These input capacitors are used to reduce the output impedance of power supply to be connected to the input
terminals (VCC and VTT_IN). Increase in the power supply output impedance may result in oscillation or degradation
in ripple rejecting characteristics. It is recommended to use a low temperature coefficient 1μF (for VCC) and 10μF (for
VTT_IN) capacitor, but it depends on the characteristics of the power supply input, and the capacitance and
impedance of the pc board wiring pattern. It is therefore requested to carefully check under the actual temperature
and load conditions to be applied.
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BD3537F
Operational Notes – continued
17. Input Terminals (VCC, VTT_IN and REF)
VCC, VTT_IN and REF terminals of this IC are made up independent one another. To VCC terminal, the UVLO
function is provided for malfunction protection. Irrespective of the input order of the inputs terminals, VTT output is
activated to provide the output voltage when UVLO voltages reach the threshold voltage while REF voltage reaches
the threshold of EN.
18. REF Pin
REF pin controls this IC’s status ON or OFF. When REF voltage reaches EN-ON voltage, the output voltage operates.
19. Operating Range
Within the operating range, the operation and function of the circuits are generally guaranteed at an ambient
temperature within the range specified. The values specified for electrical characteristics may not be guaranteed, but
drastic change may not occur to such characteristics within the operating range.
20. Thermal Shutdown Circuits
This IC incorporates a built-in-thermal shutdown circuit, to prevent the IC from thermal breakdown. In thermal
shutdown circuit operation, VTT output to be OFF. The thermal shutdown circuit is originally designed to protect
the incorporated IC i so that thermal design needs to be designed below the temperature, which enables to run the
thermal shutdown circuits.
21. In the event that a load containing a large inductance component is
connected to the output terminal, and generation of back-EMF at the
start-up and when output is turned OFF is assumed, it is requested
to insert a protection diode.
(Example)
OUTPUT PIN
22. Application Circuit
Although we can recommend the application circuit contained herein with a relatively high degree of confidence,
we ask that you verify all characteristics and specifications of the circuit as well as its performance under actual
conditions. Please note that we cannot be held responsible for problems that may arise due to patent infringements
or noncompliance with any and all applicable law and regulations.
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BD3537F
Ordering Information
B
D
3
5
3
7
F
-
Package
F : SOP8
Part Number
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
SOP8 (TOP VIEW)
Part Number Marking
D3537
LOT Number
1PIN MARK
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BD3537F
Physical Dimension, Tape and Reel Information
Package Name
SOP8
(Max 5.35 (include.BURR))
(UNIT : mm)
PKG : SOP8
Drawing No. : EX112-5001-1
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BD3537F
Revision History
Date
Revision
02.Nov.2015
001
Changes
New Release
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
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[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
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H2S, NH3, SO2, and NO2
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[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BD3537F - Web Page
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BD3537F
SOP8
1500
1500
Taping
inquiry
Yes