FDZ202P P-Channel 2.5V Specified PowerTrenchTM BGA MOSFET General Description Features Combining Fairchild’s advanced 2.5V specified PowerTrench process with state of the art BGA packaging, the FDZ202P minimizes both PCB space and RDS(ON). This BGA MOSFET embodies a breakthrough in packaging technology which enables the device to combine excellent thermal transfer characteristics, high current handling capability, ultralow profile packaging, low gate charge, and low RDS(ON). •= –5.5 A, –20 V. RDS(ON) = 0.045 Ω=@ VGS = –4.5 V RDS(ON) = 0.075 Ω @ VGS = –2.5 V. •= Occupies only 5 mm2 of PCB area. Only 55% of the area of SSOT-6 •= Ultra-thin package: less than 0.70 mm height when mounted to PCB Applications •= Outstanding thermal transfer characteristics: 4 times better than SSOT-6 •= Battery management •= Load switch •= Ultra-low Qg x RDS(ON) figure-of-merit. •= Battery protection •= High power and current handling capability. D D S S S G S S D D D S Pin 1 F202 Pin 1 D Bottom Top Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, Tstg G D TA=25oC unless otherwise noted Parameter Ratings Units Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous (Note 1a) – Pulsed Power Dissipation (Steady State) (Note 1a) Operating and Storage Junction Temperature Range –20 ±12 –5.5 –20 2.7 -55 to +175 V V A W °C 55 8 °C/W °C/W Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) Package Marking and Ordering Information Device Marking F202 1999 Fairchild Semiconductor Corporation Device FDZ202P Reel Size TBD Tape width TBD Quantity TBD FDZ202P Rev. A (W) FDZ202P November 1999 ADVANCE INFORMATION Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS ===∆TJ IDSS IGSSF IGSSR Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage Current, Forward Gate–Body Leakage Current, Reverse On Characteristics VGS(th) RDS(on) VGS = 0 V, ID = –250 µA ID = –250 µA, Referenced to 25°C VDS = –16 V, VGS = 0 V VGS = –12 V, VDS = 0 V VGS = 12 V –20 V mV/°C 28 –1 –100 µA nA 100 nA –0.9 0.036 0.060 –1.5 0.045 0.075 V Ω –0.77 –2.3 –1.2 A V VDS = 0 V (Note 2) Gate Threshold Voltage Static Drain–Source On–Resistance VDS = VGS, ID = –250 µA VGS = –4.5 V, ID = –5.5 A VGS = –2.5 V, ID = –4.0 A –0.4 Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = –2.3 A Voltage (Note 2) Notes: 1. RθJA is the a function of the junction-to-case (RθJC), case-to-ambient (RθCA ) and the PC Board (RθBA ) thermal resistance where the case thermal reference is defined the top surface of the package. RθJC is guaranteed by design while RθCA and RθBA are determined by the user's design. (a). RθJA = 55°C/W (steady-state) when mounted on 1 in2 of 2 oz. copper. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDZ202P Rev. A (W) FDZ202P Electrical Characteristics FDZ202P Dimensional Outline and Pad Layout 2.15 1.85 SYMM CL Ø 0.40 F202 Date/vendor Code CL 2 1 CL INDEX SLOT 3 A D D D B G S S 1.95 SYMM CL 2.70 2.30 C S S S D D D D 0.65 0.65 1.30 RECOMMENDED LAND PATTERN TOP VIEW 0.76 SOLDER BALL, Ø 0.30 0.25 CL D SOLDER BALL Ø 0.30 1.95 C CL GATE FRONT VIEW INDEX SLOT (HIDDEN) B 0.65 A 1 0.51 2 3 0.65 1.30 BOTTOM VIEW SEATING PLANE SIDE VIEW NOTES: UNLESS OTHERWISE SPECIFIED A) ALL DIMENSIONS ARE IN MILLIMETERS. B) NO JEDEC REGISTRATION REFERENCE AS OF JULY 1999. FDZ202P Rev. A (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ISOPLANAR™ MICROWIRE™ POP™ PowerTrench QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. D