CYStech Electronics Corp. Spec. No. : C056E3 Issued Date : 2017.02.14 Revised Date : Page No. : 1/ 8 N-Channel Enhancement Mode Power MOSFET MTE7D0N10RE3 BVDSS ID@VGS=10V, TC=25°C ID@VGS=10V, TA=25°C RDS(ON)@VGS=10V, ID=20A Features • Low On Resistance • Simple Drive Requirement • Low Gate Charge • Fast Switching Characteristic • RoHS compliant package Symbol 100V 80A 11.6A 6.5 mΩ(typ) Outline MTE7D0N10RE3 TO-220 G：Gate D：Drain S：Source GDS Ordering Information Device Package Shipping TO-220 MTE7D0N10RE3-0-UB-X 50 pcs/tube, 20 tubes/box, 4 boxes / carton (Pb-free lead plating package) Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, UB : 50 pcs / tube, 20 tubes/box Product rank, zero for no rank products Product name MTE7D0N10RE3 CYStek Product Specification Spec. No. : C056E3 Issued Date : 2017.02.14 Revised Date : Page No. : 2/ 8 CYStech Electronics Corp. Absolute Maximum Ratings (TC=25°C) Parameter Symbol Limits Drain-Source Voltage (Note 1) VDS Gate-Source Voltage VGS Continuous Drain Current @TC=25°C, VGS=10V(silicon limit) (Note 1) ID Continuous Drain Current @TC=25°C, VGS=10V(package limit) (Note 1) Continuous Drain Current @TC=100°C, VGS=10V (Note 1) Continuous Drain Current @TA=25°C, VGS=10V (Note 2) IDSM Continuous Drain Current @TA=70°C, VGS=10V (Note 2) Pulsed Drain Current @ VGS=10V IDM Avalanche Current @L=100μH IAS Single Pulse Avalanche Energy @ L=1mH, ID=43 Amps, EAS VDD=25V (Note 4) Repetitive Avalanche Energy (Note 3) EAR TC=25°C (Note 1) PD TC=100°C (Note 1) Power Dissipation TA=25°C (Note 2) PDSM TA=70°C (Note 2) Maximum Temperature for Soldering @ Lead at 0.063 in(1.6mm) TL from case for 10 seconds Maximum Temperature for Soldering @ Package Body for 10 TPKG seconds Operating Junction and Storage Temperature Tj, Tstg 100 ±20 100* 80* 70.7* 13.6 9.3 370* 95 Unit V A 924 mJ 18 188 94 2.1 1.4 W 300 °C 260 -55~+175 *Drain current limited by maximum junction temperature Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max (Note 2) Symbol RθJC RθJA Value 0.8 58 Unit °C/W Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2. The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user’s specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. 3. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C. 4. 100% tested by conditions of L=0.1mH, IAS=30A, VGS=10V, VDD=50V. MTE7D0N10RE3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C056E3 Issued Date : 2017.02.14 Revised Date : Page No. : 3/ 8 Characteristics (Tj=25°C, unless otherwise specified) Symbol Static BVDSS ∆BVDSS/∆Tj VGS(th) *GFS IGSS IDSS Min. Typ. Max. Unit 100 2 - 60 28.6 6.5 4 ±100 1 25 9 V mV/°C V S nA 70.1 22.8 15.6 34.4 19.8 58.8 10.4 4221 349 7 0.8 - 0.81 41.9 73.5 80 370 1.2 - *RDS(ON) Dynamic *Qg *Qgs *Qgd *td(ON) *tr *td(OFF) *tf Ciss Coss Crss Rg Source-Drain Diode *IS *ISM *VSD *trr *Qrr - Test Conditions mΩ VGS=0V, ID=250μA Reference to 25°C, ID=250μA VDS = VGS, ID=250μA VDS =10V, ID=20A VGS=±20V VDS =80V, VGS =0V VDS =80V, VGS =0V, Tj=125°C VGS =10V, ID=20A nC VDD=80V, ID=20A,VGS=10V ns VDD=50V, ID=20A, VGS=10V, RG=3Ω pF VGS=0V, VDS=50V, f=1MHz Ω f=1MHz μA A V ns nC IS=20A, VGS=0V VGS=0V, IF=20A, dIF/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% MTE7D0N10RE3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C056E3 Issued Date : 2017.02.14 Revised Date : Page No. : 4/ 8 Typical Characteristics Brekdown Voltage vs Junction Temperature Typical Output Characteristics 1.4 BVDSS, Normalized Drain-Source Breakdown Voltage 100 ID, Drain Current(A) 10V,9V,8V,7V,6V 80 60 5V 40 4.5V 20 1.2 1 0.8 ID=250μA, VGS=0V 0.6 VGS=4V 0.4 0 0 2 4 6 8 VDS, Drain-Source Voltage(V) -75 -50 -25 10 Reverse Drain Current vs Source-Drain Voltage Static Drain-Source On-State resistance vs Drain Current 10 VSD, Source-Drain Voltage(V) RDS(ON) , Static Drain-Source On-State Resistance(mΩ) 1.2 VGS=10V 1 Tj=25°C 0.8 0.6 Tj=150°C 0.4 0.2 1 0.1 1 10 ID, Drain Current(A) 0 100 5 10 15 IDR , Reverse Drain Current(A) 20 Drain-Source On-State Resistance vs Junction Tempearture Static Drain-Source On-State Resistance vs Gate-Source Voltage 2.8 R DS(ON) , Normalized Static DrainSource On-State Resistance 100 R DS(ON) , Static Drain-Source OnState Resistance(mΩ) 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) 90 ID=20A 80 70 60 50 40 30 20 10 2.4 VGS=10V, ID=20A 2 1.6 1.2 0.8 0.4 RDS(ON) @Tj=25°C : 6.5mΩ typ. 0 0 0 MTE7D0N10RE3 2 4 6 8 VGS, Gate-Source Voltage(V) 10 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) CYStek Product Specification Spec. No. : C056E3 Issued Date : 2017.02.14 Revised Date : Page No. : 5/ 8 CYStech Electronics Corp. Typical Characteristics(Cont.) Threshold Voltage vs Junction Tempearture Capacitance vs Drain-to-Source Voltage VGS(th), Normalized Threshold Voltage 10000 Capacitance---(pF) Ciss 1000 Coss 100 10 Crss 1.4 1.2 ID=1mA 1 0.8 0.6 ID=250μA 0.4 0.2 1 0 10 20 30 40 VDS, Drain-Source Voltage(V) -75 -50 -25 50 75 100 125 150 175 200 Gate Charge Characteristics 100 10 VDS=10V VGS, Gate-Source Voltage(V) GFS , Forward Transfer Admittance(S) 25 50 Tj, Junction Temperature(°C) Forward Transfer Admittance vs Drain Current 10 VDS=15V 1 0.1 Pulsed Ta=25°C 0.01 0.001 VDS=20V, 50V, 80V from left to right 8 6 4 2 ID=20A 0 0.01 0.1 1 ID, Drain Current(A) 10 0 100 8 16 24 32 40 48 56 64 Total Gate Charge---Qg(nC) 72 80 Maximum Drain Current vs Case Temperature Maximum Safe Operating Area 100 RDS(ON) Limited ID, Maximum Drain Current(A) 1000 ID, Drain Current(A) 0 10 μs 100 100μs 1ms 10 10ms TC=25°C, Tj=175°C, VGS=10V,RθJC=0.8°C/W single pulse 1 100ms DC Silicon Limit 80 Package Limit 60 40 20 VGS=10V, RθJC=0.8°C/W 0 0.1 0.1 MTE7D0N10RE3 1 10 100 VDS, Drain-Source Voltage(V) 1000 25 50 75 100 125 150 TC , Case Temperature(°C) 175 200 CYStek Product Specification Spec. No. : C056E3 Issued Date : 2017.02.14 Revised Date : Page No. : 6/ 8 CYStech Electronics Corp. Typical Characteristics(Cont.) Single Pulse Maximum Power Dissipation Typical Transfer Characteristics 2000 100 1800 Peak Transient Power (W) VDS=10V ID, Drain Current (A) 80 60 40 20 TJ(MAX) =175°C TC=25°C RθJC=0.8°C/W 1600 1400 1200 1000 800 600 400 200 0 0 2 4 6 8 0 0.0001 10 0.001 VGS, Gate-Source Voltage(V) 0.01 0.1 Pulse Width(s) 1 10 Transient Thermal Response Curves r(t), Normalized Effective Transient Thermal Resistance 1 D=0.5 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=0.8 °C/W 0.2 0.1 0.1 0.05 0.02 0.01 Single Pulse 0.01 1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 1.E+01 t1, Square Wave Pulse Duration(s) MTE7D0N10RE3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C056E3 Issued Date : 2017.02.14 Revised Date : Page No. : 7/ 8 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTE7D0N10RE3 CYStek Product Specification Spec. No. : C056E3 Issued Date : 2017.02.14 Revised Date : Page No. : 8/ 8 CYStech Electronics Corp. TO-220 Dimension Marking: 4 Device Name E7D0 N10R Date Code □□□□ 1 3-Lead TO-220 Plastic Package CYStek Package Code: E3 2 3 Style: Pin 1.Gate 2.Drain 3.Source 4.Drain *: Typical Millimeters Min. Max. 4.400 4.600 2.250 2.550 0.710 0.910 1.170 1.370 0.330 0.650 1.200 1.400 10.250 9.910 9.750 8.950 12.650 12.950 DIM A A1 b b1 c c1 D E E1 Inches Min. Max. 0.173 0.181 0.089 0.100 0.028 0.036 0.046 0.054 0.013 0.026 0.047 0.055 0.404 0.390 0.384 0.352 0.510 0.498 DIM e e1 F H h L L1 V Φ Millimeters Min. Max. 2.540* 4.980 5.180 2.650 2.950 8.100 7.900 0.000 0.300 12.900 13.400 2.850 3.250 7/500 REF 3.400 3.800 Inches Min. Max. 0.100* 0.196 0.204 0.104 0.116 0.319 0.311 0.000 0.012 0.508 0.528 0.112 0.128 0.295 REF 0.134 0.150 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead: Pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTE7D0N10RE3 CYStek Product Specification