LINER LT3587 High voltage monolithic inverter and dual boost Datasheet

LT3587
High Voltage Monolithic
Inverter and Dual Boost
FEATURES
DESCRIPTION
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The LT®3587 provides a one chip solution for applications
requiring two positive and one negative high voltage supplies. The LT3587 input voltage range of 2.5V to 6V makes
it ideal for various battery-powered systems.
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Ideal for CCD, LCD, LED Backlight and OLED
Applications
Easy Generation of 15V (50mA), –8V (100mA) and
20V (20mA) from a Li-Ion Cell
VVIN Range: 2.5V to 6V
Wide Output Ranges: Up to 32V for the Boosts and
Up to –32V for the Inverter
Output Disconnect for the Boost Channels
Boost3 Allows Voltage Programming and/or Current
Programming for a ‘One Wire Current Source’
Overload Fault Protection with Fault I/O Pin Indicator
Combined Soft-Start and Enable Pins
Small 20-Pin 3mm × 3mm QFN Package
A single resistor programs each of the three output voltage
levels and the output current of Boost3. The intelligent softstart allows for sequential soft-start of the Boost1 output
followed by the negative output with a single capacitor.
Internal sequencing circuitry also disables the inverter until
the Boost1 output has reached 87% of its final value.
The LT3587 integrates all the power switches, soft-start,
and output-disconnect circuits into a small 3mm × 3mm
QFN package. This high level of integration combined
with small external components makes the LT3587 ideal
for space constrained applications.
APPLICATIONS
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Digital Still and Video Cameras
Scanner and Display Systems
PDA, Cellular Phones and Handheld Computers
LED Backlight and OLED Display Drivers
CCD Imager Bias
General High Voltage Supply Bias
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Li-Ion Powered Supply for CCD Imager and Six White Backlight LEDs
VVIN
2.5V TO 6V
10μH
Efficiency Curve
15μH
1μF
90
SW3
CAP3
VIN
VOUT1
FB1
GND
FB2
SW2
LED DRIVER
20mA, UP TO 6 LEDS
ALL CHANNELS
ENABLED
75
70
500
400
CDD–
65
LED
300
POWER DISSIPATION
ALL CHANNELS
ENABLED
200
55
2.2μF
15μH
700
600
60
1M
6.8pF
VVIN
2.5V TO 6V
800
CDD+
80
1M
VOUT3
VFB3
EN/SS3
FLT
CCD POSITIVE
15V, 50mA
2.7pF
LT3587
EN/SS1
CDD+ = 50mA
–
85 CDD = 100mA
LED = 20mA
10μF
50
15μH
22μF
CCD NEGATIVE
–8V, 100mA
POWER DISSIPATION (mW)
IFB3
8.06k
SW1
CAP1
EFFICIENCY (%)
2.2μF
100
0
0.5
1
NORMALIZED CURRENT
0
1.5
3587 TA01b
3587 TA01a
3587fc
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LT3587
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
EN/SS1
VIN
EN/SS3
VFB3
IFB3
TOP VIEW
VIN ..............................................................................6V
Soft-Start Input Pins
EN/SS1, EN/SS3 .....................................................6V
Feedback Pins
FB1, FB2, IFB3, VFB3 ................................. –0.2V to 6V
High Voltage Switch Pins
SW1, SW2, SW3...................................................40V
High Voltage Output Pins
CAP1, CAP3, VOUT1, VOUT3 ...................................32V
Bidirectional I/O Pin
FLT ..........................................................................6V
FLT Current ........................................................10mA
Operating Junction Temperature Range .. –40°C to 125°C
Storage Temperature Range................... –65°C to 125°C
20 19 18 17 16
15 FB1
VOUT3 1
14 VOUT1
CAP3 2
13 CAP1
21
SW3 3
12 GND
GND 4
FLT 5
8
9 10
FB2
GND
SW2
NC
7
GND
11 SW1
6
UD PACKAGE
20-LEAD (3mm s 3mm) PLASTIC QFN
θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3587EUD#PBF
LT3587EUD#TRPBF
LDNC
20-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VVIN = 3.6V, VEN/SS1 = VEN/SS3 = VVIN unless otherwise noted (Note 2, 3).
PARAMETER
CONDITIONS
MIN
Operating Input Voltage Range
Quiescent Current
TYP
2.5
MAX
UNITS
6
V
VEN/SS1 = 0V, VEN/SS3 = VVIN OR
VEN/SS1 = VVIN, VEN/SS3 = 0V OR
VEN/SS1 = VEN/SS3 = VVIN
Not Switching
2.4
4
mA
VEN/SS1 = VEN/SS3 = 0V, In Shutdown
5.5
9
μA
1.2
Switching Frequency
l
0.8
1
Maximum Duty Cycle
l
87
93
Minimum On Time
50
Power Fault Delay from Any Output to FLT
16
FLT Input Threshold Low
l
0.4
1.0
MHz
%
70
ns
ms
1.6
V
FLT Leakage Current
VFLT = 5V
l
±1
μA
FLT Voltage Output Low
IFLT = 1mA
l
0.4
V
3587fc
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LT3587
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VVIN = 3.6V, VEN/SS1 = VEN/SS3 = VVIN unless otherwise noted (Note 2, 3).
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
60
150
μA
Boost1
CAP1 Bias Current
VCAP1 = 15V, VOUT1 = Open
FB1 Reference Voltage
VOUT1 Output Voltage
RFB1 = 1MΩ
l
1.19
1.22
1.25
V
l
14.25
15
15.75
V
800
SW1 Current Limit
990
mA
SW1 VCESAT
ISW1 = 400mA
200
mV
SW1 Leakage Current
VSW1 = 15V
0.1
EN/SS1 for Full Inductor Current
VFB1 = 1.1V, VFB2 = 0.1V
l
EN/SS1 Shutdown Voltage Threshold
5
μA
2.5
V
0.2
V
EN/SS1 Pin Bias Current
VEN/SS1 = 0V
–0.5
–1
VOUT1 Current Limit
VCAP1 = 15V
100
155
CAP1 to VOUT1 On-Resistance (RDISC1)
VCAP1 = 15V, IVOUT1= 50mA
VOUT1 Disconnect Leakage
VVIN = VCAP1 = 6V, VVOUT1 = 0V
–1.5
μA
mA
5
8
Ω
0.1
1
μA
mV
Inverter
FB2 Reference Voltage
Output Voltage
RFB2 = 1MΩ
l
–10
5
20
l
–7.5
–8
–8.5
900
1090
mA
mV
SW2 Current Limit
V
SW2 VCESAT
ISW2 = 600mA
250
SW2 Leakage Current
VSW2 = 15V
0.1
5
μA
FB1 Threshold to Start Negative Channel
Percent of Final Regulation Value
87
90
%
CAP3 Bias Current
VCAP3 = 15V, VOUT3 = Open
70
150
μA
Boost3 Programmed Current
RIFB3 = 8.06kΩ
l
18
20
22
mA
VFB3 Reference Voltage
RVFB3 = 1MΩ, IVOUT3 = 20mA
l
0.77
0.8
0.83
VOUT3 Output Voltage
RVFB3 = 1MΩ, IVOUT3 = 20mA
l
14
15
16
400
480
mA
mV
Boost3
SW3 Current Limit
SW3 VCESAT
ISW3 = 200mA
250
SW3 Leakage Current
VSW3 = 15V
0.1
EN/SS3 for Full Inductor Current
VVFB3 = VIFB3 = 0.6V
l
EN/SS3 Shutdown Voltage Threshold
V
V
5
μA
2
V
–1.5
μA
0.2
V
EN/SS3 Pin Bias Current
VEN/SS3 = 0V
VOUT3 Current Limit
VCAP3 = 15V, VIFB3 = 0V
CAP3 to VOUT3 On Resistance (RDISC3)
VCAP3 = 15V, IVOUT3 = 20mA
10
15
Ω
VOUT3 Disconnect Leakage
VVIN = VCAP3 = 6V, VVOUT3 = 0V
0.1
1
μA
29
31
V
CAP3 Pin Overvoltage Clamp
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
–0.5
–1
70
110
27
mA
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 3: The LT3587 is guaranteed to meet specified performance from
0°C to 125°C. Specifications over the –40°C to 125°C operating range are
assured by design, characterization and correlation with statistical process
controls.
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LT3587
TYPICAL PERFORMANCE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted.
Quiescent Current
When On But Not Switching
vs Input Supply Voltage
Shutdown Quiescent Current
vs Input Supply Voltage
QUIESCENT CURRENT (mA)
90°C
6
25°C
–40°C
4
3
VVIN = EN/SS1 = EN/SS3 = 3.6V
FB1 = VFB3 = 1.5V
FB2 = IFB3 = 0V
125°C
8
2
2.5
2.20
3.5
4
5
4.5
INPUT VOLTAGE (V)
5.5
3.0
90°C
2.5
25°C
2.0
–40°C
1.5
2.5
6
125°C
3
3.5
4
5
4.5
INPUT VOLTAGE (V)
0.800
VIFB3
0.788
1.210
0
25
75
50
TEMPERATURE (°C)
FB2 REGULATION VOLTAGE (mV)
0.813
VFB3
VIFB3, VVFB3 REGULATION VOLTAGE (V)
REGULATION VOLTAGE (V)
15
0.825
FB1
–25
–25
0
25
75
50
TEMPERATURE (°C)
VVIN = 3.6V
RFB2 = 1MΩ
IVNEG = 100mA
5
0
–5
–10
–50
0.775
125
100
10
–25
0
25
75
50
TEMPERATURE (°C)
IVFB3
104
13.75
100
98
IIFB3
96
100
94
125
3587 G06
FB2 BIAS CURRENT (μA)
102
IFB1
–7.85
IFB3 BIAS CURRENT (μA)
BIAS CURRENT (μA)
–7.75
106
VVIN = 3.6V
RFB1 = RVFB3 =1MΩ
13.25 RIFB3 =8.06kΩ
IVOUT1 = 50mA
IVOUT3 = 20mA
13.00
–50 –25
50
0
25
75
TEMPERATURE (°C)
125
FB2 Bias Current in Regulation
vs Temperature
14.50
13.50
100
3587 G05
FB1, VFB3, IFB3 Bias Current in
Regulation vs Temperature
14.00
125
3587 G03
3587 G04
14.25
100
FB2 Regulation Voltage
vs Temperature
1.240
1.200
–50
2.00
–50
6
3587 G02
FB1, VFB3 and IFB3 Regulation
Voltage vs Temperature
1.220
2.10
2.05
5.5
3587 G01
VVIN = 3.6V
RFB1 = RVFB3 = 1MΩ
RIFB3 = 8.06kΩ
1.230 IVOUT1 = 50mA
IVOUT3 = 20mA
2.15
UVLO VOLTAGE (V)
VVIN = 3.6V
EN/SS1 = EN/SS3 = 0V
QUIESCENT CURRENT (μA)
VIN UVLO Voltage vs Temperature
3.5
10
VVIN = 3.6V
RFB2 =1MΩ
IVNEG = 100mA
–7.95
–8.05
–8.15
–8.25
–50
–25
0
25
75
50
TEMPERATURE (°C)
100
125
3587 G07
3587fc
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LT3587
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Frequency
vs Temperature
Switches Current Limit
vs Temperature
Switches VCESAT vs Current
0.5
1.20
Specifications are at TA = 25°C unless otherwise noted.
1.2
VVIN = 3.6V
VVIN = 3.6V
1.0
VCESAT (V)
0.90
SW1
SW2
0.3
0.2
0.1
0.80
–50
0
0
25
75
50
TEMPERATURE (°C)
–25
100
125
0
0.2
0.6
0.4
0.8
SW CURRENT (A)
1
1.0
SW1
0.8
RDISC3
8
RDISC1
6
4
2
–50
–25
50
0
25
75
TEMPERATURE (°C)
100
125
3587 G14
0
0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5
EN/SS3 VOLTAGE (V)
3587 G13
EN/SS1, EN/SS3 Pull-Up Current
In Shutdown vs Temperature
Output Disconnects Current Limit
vs Temperature
OUTPUT DISCONNECTS CURRENT LIMIT (mA)
ON RESISTANCE (Ω)
VVIN = 3.6V
IVOUT1 = 50mA
12 IVOUT3 = 20mA
0.2
3587 G12
Output Disconnects On Resistance
vs Temperature (RDISC1, RDISC3)
14
0.3
0.1
3587 G11
10
SW3
0.4
0
0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5
EN/SS1 VOLTAGE (V)
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
200.0
125
VVIN = 3.6V
SW2
1.50
VVIN = 3.6V
VVOUT1 = VVOUT3 = 15V
167.5
PULL-UP CURRENT (μA)
0
100
SW3 Current Limit
vs EN/SS3 Voltage
0.4
SW3
0.5
0
25
75
50
TEMPERATURE (°C)
3587 G10
1.2
CURRENT LIMIT (A)
CURRENT LIMIT (A)
2.0
SW1
–25
0.5
VVIN = 3.6V
DUTY CYCLE = 60%
VVIN = 3.6V
0
0
–50
1.2
1.6
2.5
1.5
SW3
0.4
SW1 and SW2 Current Limit
vs EN/SS1 Voltage
Switches Current Limit
vs Duty Cycle
SW2
0.6
3587 G09
3587 G08
SW2
SW1
0.8
0.2
CURRENT LIMIT (A)
FREQUENCY (MHz)
SW3
CURRENT LIMIT (A)
0.4
1.10
1.00
VVIN = 3.6V
DUTY CYCLE = 60%
IVOUT1
135.0
102.5
VVIN = 3.6V
EN/SS1 = EN/SS3 = 0V
1.25
1.00
0.75
IVOUT3
70
–50
–25
50
0
25
75
TEMPERATURE (°C)
100
125
3587 G15
0.50
–50
–25
50
0
25
75
TEMPERATURE (°C)
100
125
3587 G16
3587fc
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LT3587
TYPICAL PERFORMANCE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted.
EN/SS1, EN/SS3 Shutdown
Threshold vs Temperature
31
VVIN = 3.6V
CAP3 OV CLAMP VOLTAGE (V)
SHUTDOWN THRESHOLD VOLTAGE (V)
0.45
CAP3 Overvoltage Clamp
vs Temperature
0.40
0.35
0.30
0.25
0.20
–50
–25
0
25
75
50
TEMPERATURE (°C)
100
125
VVIN = 3.6V
30
29
28
27
–50
–25
50
0
25
75
TEMPERATURE (°C)
3587 G17
100
125
3587 G18
PIN FUNCTIONS
VOUT3 (Pin 1): Boost3 Output Pin. This pin is the drain of
an output disconnect PMOS transistor.
CAP3 (Pin 2): Boost3 Output Capacitor Pin. This pin is the
source of an output PMOS disconnect. Connect a capacitor
from this pin to ground.
SW3 (Pin 3): Boost3 Switch Pin. Connect an inductor
from this pin to VIN. Minimize trace area at this pin to
minimize EMI.
GND (Pin 4, 7, 8, 12): Ground Pins.
FLT (Pin 5): Fault Pin. This pin is a bidirectional opendrain pull-down pin. This pin pulls low when any of the
enabled outputs fall out of regulation for more than 16ms.
Each output is ignored during start-up until its respective
enable/soft-start pin allows for full inductor current. This
pin can also be externally forced low to disable all the
supply outputs. Once this pin goes low (either due to an
out of regulation condition or externally forced low), the
pin latches low until the inputs to EN/SS1 and EN/SS3 are
set low or the input supply pin is recycled. Pull up this pin
to VIN with a 200k resistor when not used.
FB2 (Pin 6): Inverter Output Voltage Feedback Pin. Connect a resistor RFB2 from this pin to the Inverter Output
(VNEG) such that:
RFB2 = |VNEG|/8μA
Note that FB2 pin voltage is about 0V when in regulation.
There is an internal 153k resistor from the FB2 pin to the
internal reference.
SW2 (Pin 9): Inverter Switch Pin. Connect an inductor
between this pin and VIN, as well as the flying capacitor
from this pin to the anode of the lnverter ground return
diode. Minimize trace area at this pin to minimize EMI.
NC (Pin 10): No Connect Pin. Leave open or connect to
ground.
SW1 (Pin 11): Boost1 Switch Pin. Connect an inductor
from this pin to VIN. Minimize trace area at this pin to
minimize EMI.
CAP1 (Pin 13): Boost1 Output Capacitor Pin. This pin
is the source of an output PMOS disconnect. Connect a
capacitor from this pin to ground.
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LT3587
PIN FUNCTIONS
VOUT1 (Pin 14): Boost1 Output Pin. This pin is the drain
of an output disconnect PMOS transistor.
FB1 (Pin 15): Boost1 Output Voltage Feedback Pin. Connect a resistor RFB1 from this pin to VOUT1 (or CAP1)
such that:
RFB1 = ((VVOUT1/1.22V) – 1) • 88.5k
There is an internal 88.5k resistor from the FB1 pin to
ground.
EN/SS1 (Pin 16): Boost1/Inverter Shutdown and Soft-Start
Pin. Boost1 and Inverter are enabled when the voltage
on this pin is greater than 2.5V. They are disabled when
the voltage is below 0.2V. An internal 1μA current source
in conjunction with an external capacitor can be used to
ramp this pin and provide soft-start.
VIN (Pin 17): Input Supply Pin. Must be locally bypassed
with an X5R or X7R type ceramic capacitor.
VFB3 (Pin 20): Boost3 Output Voltage Feedback Pin. Connect a resistor RVFB3 from this pin to VOUT3 (or CAP3)
such that:
RVFB3 = ((VVOUT3/0.8V) – 1) • 56.3k
There is an internal 56.3k resistor from the VFB3 pin to
ground. In the current regulator configuration, RVFB3 can
be optionally used to limit the maximum output voltage
to VCLAMP, such that:
RVFB3 = ((VCLAMP/0.8V) – 1) • 56.3k
Note: When no voltage clamp is desired in the current
regulator configuration, tie VFB3 to GND.
Exposed Pad (Pin 21): Ground Pin. Connect to PCB ground
plane. Ground plane connection through multiple vias under
the package is recommended for optimum electrical and
thermal performance.
EN/SS3 (Pin 18): Boost3 Shutdown and Soft-Start Pin.
Boost3 is enabled when the voltage on this pin is greater
than 2V. It is disabled when the voltage is below 0.2V. An
internal 1μA current source in conjunction with an external capacitor can be used to ramp this pin and provide
soft-start.
IFB3 (Pin 19): Boost3 Output Current Programming Pin.
Connect a resistor RIFB3 from this pin to ground such
that:
RIFB3 = 200 • (0.8V/IVOUT3)
If Boost3 output is configured as a voltage regulator,
RIFB3 can be optionally used to limit the maximum output
current to ILIMIT:
RIFB3 = 200 • (0.8V/ILIMIT)
Note: Tie IFB3 to GND when no current limit is desired.
3587fc
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LT3587
BLOCK DIAGRAM
VIN
VIN
1μA
EN/SS3
L4
SW3
C5
+
200mV
VREF
0.8V
A8
–
SOFTSTART
+
OVERVOLTAGE
PROTECTION
VC3
A5
–
–
FLT
A6
VOUT3
DS3
CAP3
X3
R
+
S
Q3
Q
M2
C4
M3
VOUT3
RVFB3
VFB3
Σ
VMAX
DISCONNECT
CONTROL
56.3k
RAMP
GENERATOR
SHDN3
IFB3
VIN
VIN
RIFB3
FLT
100k
EN/SS3
C6
BANDGAP
AND LDO
FLT
EN/SS1
EN/SS3
PTAT BIAS
VOUT1
S
Q
L1
SW1
RFB1
–
FB1
88.5k
+
–
+
A7
CAP1
–
A1
X1
A3
FLT
200mV
DS1
EN/SS1
VC1
EN/SS1
VIN
R
FILTER
AND
16ms
DELAY
VC1
VC2
VC3
OSCILLATOR
R
+
S
Q
Q1
VOUT1
DISCONNECT
CONTROL
Σ
VREF
C1
M1
1.22V
SHDN1
RAMP
GENERATOR
1μA VIN
SOFTSTART
C3
VIN
SEQUENCING
153k
FB2
L2
–
A2
RFB2
SW2
VC2
–
+
+
VNEG
GND
X2
A4
R
S
Q
Q2
C2
Σ
DS2
RAMP
GENERATOR
L3
VNEG
C7
3587 F01
Figure 1. Block Diagram
3587fc
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LT3587
OPERATION
All three channels of the LT3587 use a constant frequency,
current mode control scheme to provide voltage and/or
current regulation at the output. Operation can be best understood by referring to the Block Diagram in Figure 1.
If EN/SS1 is pulled higher than 200mV, the bandgap reference, the start-up bias and the oscillator are turned on. At
the start of each oscillator cycle, the SR latch X1 is set,
which turns on the power switch Q1. A voltage proportional
to the switch current is added to a stabilizing ramp and
the resulting sum is fed into the positive terminal of the
PWM comparator A3. When this voltage exceeds the level
at the negative input of A3, the SR latch X1 is reset, turning
off the power switch Q1. The level at the negative input
of A3 is set by the error amplifier A1, which is simply an
amplified version of the difference between the reference
voltage of 1.22V and the feedback voltage. In this manner,
the error amplifier sets the correct peak switch current
level to keep the output voltage in regulation. If the error
amplifier output increases, more current is delivered to
the output; if it decreases, less current is delivered.
The second channel is an inverting converter. This channel
is also enabled through the EN/SS1 pin. The basic operation of this second channel is the same as the positive
channel. The SR latch X2 is also set at the start of each
oscillator cycle. The power switch Q2 is turned on at the
same time as Q1. Q2 turns off based on its own feedback
loop, which consists of error amplifier A2 and PWM
comparator A4. The reference voltage of this negative
channel is ground.
Voltage clamps (not shown) on the output of the error
amplifiers A1 and A2 enforce current limit on Q1 and Q2
respectively.
Similar to the first channel, the third channel is also a
positive boost regulator. If EN/SS3 is pulled higher than
200mV, the bandgap reference, the start-up bias and the
oscillators are also turned on. The SR latch X3 is set at
the start of each oscillator cycle which turns on the power
switch Q3. Q3 turns off based on its own feedback loop,
which consists of error amplifier A5 and PWM comparator
A6. The level at the negative input of A6 is set by the error
amplifier A5, and is an amplified version of the difference
between the reference voltage of 0.8V and the maximum
of the two feedback voltages at VFB3 and IFB3. A separate
comparator (not shown) sets the maximum current limit
on Q3.
The IFB3 pin is pulled up internally with a current that
is (1/200) times the load current out of the VOUT3 pin.
Therefore, an external resistor connected from this pin
to ground generates a feedback voltage proportional to
the VOUT3 output load current at the IFB3 pin. When the
voltage at VFB3 is higher than the voltage at IFB3, the third
channel regulates to the feedback voltage at VFB3, which in
normal application is a divided down voltage from VOUT3.
In this state, the third channel behaves as a boost voltage
regulator. On the other hand if the voltage at IFB3 is higher,
the third channel regulates to the feedback voltage at IFB3,
which therefore regulates the VOUT3 output load current to
a particular value. In this state, the third channel behaves
as a boost current regulator.
PMOS M1 is used as an output disconnect pass transistor
for the first channel. M1 disconnects the load (VOUT1) from
the input as long as the voltage between CAP1 and VIN
is less than 2.5V (typical) and the voltage between CAP1
and VOUT1 is less than 10V (typ). Similarly, PMOS M3 is
used as an output disconnect pass transistor for the third
channel. M3 disconnects the load (VOUT3) from the input
when the third channel is in shutdown (EN/SS3 voltage
is lower than 200mV) and the voltage between CAP3 and
VOUT3 is less than 10V (typical).
3587fc
9
LT3587
APPLICATIONS INFORMATION
Inductor Selection
A 15μH inductor and a 10μH inductor are recommended
for the LT3587 Boost1 channel and Boost3 channel respectively. The inverting channel can use 15μH or 22μH
inductors. Although small size is the major concern for
most applications, for high efficiency the inductors should
have low core losses at 1MHz and low DCR (copper wire
resistance). The inductor DCR should be on the order of
half of the switch on resistance for its channel: 0.5Ω for
Boost1, 0.4Ω for the inverter and 1Ω for Boost3. For robust
applications, the inductors should have current ratings
corresponding to their respective peak current during
regulation. Furthermore, with no soft-start, the inductor
should also be able to withstand temporary high start-up
currents of 1A, 1.1A and 480mA for the Boost1, inverter
and Boost3 channels respectively (typ, refer to the Typical
Performance Characteristics curves).
Capacitor Selection
The small size of ceramic capacitors makes them suitable
for LT3587 applications. X5R and X7R types of ceramic
capacitors are recommended because they retain their
capacitance over wider voltage and temperature ranges
than other types such as Y5V or Z5U. A 1μF input capacitor is sufficient for most LT3587 applications. The
output capacitors required for stability depend on the
application. For most applications, the output capacitor
values required are: 10μF for the Boost1 channel, 22μF
for the inverter channel and 2.2μF for the Boost3 channel. The inverter requires a 2.2μF flying capacitor. Note
that this flying capacitor needs a voltage rating of at least
VIN + |VNEG|.
Inrush Current
When a supply voltage is abruptly applied to the VIN pin,
the voltage difference between the VIN pin and the CAP
pins generates inrush current. For the case of the Boost1
channel, the inrush current flows from the input through
the inductor L1 and the Schottky DS1 to charge the Boost1
output capacitor C1. Similarly for the Boost3 channel, the
inrush current flows from the input through the inductor
L4 and the Schottky DS3 to charge the output capacitor C4.
For the inverting channel, the inrush current flows from the
input through inductor L2, charging the flying capacitor
C2 and returning through the Schottky diode DS2.
The selection of inductor and capacitor values should
ensure that the peak inrush current is below the rated
momentary maximum current of the Schottky diodes. The
peak inrush current can be estimated as follows:
IP =
(VVIN − 0.6) • e
ϕ=
−1 −1
tan (ϕ)
ϕ
L
C
4L
R2C
−1
where L is the inductance, C is the capacitance and R is
the total series resistance in the inrush current path, which
includes the resistance of the inductor and the Schottky
diode. Note that in this equation, we model the Schottky
as having a fixed 0.6V drop.
Table 1 gives inrush peak currents for some component
selections. Note that inrush current is not a concern if the
input voltage rises slowly.
Table 1. Inrush Peak Current
VVIN (V)
R (Ω)
L (μH)
C (μF)
IP (A)
5
0.68
15
10
2.48
5
0.68
22
2.2
1.19
5
0.68
10
2.2
1.64
3.6
0.745
15
10
1.64
3.6
0.745
22
2.2
0.80
3.6
0.745
10
2.2
1.10
Schottky Diode Selection
For any of the external diode (DS1, DS2 and DS3) selections, besides having sufficiently high reverse breakdown
voltage to withstand the output voltage, both forward voltage drop and diode capacitance need to be considered.
Schottky diodes rated for higher current usually have lower
forward voltage drops and larger capacitance. Although
lower forward voltage drop is good for efficiency, a large
3587fc
10
LT3587
APPLICATIONS INFORMATION
capacitance will slow down the switching waveform, which
can cause significant switching losses at 1MHz switching frequency. Some recommended Schottky diodes are
listed in Table 2.
The same constraints as the other Schottky diodes apply for selecting D3. Therefore, the same recommended
Schottky diodes in Table 2 can be used for D3.
Table 2. Recommended Schottky Diodes
As briefly discussed in the Operation section, the regulation loop of Boost3 uses the maximum of the two voltages
at VFB3 and IFB3 as feedback information to set the peak
current of its power switch Q3. This allows for the Boost3
loop to be configured as either a boost voltage regulator
or a boost current regulator (Figure 3). Furthermore, this
architecture also allows for a programmable current limit on
voltage regulation or voltage limit on current regulation.
DIODE
FORWARD FORWARD CAPACICURRENT VOLTAGE
TANCE
(mA)
DROP (V) (pF at 10V) MANUFACTURER
PART
NUMBER
RSX051VA-30
1000
0.35
30
ROHM
www.rohm.com
NXP/Phillips
www.nxp.com
PMEG401OCEJ
500
0.49
25
PMEG2005EB
500
0.43
8
IR05H40CSPTR
500
0.48
39
Vishay
www.vishay.com
B0540WS
500
0.48
20
Diodes Inc.
www.diodes.com
ZLLS400
520
0.53
17
Zetex
www.zetex.com
Smaller Footprint Inverter Topology
In certain applications with higher tolerance of current ripple
at the output of the inverter, the inductor L3 can be replaced
with a Schottky diode. Since the Schottky diode footprint
is usually smaller than the inductor footprint, this alternate
topology is recommended if a smaller overall solution is a
must. Note that this topology is only viable if the absolute
value of the inverter output is greater than VIN.
This Schottky diode is configured with the anode connected
to the output of the inverter and the cathode to the output
end of the flying capacitor C2 as shown in Figure 2.
LT3587
RFB1
1M
SW2
VVIN
2.5V TO 4.5V
L2
15μH
C2
2.2μF
D3
DS2
VVIN
VVIN
VIN
SW3
VIN
CAP3
LT3587
BOOST3
VOUT3
VOLTAGE
RVFB3
REGULATOR
VFB3
VOLTAGE
IFB3
EN/SS3
REGULATION
FEEDBACK
RIFB3 RESISTOR
SW3
CAP3
LT3587
BOOST3
VOUT3
CURRENT
RVFB3
REGULATOR
VFB3
OPTIONAL
IFB3
EN/SS3
PROGRAMMABLE
VOLTAGE LIMIT
RIFB3 RESISTOR
OPTIONALPROGRAMMABLE
CURRENT LIMIT RESISTOR
CURRENT REGULATION
FEEDBACK RESISTOR
3587 F03
Figure 3. Boost3 Configured as a Voltage
Regulator and as a Current Regulator
When configured as a boost voltage regulator, a feedback
resistor from the output pin VOUT3 to the VFB3 pin sets the
voltage level at VOUT3 at a fixed level. In this case, the IFB3
pin can either be grounded if no current limiting is desired
or connected to ground with a resistor such that:
ILIMIT = 200 • (0.8V/RIFB3)
FB2
3587 F02
Boost3 Overcurrent and Overvoltage Protection
INVERTER
OUTPUT
–8V, 100mA
C7
22μF
Figure 2. Inverter Configured with a Schottky
Diode in Place of the Output Inductor
where ILIMIT is the desired output current limit value. Recall
that the pull-up current on the IFB3 pin is controlled to be
typically 1/200 of the output load current at the VOUT3
pin. In this case, when the load current is less than ILIMIT,
the Boost3 loop regulates the voltage at the VFB3 pin to
0.8V. When there is an increase in load current beyond
ILIMIT, the voltage at VFB3 starts to drop and the voltage
at IFB3 rises above 0.8V. The Boost3 loop then regulates
the voltage at the IFB3 pin to 0.8V, limiting the output
3587fc
11
LT3587
APPLICATIONS INFORMATION
current at VOUT3 to ILIMIT. Figure 4 compares the transient
responses with and without current limit when a current
overload occurs.
VVOUT3
5V/DIV
IVOUT3
13mA/DIV
15V
20mA
LOAD STEP
IL4
200mA/DIV
3587 F04a
200μs/DIV
VVIN = 3.6V
WITHOUT CURRENT LIMIT: IFB3
CONNECTED TO GND
VOUT3 STAYS AT 15V, OUTPUT CURRENT
INCREASES FROM 20mA TO 40mA
VVOUT3
5V/DIV
IVOUT3
13mA/DIV
15V
lower than 29V is obtained by connecting a resistor from
the VOUT3 pin to the VFB3 pin such that:
RFB3 = ((VCLAMP/0.8V) – 1) • 56.3k
where VCLAMP is the desired output voltage clamp level. In
this case, when the voltage level is less than VCLAMP, the
Boost3 loop regulates the voltage at the IFB3 pin to 0.8V.
When the output load fails open-circuit or is disconnected,
the voltage at IFB3 drops to reflect the lower output current
and the voltage at VFB3 starts to rise. When the voltage
at VOUT3 rises to VCLAMP, the Boost3 loop then regulates
the voltage at the VFB3 pin to 0.8V, limiting the voltage
level at VOUT3 to VCLAMP. Figure 5 contrasts the transient
responses with and without programmed VCLAMP when
the output load is disconnected.
VVOUT3
10V/DIV
20V
OUTPUT LOAD
DISCONNECTED
20mA
LOAD STEP
IL4
200mA/DIV
IL4
200mA/DIV
200μs/DIV
3587 F05a
200μs/DIV
VVIN = 3.6V
WITHOUT PROGRAMMED OUTPUT VOLTAGE
CLAMP: VFB3 CONNECTED TO GND
3587 F04b
VVIN = 3.6V
WITH 20mA CURRENT LIMIT: RIFB3 = 8.06k
OUTPUT CURRENT STAYS AT 20mA,
VOUT3 DROPS FROM 15V TO 7.5V
Figure 4. Boost3 Waveform in an Output Current
Overload Event with and Without Output Current Limit
The LT3587 CAP3 pin has an internal overvoltage protection. When the voltage at the CAP3 pin is driven above
29V (typ), the Boost3 loop is disabled and the SW3 pin
stops switching.
When configured as a boost current regulator, a feedback
resistor from the IFB3 pin to ground sets the output current at VOUT3 at a fixed level. In this case, if the VFB3 pin is
grounded then the overvoltage protection defaults to the
open-circuit clamp voltage level of 29V. A voltage clamp
VVOUT3
10V/DIV
20V
OUTPUT LOAD
DISCONNECTED
IL4
200mA/DIV
200μs/DIV
VVIN = 3.6V
WITH PROGRAMMED OUTPUT
VOLTAGE CLAMP AT 24V
3587 F05b
Figure 5. Boost3 Output Open-Circuit Waveform with
and Without Programmed Output Voltage Clamp
3587fc
12
LT3587
APPLICATIONS INFORMATION
Setting The Output Voltages and The Boost3 Output
Current
The LT3587 has a trimmed internal feedback resistor. A 1M
feedback resistor from each output pin to its corresponding
feedback pin sets the outputs to 15V for Boost1, –8V for the
inverter and 15V for Boost3. Note that only one resistor is
needed to set the output voltage for each channel. Set the
output voltages according to the following formulas:
Connecting a capacitor from the EN/SS3 pin to ground
sets up a soft-start ramp for the Boost3 channel. As the
1μA current charges up the capacitor, the Boost3 regulation loop is enabled when the EN/SS3 pin voltage goes
above 200mV. The VC3 node voltage follows the EN/SS3
voltage as it ramps up ensuring slow start-up on the
Boost3 channel. When the voltage at the EN/SS3 pin is
above 2V, the Boost3 regulation loop is free running with
full inductor current.
RFB1 = ((VVOUT1/1.22V) – 1) • 88.5k
RFB2 = |VNEG|/8μA
Start Sequencing
RVFB3 = ((VVOUT3 /0.8V) – 1) • 56.3k
The LT3587 also has internal sequencing circuitry that
inhibits the inverter channel from operating until the feedback voltage of the Boost1 voltage (at the FB1 pin) reaches
about 1.1V (87% of the final voltage). This ensures that
the Boost1 output voltage is near regulation before any
negative voltage is generated at the inverter output.
As described in previous sections, Boost3 can be configured
as a boost current regulator. When configured as such, set
the output current according to the following formula:
RIFB3 = 200 • (0.8V/IVOUT3)
In order to maintain accuracy, use high precision resistors
when setting any of the channels output voltage and/or
the Boost3 output current (1% is recommended).
Soft-Start
The LT3587 has two soft-start control pins: EN/SS1 and
EN/SS3. The EN/SS1 pin controls the soft-start for both
the Boost1 and the inverter, while the EN/SS3 pin controls
the soft-start for the Boost3. Each of these soft-start pins
is pulled up internally with a 1μA current source.
Connecting a capacitor from the EN/SS1 pin to ground
programs a soft-start ramp for the Boost1 and the inverter
channels. Use an open-drain transistor to pull this pin low
to shut down both the Boost1 and the inverter. Turning off
this transistor allows the 1μA pull-up current to charge the
soft-start capacitor. When the voltage at the EN/SS1 pins
goes above 200mV, the regulation loops for Boost1 and
the inverter are enabled. The VC1 node voltage follows the
EN/SS1 voltage as it continues to ramp up to ensure slow
start-up on the Boost1 channel. The VC2 node follows the
ramp voltage minus 0.7V. This ensures that the inverter
starts up after the Boost1, but still has a slow ramping
output to avoid large start-up currents. The Boost1 and
the inverter regulation loops are free running with full
inductor current when the voltage at the EN/SS1 pin is
above 2.5V.
Figure 6 contrasts the start-up sequencing without any
soft-start capacitor, and with a 10nF soft-start capacitor.
VEN/SS1
2V/DIV
IVIN
500mA/DIV
VVOUT1
10V/DIV
VNEG
10V/DIV
0V
0mA
0V
0V
400μs/DIV
3587 F06a
4ms/DIV
3587 F06b
VEN/SS1
2V/DIV
IVIN
500mA/DIV
VVOUT1
10V/DIV
VNEG
10V/DIV
0mA
0V
0V
Figure 6. VEN/SS1, VOUT1, VNEG, IVIN with No Soft-Start
Capacitor, and with a 10nF Soft-Start Capacitor
3587fc
13
LT3587
APPLICATIONS INFORMATION
Output Disconnect
Both the Boost1 and the Boost3 channels have an output
disconnect between their respective CAP pin and VOUT
pin. This disconnect feature prevents a DC path from VIN
to VOUT .
For Boost1, this output disconnect feature is implemented
using a PMOS (M1) as shown in the Block Diagram in
Figure 1. When turned on, M1 is driven hard in the linear
region to reduce power dissipation when delivering current between the CAP1 pin and the VOUT1 pin. M1 stays
on as long as the voltage difference between CAP1 and
VIN is greater than 2.5V. This allows for the positive bias
to stay high for as long as possible as the negative bias
discharges during turn off.
The disconnect transistor M1 is current limited to provide a
maximum output current of 155mA (typ). However, there is
also a protection circuit for M1 that limits the voltage drop
across CAP1 and VOUT1 to about 10V. When the voltage at
CAP1 is greater than 10V, in an overload or a short-circuit
event, M1 current is limited to 155mA until the voltage
across CAP1 to VOUT1 grows to about 10V. Then M1 is
turned on hard without any current limit to allow for the
voltage on CAP1 to discharge as fast as possible. When
the voltage across CAP1 and VOUT1 reduces to less than
10V, the output current is then again limited to 155mA.
Figure 7 shows the output voltage and current during an
overload event with VCAP1 initially at 15V.
The output disconnect feature on Boost3 is implemented
similarly using M3. However, in this case M3 is only turned
off when the EN/SS3 pin voltage is less than 200mV and
the Boost3 regulation loop is disabled.
The disconnect transistor M3 is also current limited, providing a maximum output current at VOUT3 of 110mA (typ).
M3 also has a similar protection circuit as M1 that limits
the voltage drop across CAP3 and VOUT3 to about 10V.
Figure 8 shows the output voltage and current during an
overload event with VCAP3 initially at 24V.
IVOUT3
500mA/DIV
0mA
IL4
500mA/DIV
VCAP3
10V/DIV
24V
VVOUT3
10V/DIV
40μs/DIV
IVOUT3
500mA/DIV
0mA
IL4
500mA/DIV
VCAP3
10V/DIV
24V
VVOUT3
10V/DIV
VVIN = 3.6V
C4 = 1μF
IVOUT1
500mA/DIV
IL1
500mA/DIV
VVOUT1
10V/DIV
40μs/DIV
3587 F08b
Figure 8. VCAP3, VVOUT3, IVOUT3 and IL4 During a Short-Circuit
Condition with and Without Programmed 20mA Current Limit
0mA
VCAP1
10V/DIV
3587 F08a
Choosing A Feedback Node
15V
15V
VVIN = 3.6V
C1 = 4.7μF
40μs/DIV
3587 F07
Figure 7. VCAP1,VVOUT1, IVOUT1 and IL1 During a Short-Circuit Event
Boost1 feedback resistor, RFB1, may be connected to the
VOUT1 pin or the CAP1 pin (see Figure 9). Similarly for
Boost3 in a boost voltage regulator configuration, the
feedback resistor, RVFB3, may be connected to the VOUT3
pin or the CAP3 pin. Regulating the VOUT1 and VOUT3 pins
eliminates the output offset resulting from the voltage drop
across the output disconnect PMOS transistors.
3587fc
14
LT3587
APPLICATIONS INFORMATION
FLT
CAP3
RVFB3
B1
B3 SW3
EN/SS EN/SS
VFB3
VIN
GND
CAP1
LT3587
VOUT3
IFB3
FLT
CAP3
VVOUT1 +IVOUT1 • RDISC1 − 1.22V
13.8μA
V
+I
•R
− 0.8V
RFB3 = VOUT3 VOUT3 DISC3
14.3μA
RFB1 =
SW1
FB1
RFB1
SW2
DN
VOUT1
FB2
B1
B3 SW3
EN/SS EN/SS
VIN
Fault Detection and Indicator
SW1
GND
CAP1
RVFB3
LT3587
VFB3
IFB3
RFB1
FB1
VOUT3
SW2
DN
FB2
VOUT1
3587 F09
Figure 9. Feedback Connection Using the VOUT and CAP Pins
However, in the case of a short-circuit fault at the VOUT
pins, the LT3587 will switch continuously because the FB1
or the VFB3 pin is low. While operating in this open-loop
condition, the rising voltage at the CAP pins is limited
only by the protection circuit of their respective output
disconnects. At the worst case, the CAP pin rises to 10V
above the corresponding VOUT pin. So in the case of shortcircuit fault to ground, the voltage on the CAP pins may
reach 10V. When the short-circuit condition is removed,
the VOUT pins rise up to the voltage on the CAP pins,
potentially exceeding the programmed output voltage until
the capacitor voltages fall back into regulation. While this
is harmless to the LT3587, this should be considered in
the context of the external circuitry if short-circuit events
are expected.
Regulating the CAP pins ensures that the voltage on the
VOUT pins never exceeds the set output voltage after a
short-circuit event. However, this setup does not compensate for the voltage drop across the output disconnect,
resulting in an output voltage that is slightly lower than
the voltage set by the feedback resistor. This voltage drop
is equal to the product of the output current and the on
resistance of the PMOS disconnect transistor. This drop
can be accounted for when using the CAP pin as the
feedback node by setting the output voltage according to
the following formula:
The LT3587 features fault detection on all its outputs and
a fault indicator pin (FLT). The fault detection circuitry is
enabled only when at least one of the channels has completed the soft-start process and is free running with full
inductor current. Once the fault detection is enabled, the
Fault pin pulls low when any of the feedback voltages (VFB1,
VFB2 or Max(VVFB3,VIFB3)) fall below their regulation value
for more than 16ms.
One particularly important case is an overload or shortcircuit condition on any of the channel outputs. In this case,
if the corresponding loop is unable to bring the output
back into regulation within 16ms, a fault is detected and
the Fault pin is pulled low.
Note that the fault condition is latched. Once the Fault pin
is pulled low, all the three channels are disabled. In order
to enable any of the channels again, reset the part by shutting it down and then turning it on again. This is done by
first forcing both the EN/SS1 and EN/SS3 pins low below
200mV and then either letting them go high again in a
soft-start process or forcing them high immediately if no
soft-start is desired. Figure 10 shows the waveforms when
a short-circuit condition occurs at Boost1 for more than
16ms as well as the subsequent resetting of the part.
VFLT
5V/DIV
PART RESET
ENSS1/ENSS3
5V/DIV
VVOUT1
10V/DIV
VNEG
10V/DIV
SHORT
AT VOUT1
VVOUT3
20V/DIV
100ms/DIV
3587 F10
Figure 10. Waveforms During Fault
Detection of a Short-Circuit Event
3587fc
15
LT3587
APPLICATIONS INFORMATION
Besides acting as a fault output indicator, the Fault pin
is also an input pin. If this pin is externally forced low
below 400mV, the LT3587 behaves as if a fault event has
been detected and all the channels turn off. In order to
turn the part back on, remove the external voltage that
forces the pin low and reset the part. Figure 11 shows the
waveforms when the Fault pin is externally forced low and
the subsequent resetting of the part.
VFLT
5V/DIV
ENSS1/ENSS3
5V/DIV
FLT FORCED LOW
PART RESET
Since the programmed VOUT3 current is proportional to
the current through RIFB3, the LED current can be adjusted
according to the following formula:
IVOUT3 = (0.8V – VDAC-OUT) • 200/RIFB3
A higher DAC output voltage level results in lower LED
current and hence lower overall brightness. Conversely,
a lower DAC output voltage results in higher LED current
and higher brightness. Note that the DAC output impedance
should be low enough to be able to sink approximately
1/200 of the desired maximum LED current without any
appreciable error for accurate dimming control.
Note also that the maximum output current is limited by
the output disconnect current limit to 110mA (typ).
VVOUT1
10V/DIV
VNEG
10V/DIV
PWM Dimming
VVOUT3
20V/DIV
100ms/DIV
3587 F11
Figure 11. Waveforms When the
Fault Pin is Externally Forced Low
Dimming Control For Boost3 Current Regulator as an
LED Driver
As shown on the front page application and the Block Diagram, one of the most common applications for the Boost3
channel when configured as a boost current regulator is
a backlight LED driver. In an LED driver application, there
are two different ways to implement a dimming control of
the LED string. The LED current can be adjusted either by
using a digital to analog converter (DAC) with a resistor
RIFB3 or by using a PWM signal.
Changing the forward current flowing in the LEDs not
only changes the brightness intensity of the LEDs, it also
changes the color. The chromaticity of the LEDs changes
with the change in forward current. Many applications
cannot tolerate any shift in the color of the LEDs. Controlling the intensity of the LEDs with a direct PWM signal
allows dimming of the LEDs without changing the color.
In addition, direct PWM dimming offers a wider dimming
range to the user.
VVIN
2.5V TO 5V
10μH
VIN
1μF
CAP3
LT3587
VOUT3
IFB3
Using a DAC and a Resistor
For some applications, the preferred method of brightness
control is using a DAC and a resistor. The Boost3 configuration for using this method is shown in Figure 12.
SW3
DAC
LTC2630
VDAC-OUT
LED DRIVER
EN/SS3
RIFB3
8.06k
3587 F12
Figure 12. Dimming Using a DAC and a Resistor
3587fc
16
LT3587
APPLICATIONS INFORMATION
VVIN
2.5V TO 5V
10μH
VIN
SW3
1μF
CAP3
LT3587
VOUT3
IFB3
LED DRIVER
20mA
EN/SS3
RIFB3
8.06k
2.5V
PWM
FREQ
MN1
Si1304BDL
0V
3587 F13
Figure 13. Six White LEDs Driver With PWM Dimming
IVOUT3
13mA/DIV
0mA
IL4
200mA/DIV
0mA
ENSS3
5V/DIV
0V
VVIN = 3.6V
6 LEDs
2ms/DIV
3587 F14
Figure 14. PWM Dimming Waveforms
Dimming the LEDs via a PWM signal essentially involves
turning the LEDs on and off at the PWM frequency. The
typical human eye has a sensitivity limit of ~60Hz. By
increasing the PWM frequency to ~80Hz or higher, the eye
will interpret that the pulsed light source is continuously
on. Additionally, by modulating the duty cycle (amount of
“on-time”), intensity of the LEDs is controlled. The color
of the LEDs remains unchanged in this scheme since the
LED current is either zero or a constant value.
Figure 13 shows a partial application showing an LED
driver for six white LEDs. If the voltage at the CAP3 pin is
higher than 10V when the LEDs are on, direct PWM dimming method requires an external NMOS. This external
NMOS is tied between the cathode of the lowest LED in
the string and ground as shown in Figure 13.
A Si1304 logic-level MOSFET can be used since its source
is connected to ground, and it is able to withstand the
open-circuit voltage at the VOUT3 pin across its drain and
source. The PWM signal must be applied to the EN/SS3
pin of the LT3587 and the gate of the NMOS. The PWM
signal should traverse between 0V to 2.5V, to ensure
proper turn on and off of the Boost3 regulation loop and
the NMOS transistor MN1. When the PWM signal goes
high, the LEDs are connected to ground and a current of
IVOUT3 = 160V/RIFB3 flows through the LEDs. When the
PWM signal goes low, the LEDs are disconnected and
turned off.
The output disconnect feature and the external NMOS
ensure that the LEDs quickly turn off without discharging
the output capacitor. This allows the LEDs to turn on faster.
Figure 14 shows the PWM dimming waveforms for the
circuit in Figure 13.
3587fc
17
LT3587
APPLICATIONS INFORMATION
100
AVERAGE CURRENT (mA)
1kHz
10
IDEAL
1
300Hz
MEASURED
0.1
100Hz
0.01
1
10
DUTY CYCLE (%)
1
100
Figure 16. Dimming Range Comparison
of Three PWM Frequencies
Figure 15. Average LED Current Variation with
PWM Duty Cycle at 100Hz PWM Frequency
Notice that at lower end of the duty cycle, the linear relation between the average LED current and the PWM duty
cycle is no longer preserved. This indicates that the loop
requires a fixed amount of time to reach its final current.
When the duty cycle is reduced such that the amount of
on time is in the order of or less than this settling time, the
loop no longer has the time to regulate to its final current
before it is turned off again and the initial current before
settling is a larger proportion of the average current.
Depending on how much linearity on the average LED
current is required, the minimum LED on time is chosen
based on the graphs in Figure 15. For example, for approximately 10% deviation from linearity at the lower
duty cycle, the minimum on time of the LED current is
approximately 320μs for a 3.6V input voltage.
The achievable dimming range for this application with
a 100Hz PWM frequency can be determined using the
following method.
100
3587 F16
3587 F15
The time it takes for the LED current to reach its programmed value sets the achievable dimming range for a
given PWM frequency. Figure 15 shows the average current
variation over duty cycle for a 100Hz PWM frequency with
the circuit in Figure 13.
10
PWM DIMMING RANGE
Example:
f = 100Hz → tPERIOD = 1/f = 0.01s, tMIN-ON = 320μs
Dim Range = tPERIOD/tMIN-ON = 0.01s/320μs ≈ 30:1
Min Duty Cycle = (tMIN-ON/tPERIOD) • 100 = 3.2%
Duty Cycle Range = 100% → 3.2% at 100Hz
The calculations show that for a 100Hz signal the dimming
range is 30 to 1. In addition, the minimum PWM duty cycle
of 3.2% ensures that the LED current varies linearly with
duty cycle to within 10%. Figure 16 shows the dimming
range achievable for three different frequencies with a
minimum on time of 320μs.
The dimming range can be further extended by combining this PWM method with the DAC and resistor method
discussed previously. In this manner both analog dimming
and PWM dimming extend the dimming range for a given
application. The color of the LEDs no longer remains
constant because the forward current of the LED changes
with the output voltage of the DAC. For the six LED application described above, the LEDs can be dimmed first
by modulating the duty cycle of the PWM signal with the
DAC output at 0V. Once the minimum duty cycle is reached,
the value of the DAC output voltage can be increased to
further dim the LEDs. The use of both techniques together
allows the average LED current for the six LED application
to be varied from 20mA down to less than 1μA.
3587fc
18
LT3587
APPLICATIONS INFORMATION
the LT3587. The outputs can be driven straight from the
battery, resulting in higher efficiency.
Lower Input Voltage Applications
The LT3587 can be used in lower input voltage applications. The VIN supply voltage to the LT3587 must be
2.5V to 6V. However, the inductors can be run off a lower
voltage. This allows the outputs to be powered off two
alkaline cells. Most portable devices and systems have
a 3.3V logic supply voltage which can be used to power
LED DRIVER
20mA UP TO 12V
C4
1μF
DS3
RVFB3
787k
(OPTIONAL)
RIFB3
8.06k
Figure 17 shows a typical digital still camera application
with CCD positive and negative supply as well as an LED
driver powered by two AA cells. The battery is connected
to the input inductors and the chip is powered with a 3.3V
logic supply voltage.
VFB3 VOUT3 CAP3
L4
10μH
2AA CELLS
2V TO 3.2V
L1
15μH
SW3
SW1
IFB3
CAP1
FLT
DS1 C1
4.7μF
CFB1
3.3pF
LT3587
EN/SS1
EN/SS3
RFB1
787k
FB1
VIN
3.3V
2AA CELLS
2V TO 3.2V
C6
1μF
L2
15μH
SW2
GND
C2
2.2μF
L3
15μH
DS2
C1: MURATA GRM21BR61E475KA12L
C2: MURATA GRM188R61C225KE15D
C4: MURATA GRM188R61E105KA12B
C6: MURATA GRM155R61A105KE15D
C7: MURATA GRM21BR71A106KE51L
FB2
VOUT1
RFB2
1M
CCD POSITIVE
12V, 10mA
CFB2
6.8pF
CCD NEGATIVE
–8V, 20mA
C7
10μF
3587 F17
CFB1: MURATA GRM1555C1H3R3BZ01D
CFB2: MURATA GRM1555C1H6R3BZ01D
L1, L2, L3: SUMIDA CDRH2D18/HP-150N
L4: TOKO 1071AS-100M
DS1, DS2, DS3: NXP PMEG2005EB
Figure 17. 2 AA Cells Providing CCD Positive and Negative Supply
and a Three White Backlight LED Driver
3587fc
19
LT3587
APPLICATIONS INFORMATION
Board Layout Consideration
As with all switching regulators, careful attention must be
paid to the PCB board layout and component placement.
To maximize efficiency, switch rise and fall times are made
as short as possible. To prevent electromagnetic interference (EMI) problems, proper layout of the high frequency
switching path is essential.
In order to minimize magnetic field radiation, reduce the
parasitic inductance by keeping the traces that conduct high
switching currents short, wide and with minimal overall
loop area. These are typically the traces associated with
the switches. Figure 18 outlines the critical paths.
VVIN
DS1
L1
SW1
Q1
VVIN
C2
L2
SW2
CAP3
C1
LT3587
C6
Q3
GND
LT3587
L3
VNEG
SW3
CAP1
C6
Finally, place as much of the output capacitors of each
channel close to their respective CAP pins. Recommended
component placement is shown in Figure 19.
DS3
L4
VVIN
The voltage signals of the SW1, SW2 and SW3 pins have
rise and fall times of a few ns. Minimize the length and area
of all traces connected to the SW1, SW2 and SW3 pins
to reduce capacitive coupling between these fast nodes
and other circuitry. In particular, keep all the traces of the
feedback voltage pins (FB1, FB2, VFB3 and IFB3) away from
the switching node. Always use a ground plane under the
switching regulator to minimize interplane coupling.
C4
C6
Q2
DS2
LT3587
C7
GND
GND
3587 F18
Figure 18. High Current Paths
VIN
CAP3
VNEG
C6
(OPT)
C7
L4
C4
RIFB3
RFB2
VOUT3
DS3
L3
CFB2
C5
U1
C2
RFB1
VIN
C6
C3
DS2
DS1
CFB1
L2
VOUT1
L1
C1
C6
(OPT)
C6
(OPT)
3587 F19
VIN
CAP1
Figure 19. Recommended Component Placement
3587fc
20
LT3587
TYPICAL APPLICATIONS
Li-Ion Powered Supply for CCD Imager and Five White Backlight LEDs
LED DRIVER
20mA UP TO 24V
RVFB3
1.65M
(OPTIONAL)
C4
2.2μF
DS3
VFB3 VOUT3 CAP3
L4
10μH
SW3
VVIN
2.5V TO 6V
L1
15μH
VIN
C6
1μF
SW1
RIFB3
8.06k
IFB3
CAP1
CFB1
2.7pF
LT3587
FLT
RFB1
1M
EN/SS1
EN/SS3
C3
100nF
SW2
C5
100nF
VVIN
2.5V TO 6V
DS1 C1
10μF
L2
15μH
C2
2.2μF
GND
L3
15μH
DS2
C1: MURATA GRM21BR61C106KE15L
C2: MURATA GRM188R61C225KE15D
C3, C5: MURATA GRM033R60J104KE19D
C4: MURATA GRM21BR71E225KA73L
C6: MURATA GRM155R61A105KE15D
C7: TAIYO YUDEN LMK212BJ226MG-T
FB2
FB1
VOUT1
RFB2
1M
CCD POSITIVE
15V, 50mA
CFB2
6.8pF
CCD NEGATIVE
–8V, 100mA
C7
22μF
3587 TA02
CFB1: MURATA GRM1555C1H2R7BZ01D
CFB2: MURATA GRM1555C1H6R8BZ01D
L1, L2, L3: SUMIDA CDRH2D18/HP-150N
L4: TOKO 1071AS-100M
DS1, DS2, DS3: IR IR05H40CSPTR
3587fc
21
LT3587
TYPICAL APPLICATIONS
Driver For a CCD Imager and an OLED Display Panel with Soft-Start
OLED DRIVER
16V, 20mA
C4
1μF
RIFB3
7.15k
(OPTIONAL)
CAP3
VOUT3
VFB3
L4
10μH
DS3
RVFB3
1.07M
SW3
L1
15μH
VIN
C6
1μF
C1
DS1 4.7μF
SW1
CAP1
IFB3
CFB1
2.7pF
LT3587
FLT
EN/SS1
EN/SS3
GND
SW2
VOUT1
FB2
C2
2.2μF
L2
15μH
VVIN
2.5V TO 6V
RFB1
1M
FB1
C5
100nF
C3
100nF
VVIN
2.5V TO 6V
CFB2
6.8pF
RFB2
1M
D3
CCD POSITIVE
15V, 50mA
CCD NEGATIVE
–8V, 100mA
3587 TA03
C7
22μF
DS2
C1: TAIYO YUDEN TMK212BJ475KG-T
C2: TAIYO YUDEN EMK107BJ225KA-T
C3, C5: TAIYO YUDEN JMK063BJ104KP-F
C4: TAIYO YUDEN GMK107BJ105KA-T
C6: TAIYO YUDEN LMK105BJ105KV-F
C7: TAIYO YUDEN LMK212BJ226MG-T
CFB1: TAIYO YUDEN EMK105SK2R7JW-F
CFB2: TAIYO YUDEN EMK105SH6R8JW-F
L1, L2: SUMIDA CDRH2D18/HP-150N
L4: TOKO 1071AS-100M
DS1, DS2, DS3, D3: NXP PMEG2005EB
Extending the High Voltage Range and the Number of Independently Controlled Regulated Outputs
D8
24V
R5
100k
GND
SHDN
SUPPLY 5:
40V, 5mA
D7
OUT
C13
1μF
C11
2.2μF
R6
3.24M
D5
IN
C12
2.2μF
D6
ADJ
R6
1.21M
LT1964
IN
LT3014
OUT
SUPPLY 4:
–40V, 5mA
C9
2.2μF
D4
SHDN
ADJ
R7
100k
C8
2.2μF
C10
1μF
GND
SUPPLY 1
SUPPLY 2
D10
SUPPLY 3:
25V, 1mA TO 10mA
C4
2.2μF
L4
15μH
DS3
RVFB3
1.74M
L1
15μH
C6
1μF
DS1
VOUT3
VFB3
RIFB3
10.7k
CAP3
SW3
VIN
CFB1
2.2pF
FLT
LT3587
EN/SS1
EN/SS3
FB1
GND
SW2
C5
100nF
VVIN
3V TO 6V
C1
10μF
SW1
CAP1
IFB3
C3
100nF
VVIN
3V TO 6V
L2
22μH
C2
2.2μF
D9
C1: MURATA GRM31CR71E106KA12L
C2, C8, C11: MURATA GCM21BR71E225KA73L
C3, C5: MURATA GRM033R60J104KE19D
C4: MURATA GRM21BR71E225KA73L
C6: MURATA GRM155R61A105KE15D
C7: MURATA GRM32ER61E226KE15L
C9, C12: MURATA GRM31CR71H225KA55L
C10, C13: MURATA GRM21BR71H105KA12L
VOUT1
FB2
D3
DS2
RFB1
1.21M
SUPPLY 1:
18V, 50mA
RFB2
2.26M
C7
22μF
CFB2
2.7pF
SUPPLY 2:
–18V, 50mA
3587 TA04
CFB1: MURATA GRM1555C1H2R2BZ01D
CFB2: MURATA GRM1555C1H2R7BZ01D
L1, L4: COILCRAFT LPS4018-153
L2, L3: COILCRAFT LPS4018-223
DS1, DS2, DS3, D3, D4, D5, D6, D7, D9, D10: IR IR05H40CSPTR
D8: DIODES INC DDZ9709T
3587fc
22
LT3587
PACKAGE DESCRIPTION
UD Package
20-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1720 Rev A)
0.70 ±0.05
3.50 ± 0.05
(4 SIDES)
1.65 ± 0.05
2.10 ± 0.05
PACKAGE
OUTLINE
0.20 ±0.05
0.40 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
3.00 ± 0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
R = 0.115
TYP
0.75 ± 0.05
R = 0.05
TYP
PIN 1
TOP MARK
(NOTE 6)
PIN 1 NOTCH
R = 0.20 TYP
OR 0.25 × 45°
CHAMFER
19 20
0.40 ± 0.10
1
2
1.65 ± 0.10
(4-SIDES)
(UD20) QFN 0306 REV A
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.20 ± 0.05
0.40 BSC
3587fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT3587
TYPICAL APPLICATION
General Purpose High Voltage Supplies Generator
SUPPLY 3: 25V SUPPLY
WITH SAFETY
CURRENT LIMIT AT 25mA
C4
2.2μF
RVFB3
1.74M
VFB3 VOUT3
RIFB3
6.34k
L4
10μH
DS3
CAP3
SW3
VVIN
2.5V TO 6V
L1
15μH
VIN
C6
1μF
DS1 C1
10μF
SW1
CAP1
IFB3
CFB1
2.7pF
LT3587
FLT
FB1
EN/SS1
EN/SS3
VVIN
2.5V TO 6V
GND
SW2
C5
100nF
C3
100nF
L2
22μH
C2
2.2μF
DS4
VOUT1
FB2
L3
22μH
DS2
RFB2
2M
C7
22μF
RFB1
1M
SUPPLY 1:
15V, 50mA
CFB2
2.2pF SUPPLY 2:
–16V, 50mA
3587 TA05
C1: MURATA GRM31CR71E106KA12L
C2: MURATA GRM21BR71E225KA73L
C3, C5: MURATA GRM033R60J104KE19D
C4: MURATA GRM21BR71E225KA73L
C6: MURATA GRM155R61A105KE15D
C7: MURATA GRM32ER61E226KE15L
CFB1: MURATA GRM1555C1H2R7BZ01D
CFB2: MURATA GRM1555C1H2R2BZ01D
L1: COILCRAFT LPS4018-153
L2, L3: COILCRAFT LPS4018-223
L4: TOKO 1071AS-100M
DS1, DS2, DS3, DS4: IR IR05H40CSPTR
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1944
Dual Output, Boost/Inverter, 350mA ISW, High Efficiency
Boost-Inverting DC/DC Converter
VIN(MIN) = 1.2V, VIN(MAX) = 15V, VOUT(MAX) = ±34V, IQ = 20, ISD < 1μA,
MSOP-10 Package
LT1945
Dual Output, Boost/Inverter, 350mA ISW, High Efficiency
Boost-Inverting DC/DC Converter
VIN(MIN) = 1.2V, VIN(MAX) = 15V, VOUT(MAX) = ±34V, IQ = 20, ISD < 1μA,
MSOP-10 Package
LT3463/LT3463A
Dual Output, Boost/Inverter, 250mA ISW, Constant OffTime, High Efficiency Step-Up DC/DC Converter with
Integrated Schottkys
VIN(MIN) = 2.3V, VIN(MAX) = 15V, VOUT(MAX) = 40V, IQ = 40μA, ISD < 1μA,
3 × 3 DFN-10 Package
LT3466/LT3466-1
Dual Constant Current, 2MHz, High Efficiency White LED
Boost Regulator with Integrated Schottky Diode
VIN(MIN) = 2.7V, VIN(MAX) = 24V, VOUT(MAX) = 40V, IQ = 5mA, ISD < 16μA,
3 × 3 DFN-10 Package
LT3471
Dual Output, Boost/Inverter, 1.3A ISW, 1.2MHz, High
Efficiency Boost-Inverting DC/DC Converter
VIN(MIN) = 2.4V, VIN(MAX) = 16V, VOUT(MAX) = 40V, IQ = 2.5mA, ISD < 1μA,
3 × 3 DFN-10 Package
LT3472/LT3472A
Dual Output, Boost/Inverter, 400mA ISW, 1.2MHz, High
Efficiency Boost-Inverting DC/DC Converter
VIN(MIN) = 2.2V, VIN(MAX) = 16V, VOUT(MAX) = ±34V IQ = 2.8mA, ISD < 1μA,
3 × 3 DFN-10 Package
LT3473/LT3473A
40V, 1A, 1.2MHz Micropower Low Noise Boost Converter VIN(MIN) = 2.2V, VIN(MAX) = 16V, VOUT(MAX) = 36V, IQ = 150μA, ISD < 1μA,
with Output Disconnect
3 × 3 DFN-12 Package
LT3494/LT3494A
40V, 180mA/350mA Micropower Low Noise Boost
Converter with Output Disconnect
VIN(MIN) = 2.3V, VIN(MAX) = 16V, VOUT(MAX) = 40V, IQ = 65μA, ISD < 1μA,
3 × 2 DFN-8 Package
LT3497
Dual 2.3MHz, Full Function LED Driver with Integrated
Schottkys and 250:1 True Color PWM Dimming
VIN(MIN) = 2.5V, VIN(MAX) = 10V, VOUT(MAX) = 32V, IQ = 6mA, ISD < 12μA,
2 × 3 DFN-10 Package
LT3580
40V, 2A, 2.5MHz Boost/Inverter DC/DC Converter
VIN: 2.5V to 32V, VOUT(MAX) = 40V, IQ = 1mA, ISD < 1μA, MSOP-8E,
3mm × 3mm DFN-8 Packages
3587fc
24 Linear Technology Corporation
LT 0109 REV C • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008