ON NL17SZ125DTT1G Non-inverting 3-state buffer Datasheet

NL17SZ125
Non-Inverting 3-State Buffer
The NL17SZ125 is a high performance non−inverting buffer operating
from a 1.65 V to 5.5 V supply.
Features
•
•
•
•
•
•
•
•
•
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MARKING DIAGRAMS
M
•
•
•
Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5.0 V
Designed for 1.65 V to 5.5 V VCC Operation
Overvoltage Tolerant Inputs and Outputs
LVTTL Compatible − Interface Capability With 5.0 V TTL Logic
with VCC = 3.0 V
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
3−State OE Input is Active−Low
Replacement for NC7SZ125
Chip Complexity = 36 FETs
These Devices are Pb−Free and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
SC−88A (SOT−353)
DF SUFFIX
CASE 419A
M0 MG
G
SOT−553
XV5 SUFFIX
CASE 463B
5
5
1
M0 MG
G
TSOP−5
DT SUFFIX
CASE 483
1
IN A
2
GND
3
VCC
5
UDFN6
1.0 x 1.0
CASE 517BX
4
OUT Y
M0
M
G
Figure 1. Pinout (Top View)
OE
M
1
= Specific Device Code
= Date Code
= Pb−Free Package
(*Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
EN
OUT Y
IN A
FUNCTION TABLE
Figure 2. Logic Symbol
OE Input
A Input
Y Output
PIN ASSIGNMENT
L
L
H
L
H
X
L
H
Z
1
OE
2
IN A
3
GND
4
OUT Y
5
VCC
© Semiconductor Components Industries, LLC, 2012
May, 2012 − Rev. 13
1
Y
OE
M0 M G
G
X = Don’t Care
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
1
Publication Order Number:
NL17SZ125/D
NL17SZ125
MAXIMUM RATINGS
Symbol
Value
Units
VCC
DC Supply Voltage
−0.5 to +7.0
V
VIN
DC Input Voltage
−0.5 to +7.0
V
DC Output Voltage
−0.5 to +7.0
V
VOUT
Parameter
IIK
DC Input Diode Current
−50
mA
IOK
DC Output Diode Current
−50
mA
IOUT
DC Output Sink Current
±50
mA
ICC
DC Supply Current per Supply Pin
±100
mA
−65 to +150
°C
260
°C
+150
°C
TSTG
Storage Temperature Range
TL
Lead Temperature, 1 mm from Case for 10 Seconds
TJ
Junction Temperature Under Bias
qJA
Thermal Resistance (Note 1)
SC−88A/SOT−553
TSOP−5
350
230
PD
Power Dissipation in Still Air at 85°C
150
MSL
FR
VESD
Moisture Sensitivity
°C/W
mW
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
V
u2000
u200
N/A
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
DC Supply Voltage
VIN
DC Input Voltage
VOUT
DC Output Voltage
TA
Operating Temperature Range
tr, tf
Input Rise and Fall Time
VCC = 1.8 V ±0.15 V
VCC = 2.5 V ±0.2 V
VCC = 3.0 V ±0.3 V
VCC = 5.0 V ±0.5 V
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2
Min
Max
Units
1.65
5.5
V
0
5.5
V
0
5.5
V
−55
+125
°C
0
0
0
0
20
20
10
5.0
ns/V
NL17SZ125
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80°C
117.8
419,300
TJ = 90°C
1,032,200
90
TJ = 100°C
80
TJ = 110°C
Time, Years
TJ = 120°C
Time, Hours
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 130°C
Junction
Temperature °C
NORMALIZED FAILURE RATE
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
1
1
10
100
1000
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction Temperature
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Min
0.75 VCC
0.7 VCC
VIH
High−Level Input
Voltage
1.65 to 1.95
2.3 to 5.5
VIL
Low−Level Input
Voltage
1.65 to 1.95
2.3 to 5.5
VOH
High−Level Output
Voltage
VIN = VIH
VOL
Low−Level Output
Voltage
VIN = VIL
IIN
Input Leakage Current
IOZ
3−State Output
Leakage
IOFF
Power Off Leakage
Current
ICC
Quiescent Supply
Current
TA = 255C
VCC
(V)
Typ
−555C 3 TA 3 1255C
Max
Min
Max
0.75 VCC
0.7 VCC
0.25 VCC
0.3 VCC
Units
Condition
V
0.25 VCC
0.3 VCC
V
1.65
1.8
2.3
3.0
4.5
1.55
1.7
2.2
2.9
4.4
1.65
1.8
2.3
3.0
4.5
1.55
1.7
2.2
2.9
4.4
V
IOH = −100 mA
1.65
2.3
3.0
3.0
4.5
1.29
1.9
2.4
2.3
3.8
1.52
2.15
2.80
2.68
4.20
1.29
1.9
2.4
2.3
3.8
V
IOH = −4 mA
IOH = −8 mA
IOH = −16 mA
IOH = −24 mA
IOH = −32 mA
1.65
1.8
2.3
3.0
4.5
0.0
0.0
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
IOL = 100 mA
1.65
2.3
3.0
3.0
4.5
0.08
0.10
0.15
0.22
0.22
0.24
0.30
0.40
0.55
0.55
0.24
0.30
0.40
0.55
0.55
V
IOL = 4 mA
IOL = 8 mA
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
0 to 5.5
±0.1
±1.0
mA
VIN = 5.5 V or GND
1.65 to 5.5
±0.5
±5.0
mA
VIN = VIH or VIL
0 V ≤ VOUT ≤ 5.5 V
0
1.0
10
mA
VIN = 5.5 V or
VOUT = 5.5 V
5.5
1.0
10
mA
VIN = 5.5 V or GND
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3
NL17SZ125
AC ELECTRICAL CHARACTERISTICS (tR = tF = 3.0 ns)
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Parameter
Condition
Propagation Delay
AN to YN
(Figures 4 and 5, Table 1)
Output Enable Time
(Figures 6, 7and 8, Table 1)
Output Disable Time
(Figures 6, 7and 8, Table 1)
TA = 255C
−555C 3 TA 3 1255C
VCC
(V)
Min
Typ
Max
Min
Max
Units
9.0
10
2.0
10.5
ns
RL = 1 MW
CL = 15 pF
1.8 ± 0.15
2.0
RL = 1 MW
CL = 15 pF
2.5 ± 0.2
1.0
7.5
1.0
8.0
RL = 1 MW
RL = 500 W
CL = 15 pF
CL = 50 pF
3.3 ± 0.3
0.8
1.2
5.2
5.7
0.8
1.2
5.5
6.0
RL = 1 MW
RL = 500 W
CL = 15 pF
CL = 50 pF
5.0 ± 0.5
0.5
0.8
4.5
5.0
0.5
0.8
4.8
5.3
RL = 250 W
CL = 50 pF
1.8 ± 0.15
2.0
9.5
2.0
10
2.5 ± 0.2
1.8
8.5
1.8
9.0
3.3 ± 0.3
1.2
6.2
1.2
6.5
5.0 ± 0.5
0.8
5.5
0.8
5.8
1.8 ± 0.15
2.0
10
2.0
10.5
2.5 ± 0.2
1.5
8.0
1.5
8.5
3.3 ± 0.3
0.8
5.7
0.8
6.0
5.0 ± 0.5
0.3
4.7
0.3
5.0
RL and R1= 500 WCL = 50 pF
7.6
8.0
ns
ns
CAPACITIVE CHARACTERISTICS
Symbol
CIN
Parameter
Condition
Typical
Units
Input Capacitance
VCC = 5.5 V, VI = 0 V or VCC
2.5
pF
COUT
Output Capacitance
VCC = 5.5 V, VI = 0 V or VCC
2.5
pF
CPD
Power Dissipation Capacitance
(Note 5)
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
10 MHz, VCC = 5.5 V, VI = 0 V or VCC
9
11
pF
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
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4
NL17SZ125
OE = GND
VCC
INPUT
50%
A
tPHL
tPLH
OUTPUT
GND
CL*
RL
50% VCC
Y
Figure 4. Switching Waveform
*Includes all probe and jig capacitance.
A 1 MHz square input wave is recommended for
propagation delay tests.
Figure 5. tPLH or tPHL
2
INPUT
VCC
R1 = 500 W
INPUT
VCC
OUTPUT
CL = 50 pF
OUTPUT
CL = 50 pF
RL = 500 W
RL = 250 W
A 1 MHz square input wave is recommended for
propagation delay tests.
A 1 MHz square input wave is recommended for
propagation delay tests.
Figure 6. tPZL or tPLZ
Figure 7. tPZH or tPHZ
2.7 V
Vmi
OE
Vmi
0V
tPZH
tPHZ
VCC
VOH − 0.3 V
Vmo
On
≈0V
tPZL
tPLZ
≈ 3.0 V
Vmo
On
VOL + 0.3 V
GND
Figure 8. AC Output Enable and Disable Waveform
Table 1. OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
VCC
Symbol
3.3 V + 0.3 V
2.7 V
2.5 V + 0.2 V
Vmi
1.5 V
1.5 V
VCC/2
Vmo
1.5 V
1.5 V
VCC/2
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5
NL17SZ125
DEVICE ORDERING INFORMATION
Package
Shipping†
NL17SZ125DFT2G
SC−88A (SOT−353)
(Pb−Free)
3000 / Tape & Reel
NLV17SZ125DFT2G*
SC−88A (SOT−353)
(Pb−Free)
3000 / Tape & Reel
NL17SZ125XV5T2G
SOT−553
(Pb−Free)
4000 / Tape & Reel
NL17SZ125DTT1G
TSOP−5
(Pb−Free)
3000 / Tape & Reel
UDFN6, 1.0 x 1.0 x 0.35P
(Pb−Free)
3000 / Tape & Reel
Device
NL17SZ125CMUTCG
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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6
NL17SZ125
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE K
A
G
5
4
−B−
S
1
2
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
J
C
K
H
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
NL17SZ125
PACKAGE DIMENSIONS
SOT−553, 5 LEAD
CASE 463B
ISSUE B
D
−X−
5
A
4
1
e
2
3
E
−Y−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
L
HE
b 5 PL
0.08 (0.003)
c
M
MILLIMETERS
NOM
MAX
0.55
0.60
0.22
0.27
0.13
0.18
1.60
1.70
1.20
1.30
0.50 BSC
0.10
0.20
0.30
1.50
1.60
1.70
DIM
A
b
c
D
E
e
L
HE
X Y
MIN
0.50
0.17
0.08
1.50
1.10
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.35
0.0531
1.0
0.0394
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
INCHES
NOM
0.022
0.009
0.005
0.063
0.047
0.020 BSC
0.004
0.008
0.059
0.063
MIN
0.020
0.007
0.003
0.059
0.043
MAX
0.024
0.011
0.007
0.067
0.051
0.012
0.067
NL17SZ125
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE H
D 5X
NOTE 5
2X
0.10 T
2X
0.20 T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
0.20 C A B
M
5
1
4
2
L
3
B
S
K
DETAIL Z
G
A
DIM
A
B
C
D
G
H
J
K
L
M
S
DETAIL Z
J
C
0.05
SEATING
PLANE
H
T
SOLDERING FOOTPRINT*
0.95
0.037
MILLIMETERS
MIN
MAX
3.00 BSC
1.50 BSC
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
1.25
1.55
0_
10 _
2.50
3.00
1.9
0.074
2.4
0.094
1.0
0.039
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
9
NL17SZ125
PACKAGE DIMENSIONS
UDFN6, 1x1, 0.35P
CASE 517BX
ISSUE O
PIN ONE
REFERENCE
2X
0.08 C
2X
ÉÉÉ
ÉÉÉ
0.08 C
0.05 C
L1
A B
D
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
L3
E
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTION
ÉÉ
ÇÇ
ÉÉ
ÇÇ
TOP VIEW
EXPOSED Cu
DETAIL B
A3
A1
MOLD CMPD
DETAIL B
A
ALTERNATE
CONSTRUCTION
0.05 C
SIDE VIEW
C
SEATING
PLANE
3
1
6X
MILLIMETERS
MIN
MAX
0.50
0.65
0.00
0.05
0.13 REF
0.17
0.23
1.00 BSC
1.00 BSC
0.35
0.20
0.40
−−−
0.15
0.26
0.33
RECOMMENDED
SOLDERING FOOTPRINT*
e
DETAIL A
DIM
A
A1
A3
b
D
E
e
L
L1
L3
L
6X
6X
0.25
0.52
1.20
6
4
BOTTOM VIEW
6X
PACKAGE
OUTLINE
b
0.07
M
C A B
0.05
M
C
1
0.35
PITCH
NOTE 3
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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For additional information, please contact your local
Sales Representative
NL17SZ125/D
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