NL17SZ00 Single 2-Input NAND Gate The NL17SZ00 is a single 2−input NAND Gate in three tiny footprint packages. The device performs much as LCX multi−gate products in speed and drive. Features • • • • • • • • • Tiny SOT−353, SOT−553 and SOT−953 Packages 2.7 ns TPD at 5 V (typ) Source/Sink 24 mA at 3.0 V Over−Voltage Tolerant Inputs Pin For Pin with NC7SZ00P5X, TC7SZ00FU and TC7SZ00AFE Chip Complexity: FETs = 20 Designed for 1.65 V to 5.5 V VCC Operation NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant www.onsemi.com MARKING DIAGRAMS 5 5 1 SOT−353/SC70−5/SC−88A DF SUFFIX CASE 419A L1 MG G 1 L1 = Specific Device Marking M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location. 5 5 1 VCC 1 6 VCC SOT−553 XV5 SUFFIX CASE 463B 5 1 IN B 2 GND 3 IN A 4 2 5 NC 4 OUT Y 1 L1 M 3 1 SOT−353/SC70−5/ SC−88A/SOT−553 IN A 1 GND 2 UDFN 5 = Specific Device Marking = Date Code UDFN6 1.45 x 1.0 CASE 517AQ OUT Y GND UDFN6 1.0 x 1.0 CASE 517BX VCC X M 4 3 OUT Y T M M XM 1 = Specific Device Marking = Date Code SOT−953 CASE 527AE IN B L1 M F IN A IN B TM 1 = Specific Device Code = Month Code SOT−953 Figure 1. Pinouts (Top View) ORDERING INFORMATION IN A & OUT Y See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. IN B Figure 2. Logic Symbol This document contains information on some products that are still under development. ON Semiconductor reserves the right to change or discontinue these products without notice. © Semiconductor Components Industries, LLC, 2016 April, 2016 − Rev. 13 1 Publication Order Number: NL17SZ00/D NL17SZ00 PIN ASSIGNMENT (SOT−353/ SC70−5/SC−88A/SOT−553/ UDFN) PIN ASSIGNMENT (SOT−953) FUNCTION TABLE Pin Function Pin Function 1 IN A 1 IN A 2 GND A B Y 2 IN B 3 IN B L L H 3 GND 4 OUT Y L H H 4 OUT Y 5 VCC H L H 5 VCC H H L Output Input Y = AB MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage −0.5 to + 7.0 V VIN DC Input Voltage −0.5 to + 7.0 V −0.5 to + 7.0 V −0.5 to VCC + 0.5 V −50 mA VOUT < GND, VOUT > VCC ±50 mA VOUT < GND −50 mA VOUT VOUT DC Output Voltage (SOT−353/SC70−5/SC−88A/SOT−553/UDFN Packages) Power−Down Mode DC Output Voltage (SOT−953 Package) IIK DC Input Diode Current IOK DC Output Diode Current (SOT−953 Package) IOK DC Output Diode Current (SOT−353/SC70−5/SC−88A/SOT−553 Packages) IOUT DC Output Current ±50 mA ICC DC Supply Current per Supply Pin ±100 mA −65 to + 150 °C TSTG Storage Temperature Range TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias +150 °C qJA Thermal Resistance SOT−353 (Note 1) SOT−553 350 496 °C/W PD Power Dissipation in Still Air at 85°C SOT−353 SOT−553 186 135 mW MSL Moisture Sensitivity FR Flammability Rating ESD ESD Classification ILATCHUP Level 1 Oxygen Index: 28 to 34 Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Latchup Performance Above VCC and Below GND at 125°C (Note 5) UL 94 V−0 @ 0.125 in 2000 200 N/A ±100 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A, rated to EIA/JESD22−A114−B. 3. Tested to EIA/JESD22−A115−A, rated to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. www.onsemi.com 2 NL17SZ00 RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 1.65 5.5 V VCC DC Supply Voltage VIN DC Input Voltage 0 5.5 V VOUT DC Output Voltage (SOT−353/SC70−5/SC−88A/SOT−553/UDFN Packages) 0 5.5 V VOUT DC Output Voltage (SOT−953 Package) 0 VCC V −55 +125 °C 0 0 100 20 ns/V TA Operating Temperature Range tr, tf Input Rise and Fall Time VCC = 3.0 V ± 0.3 V VCC = 5.0 V ± 0.5 V DC ELECTRICAL CHARACTERISTICS (V) Min High−Level Input Voltage 1.65 to 1.95 2.3 to 5.5 0.75 VCC 0.7 VCC VIL Low−Level Input Voltage 1.65 to 1.95 2.3 to 5.5 VOH High−Level Output Voltage Symbol Parameter VIH VIN = VIL or VIH VOL Low−Level Output Voltage VIN = VIH or VOH Condition IOH = −100 mA IOH = −3 mA IOH = −8 mA IOH = −12 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 IOL = 100 mA IOL = 3 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 IIN Input Leakage Current VIN = 5.5 V or GND IOFF Power Off Leakage Current VIN = 5.5 V or VOUT = 5.5 V ICC Quiescent Supply Current VIN = 5.5 V or GND −555C v TA v 1255C TA = 255C VCC Typ Max Min 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC VCC − 0.1 1.29 1.9 2.2 2.4 2.3 3.8 Max VCC 1.4 2.1 2.4 2.7 2.5 4.0 Unit V 0.25 VCC 0.3 VCC VCC − 0.1 1.29 1.9 2.2 2.4 2.3 3.8 V V 0.1 0.24 0.3 0.4 0.4 0.55 0.55 0.1 0.24 0.3 0.4 0.4 0.55 0.55 V 0 to 5.5 ±0.1 ±1.0 mA 0 1 10 mA 5.5 1 10 mA 0.08 0.20 0.22 0.28 0.38 0.42 AC ELECTRICAL CHARACTERISTICS tR = tF = 3.0 ns tPLH tPHL Parameter Propagation Delay (Figure 3 and 4) −555C v TA v 1255C TA = 255C VCC Symbol Condition (V) Min Typ Max Min Max Unit RL = 1 MW, CL = 15 pF 1.65 2.0 5.4 11.4 2.0 12 ns RL = 1 MW, CL = 15 pF 1.8 2.0 4.5 9.5 2.0 10.0 RL = 1 MW, CL = 15 pF 2.5 to 0.2 0.8 3.0 6.5 0.8 7.0 RL = 1 MW, CL = 15 pF 3.3 ± 0.3 0.5 2.4 4.5 0.5 4.7 1.5 2.4 5.0 1.5 5.2 0.5 2.0 3.9 0.5 4.1 0.8 2.4 4.3 0.8 4.5 RL = 500 W, CL = 50 pF RL = 1 MW, CL = 15 pF 5.0 ± 0.5 RL = 500 W, CL = 50 pF www.onsemi.com 3 NL17SZ00 CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Unit CIN Input Capacitance VCC = 5.5 V, VI = 0 V or VCC u4 pF CPD Power Dissipation Capacitance (Note 6) 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF 10 MHz, VCC = 5.5 V, VI = 0 V or VCC 30 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. tf = 3 ns tf = 3 ns 90% INPUT A and B 50% VCC 90% VCC 50% 10% 10% tPHL GND OUTPUT INPUT RL tPLH CL VOH OUTPUT Y 50% 50% A 1−MHz square input wave is recommended for propagation delay tests. VOL Figure 3. Switching Waveform Figure 4. Test Circuit DEVICE ORDERING INFORMATION Package Type SHipping† NL17SZ00DFT2G SOT−353 (Pb−Free) 3000 / Tape & Reel NLV17SZ00DFT2G* SOT−353 (Pb−Free) 3000 / Tape & Reel NL17SZ00XV5T2G SOT−553 (Pb−Free) 4000 / Tape & Reel NL17SZ00AMUTCG (In Development) UDFN6, 1.45 x 1.0 (Pb−Free) 3000 / Tape & Reel NL17SZ00CMUTCG (In Development) UDFN6, 1.0 x 1.0 (Pb−Free) 3000 / Tape & Reel SOT−953 (Pb−Free) 8000 / Tape & Reel Device Order Number NL17SZ00P5T5G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. www.onsemi.com 4 NL17SZ00 PACKAGE DIMENSIONS SC−88A (SC−70−5/SOT−353) CASE 419A−02 ISSUE L A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. G 5 4 −B− S 1 2 DIM A B C D G H J K N S 3 D 5 PL 0.2 (0.008) M B M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 J C K H SOLDER FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 5 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 NL17SZ00 PACKAGE DIMENSIONS SOT−553 XV5 SUFFIX CASE 463B ISSUE B D −X− 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. A L 4 1 2 E −Y− 3 b e DIM A b c D E e L HE HE c 5 PL 0.08 (0.003) M X Y MILLIMETERS NOM MAX 0.55 0.60 0.22 0.27 0.13 0.18 1.60 1.70 1.20 1.30 0.50 BSC 0.10 0.20 0.30 1.50 1.60 1.70 MIN 0.50 0.17 0.08 1.50 1.10 SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.35 0.0531 1.0 0.0394 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 6 INCHES NOM 0.022 0.009 0.005 0.063 0.047 0.020 BSC 0.004 0.008 0.059 0.063 MIN 0.020 0.007 0.003 0.059 0.043 MAX 0.024 0.011 0.007 0.067 0.051 0.012 0.067 NL17SZ00 PACKAGE DIMENSIONS UDFN6, 1.45x1.0, 0.5P CASE 517AQ ISSUE O A B D L L L1 PIN ONE REFERENCE 0.10 C ÉÉÉ ÉÉÉ DETAIL A E OPTIONAL CONSTRUCTIONS DETAIL B MOLD CMPD DETAIL B 0.05 C 6X DIM A A1 A2 b D E e L L1 ÉÉÉ ÉÉÉ ÉÉÉ EXPOSED Cu TOP VIEW 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. OPTIONAL CONSTRUCTIONS A MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.07 REF 0.20 0.30 1.45 BSC 1.00 BSC 0.50 BSC 0.30 0.40 −−− 0.15 MOUNTING FOOTPRINT 0.05 C A1 A2 SIDE VIEW C SEATING PLANE 6X 0.30 PACKAGE OUTLINE e 6X L 1.24 3 1 DETAIL A 6X 0.53 6 4 BOTTOM VIEW 6X 0.50 PITCH DIMENSIONS: MILLIMETERS b 0.10 C A B 0.05 C 1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NOTE 3 www.onsemi.com 7 NL17SZ00 PACKAGE DIMENSIONS UDFN6, 1x1, 0.35P CASE 517BX ISSUE O PIN ONE REFERENCE 0.10 C 2X 2X 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 MM FROM TERMINAL TIP. 4. PACKAGE DIMENSIONS EXCLUSIVE OF BURRS AND MOLD FLASH. A B D ÉÉ ÉÉ ÉÉ E DIM A A1 A3 b D E e L L1 TOP VIEW A3 0.05 C A MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 0.05 C SIDE VIEW A1 C RECOMMENDED SOLDERING FOOTPRINT* SEATING PLANE 5X 0.48 e 5X L 6X 0.22 3 1 L1 1.18 6 4 BOTTOM VIEW 6X b 0.10 M C A B 0.05 M C 0.53 1 PKG OUTLINE 0.35 PITCH DIMENSIONS: MILLIMETERS NOTE 3 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 8 NL17SZ00 PACKAGE DIMENSIONS SOT−953 CASE 527AE ISSUE E X D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF THE BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A Y 5 4 PIN ONE INDICATOR HE E 1 2 3 DIM A b C D E e HE L L2 L3 C TOP VIEW SIDE VIEW e L 5X 5X L3 MILLIMETERS MIN NOM MAX 0.34 0.37 0.40 0.10 0.15 0.20 0.07 0.12 0.17 0.95 1.00 1.05 0.75 0.80 0.85 0.35 BSC 0.95 1.00 1.05 0.175 REF 0.05 0.10 0.15 −−− −−− 0.15 SOLDERING FOOTPRINT* 5X 0.35 5X 0.20 5X L2 5X BOTTOM VIEW b PACKAGE OUTLINE 0.08 X Y 1.20 1 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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