LANSDALE ML13155 Wideband fm if Datasheet

ML13155
Wideband FM IF
SEMICONDUCTOR TECHNICAL DATA
Legacy Device: Motorola MC13155
The ML13155 is a complete wideband FM detector designed for
satellite TV and other wideband data and analog FM applications. This device may be cascaded for higher IF gain and
extended Receive Signal Strength Indicator (RSSI) range.
•
•
•
•
•
•
•
1
12 MHz Video/Baseband Demodulator
Ideal for Wideband Data and Analog FM Systems
Limiter Output for Cascade Operation
Low Drain Current: 7.0 mA
Low Supply Voltage: 3.0 to 6.0 V
Operates to 300 Mhz
Operating Temperature Range TA = –40 to +85°C
SO–16 = -5P
PLASTIC PACKAGE
CASE 751B
(SO–16)
CROSS REFERENCE/ORDERING INFORMATION
PACKAGE
MOTOROLA
LANSDALE
SO 16
MC13155D
ML13155-5P
MAXIMUM RATINGS
Rating
Pin
Symbol
Value
Unit
Power Supply Voltage
11, 14
VEE (max)
6.5
Vdc
Input Voltage
1, 16
Vin
1.0
Vrms
Junction Temperature
–
TJ
+150
°C
Storage Temperature Range
–
Tstg
– 65 to +150
°C
NOTE:
16
Note: Lansdale lead free (Pb) product, as it
becomes available, will be identified by a part
number prefix change from ML to MLE.
Devices should not be operated at or outside these values. The “Recommended
Operating Conditions” provide for actual device operation.
Figure 1. Representative Block Diagram
Buffered
RSSI
Decouple Output
15
13
RSSI
Output
12
Limiter
Output
10
16
9
Input
1
Three Stage
Amplifier
Quad
Coil
Detector
Input
8
PIN CONNECTIONS
Input
1
16
Input
Decouple
2
15
Decouple
VCC1
3
14
VEE1
Output
4
13
RSSI Buffer
Output
5
12
RSSI
VCC2
6
11
VEE2
Limiter Out
7
10
Limiter Out
Quad Coil
8
9
Quad Coil
(Top View)
2
Decouple
4
Balanced
Outputs
5
7
Limiter
Output
NOTE: This device requires careful layout and decoupling to ensure stable operation.
Page 1 of 16
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Issue A
LANSDALE Semiconductor, Inc.
ML13155
RECOMMENDED OPERATING CONDITIONS
Pin
Symbol
Value
Unit
Power Supply Voltage (TA= 25°C)
– 40C ≤ TA ≤ 85°C
Rating
11, 14
3, 6
VEE
VCC
– 3.0 to – 6.0
Grounded
Vdc
Maximum Input Frequency
1, 16
fin
300
MHz
–
TJ
– 40 to + 85
°C
Ambient Temperature Range
DC ELECTRICAL CHARACTERISTICS (TA = 25°C, no input signal.)
Characteristic
Drain Current
(VEE = – 5.0 Vdc)
(VEE = – 5.0 Vdc)
Drain Current Total (see Figure 3)
(VEE = – 5.0 Vdc)
(VEE = – 6.0 Vdc)
(VEE = – 3.0 Vdc)
Pin
Symbol
Min
Typ
Max
Unit
11
14
14
I11
I14
I14
2.0
3.0
3.0
2.8
4.3
4.3
4.0
6.0
6.0
mA
11, 14
ITo tal
5.0
5.0
5.0
4.7
7.1
7.5
7.5
6.6
10
10.5
10.5
9.5
mA
AC ELECTRICAL CHARACTERISTICS (TA = 25°C, fIF = 70 MHz, VEE = – 5.0 Vdc Figure 2, unless otherwise noted.)
Pin
Min
Typ
Max
Unit
Input for – 3 dB Limiting Sensitivity
1, 16
–
1.0
2.0
mVrms
Differential Detector Output Voltage (Vin = 10 mVrms)
(fdev = ± 3.0 MHz) (VEE = – 6.0 Vdc)
(VEE = – 5.0 Vdc)
(VEE = – 3.0 Vdc)
4, 5
470
450
380
590
570
500
700
680
620
Detector DC Offset Voltage
4, 5
– 250
–
250
mVdc
RSSI Slope
13
1.4
2.1
2.8
µA/dB
RSSI Dynamic Range
13
31
35
39
dB
RSSI Output
(Vin = 100 µVrms)
(Vin = 1.0 mVrms)
(Vin = 10 mVrms)
(Vin = 100 mVrms)
(Vin = 500 mVrms)
12
–
–
16
–
–
2.1
2.4
24
65
75
–
–
36
–
–
RSSI Buffer Maximum Output Current (Vin = 10 mVrms)
13
–
2.3
–
Characteristic
Differential Limiter Output
(Vin = 1.0 mVrms)
(Vin = 10 mVrms)
mVp–p
µA
mAdc
mVrms
7, 10
100
–
140
180
–
–
Demodulator Video 3.0 dB Bandwidth
4, 5
–
12
–
MHz
Input Impedance (Figure 14)
@ 70 MHz Rp (VEE = – 5.0 Vdc)
@ 70 MHz Cp (C2=C15 = 100 p)
1, 16
–
–
450
4.8
–
–
Ω
pF
–
46
–
dB
Differential IF Power Gain
NOTE:
Page 2 of 16
1, 7, 10, 16
Positive currents are out of the pins of the device.
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Issue A
LANSDALE Semiconductor, Inc.
ML13155
CIRCUIT DESCRIPTION
The ML13155 consists of a wideband three–stage limiting
indicator (RSSI) circuit which provides a current output linamplifier, a wideband quadrature detector which may be
early proportional to the IF input signal level for approxioperated up to 200 MHz, and a received signal strength
mately 35 dB range of input level.
Figure 2. Test Circuit
1.0n
Vin
1.0n
1 IN1
49.9
Video
Output
27
IN2 16
10n
2 DEC1
DEC2 15
3 VCC1
VEE1 14
4 DETO1
RSSI 13
Buffer
5 DETO2
RSSI 12
6 VCC2
VEE2 11
100n
1.0n
10µ
VEE
+
1.0k
Limiter 1
Output
100n
1.0n
1.0n
VEE
+
330
QUAD2 9
8 QUAD1
10µ
Limiter 2
Output
LIMO2 10
7 LIMO1
1.0n
330
VEE
1.0n
499
20p
L1
L1 – Coilcraft part number 146–09J08S
260n
APPLICATIONS INFORMATION
EVALUATION PC BOARD
The evaluation PCB shown in Figures 19 and 20 is very versatile and is designed to cascade two ICs. The center section
of the board provides an area for attaching all surface mount
components to the circuit side and radial leaded components
to the component ground side of the PCB (see Figures 17 and
18). Additionally, the peripheral area surrounding the RF
core provides pads to add supporting and interface circuitry
as a particular application dictates. This evaluation board will
be discussed and referenced in this section.
LIMITING AMPLIFIER
Differential input and output ports interfacing the three stage
limiting amplifier provide a differential power gain of typically 46 dB and useable frequency range of 300 MHz. The IF
gain flatness may be controlled by decoupling of the internal
Page 3 of 16
feedback network at Pins 2 and 15.
Scattering parameter (S–parameter) characterization of the IF
as a two port linear amplifier is useful to implement maximum stable power gain, input matching, and stability over a
desired bandpass response and to ensure stable operation outside the bandpass as well. The ML13155 is unconditionally
stable over most of its useful operating frequency range; however, it can be made unconditionally stable over its entire
operating range with the proper decoupling of Pins 2 and 15.
Relatively small decoupling capacitors of about 100 pF have a
significant effect on the wideband response and stability.
This is shown in the scattering parameter tables where
S–parameters are shown for various values of C2 and C15
and at VEE of –3.0 and –5.0 V DC.
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Issue A
LANSDALE Semiconductor, Inc.
ML13155
TYPICAL PERFORMANCE AT TEMPERATURE
(See Figure 2. Test Circuit)
Figure 4. RSSI Output versus Frequency and
Input Signal Level
10
ITotal = I14 + I11
6.0
I14
4.0
– 20 dBm
40
– 30 dBm
20
– 40 dBm
1.0
2.0
3.0
4.0
5.0
6.0
7.0
0
10
8.0
Figure 5. Total Drain Current versus Ambient
Temperature and Supply Voltage
Figure 6. Detector Drain Current and Limiter
Drain Current versus Ambient Temperature
5.5
8.5
– 5.0 Vdc
VEE = – 6.0 Vdc
8.0
7.5
7.0
– 3.0 Vdc
6.5
6.0
5.5
– 30
–10
10
30
50
70
90
5.0
I14
4.0
3.5
I11
3.0
2.5
– 30
–10
10
30
50
70
90
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 7. RSSI Output versus Ambient
Temperature and Supply Voltage
Figure 8. RSSI Output versus Input Signal
Voltage (Vin at Temperature)
110
100
, RSSI OUTPUT ( µ A)
VEE = – 6.0 Vdc
23.5
VEE = – 5.0 Vdc
22.5
I
I
VEE = – 3.0 Vdc
22.0
– 30
– 10
10
30
50
70
90
TA = + 85°C
80
+ 25°C
60
– 40°C
40
12
23.0
110
20
0
0.1
TA, AMBIENT TEMPERATURE (°C)
Page 4 of 16
f = 70 MHz
VEE = – 5.0 Vdc
4.5
2.0
– 50
110
24.0
21.5
– 50
1000
f, FREQUENCY (MHz)
9.0
5.0
– 50
100
VEE, SUPPLY VOLTAGE (–Vdc)
24.5
, RSSI OUTPUT ( µ A)
–10 dBm
60
2.0
25.0
12
VEE = – 5.0Vdc
0 dBm
80
I 12 , RSSI OUTPUT ( µ A)
8.0
0.0
0.0
I 11 and I 14 , TOTAL DRAIN CURRENT (mAdc)
100
TA = 25°C
I 14 and I 11, DRAIN CURRENT (mAdc)
I14 and I Total, DRAIN CURRENT (mAdc)
Figure 3. Drain Current versus Supply Voltage
1.0
10
100
1000
Vin, INPUT VOLTAGE (mVrms)
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Issue A
LANSDALE Semiconductor, Inc.
Figure 9. Differential Detector Output
Voltage versus Ambient Temperature
and Supply Voltage
750
Figure 10. Differential Limiter Output Voltage
versus Ambient Temperature
(Vin = 1 and 10 mVrms)
DIFFERENTIAL LIMITER OUTPUT VOLTAGE
(Pins 7, 10), (mVrms)
DIFFERENTIAL DETECTOR OUTPUT VOLTAGE
(Pins 4, 5), (mVpp )
ML13155
VEE = – 6.0 Vdc
700
– 5.0 Vdc
650
– 3.0 Vdc
600
550
500
450
400
350
– 50
– 30
–10
10
30
50
70
90
110
220
f = 70 MHz
VEE = – 5.0 Vdc
200
180
160
Vin = 1.0 mVrms
140
120
– 50
– 30
TA, AMBIENT TEMPERATURE (C)
f dev = ± 6.0 MHz
± 5.0 MHz
±4.0 MHz
800
± 3.0 MHz
600
± 2.0 MHz
400
± 1.0 MHz
200
2.0
2.5
3.0
3.5
4.0
4.5
10
30
50
70
90
Figure 11B. Differential Detector Output Voltage
versus Q of Quadrature LC Tank
5.0
5.5
6.0
DIFFERENTIAL DETECTOR OUTPUT (mVpp )
DIFFERENTIAL DETECTOR OUTPUT (mVpp )
1600
0
1.5
–10
TA, AMBIENT TEMPERATURE (C)
Figure 11A. Differential Detector Output Voltage
versus Q of Quadrature LC Tank
Vin = – 30 dBm
1400 VEE = – 5.0 Vdc
fc = 70 MHz
1200 fmod = 1.0 MHz
(Figure 16 no external capacitors
1000 between Pins 7, 8 and 9, 10)
Vin = 10 mVrms
2400
Vin = – 30 dBm
VEE = – 5.0 Vdc
2000 fc = 70 MHz
fmod = 1.0 MHz
1600 (Figure 16 no external capacitors
between Pins 7, 8 and 9, 10)
f dev = ± 6.0 MHz
± 5.0 MHz
± 4.0 MHz
1200
± 3.0 MHz
800
± 2.0 MHz
400
± 1.0 MHz
0
1.5
2.0
2.5
Q OF QUADRATURE LC TANK
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Q OF QUADRATURE LC TANK
Figure 11.
Figure 13. S+N, N versus IF Input
Figure 12. RSSI Output Voltage versus IF Input
– 1.0
VEE = – 5.0 Vdc
fc = 70 MHz
(See Figure 16)
10
Capacitively coupled
interstage: no attenuation
S+N
0
–10
– 2.0
15 dB Interstage
Attenuator
– 3.0
– 4.0
S+N, N (dB)
RSSI OUTPUT VOLTAGE, (Vdc)
0
– 20
– 30
– 40
– 50
– 5.0
– 80
– 60
– 60
– 40
– 20
0
20
– 70
– 90
IF INPUT, (dBm)
Page 5 of 16
fc = 70 MHz
fmod = 1.0 MHz
fdev = ± 5.0 MHz
VEE = – 5.0 Vdc
– 70
N
– 50
– 30
– 10
10
IF INPUT (dBm)
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Issue A
LANSDALE Semiconductor, Inc.
ML13155
In the S–parameters measurements, the IF is treated as a
two–port linear class A amplifier. The IF amplifier is measured with a single–ended input and output configuration in
which the Pins 16 and 7 are terminated in the series combination of a 47 resistor and a 10 nF capacitor to VCC ground
(see Figure 14. S–Parameter Test Circuit).
The S–parameters are in polar form a the magnitude (MAG)
and angle (ANG). Also listed in the tables are the calculated
values for the stability and factor (K) and the Maximum
Available Gain (MAG). These terms are related in the following equations:
K = (1–IS11 I2–IS22I2 + I∆I2)/(2 I S12 S21 I)
where: I ∆ I = I S11 S22–S12 S21 I.
MAG = 10 log I S21 I/I S12 I + 10 log I K–(K2–1)1/2 I
where: K >1. The necessary and sufficient conditions for
unconditional stability are given as K>1:
B1 = 1 + I S11 I2 – I S22 I2 – I ∆ I2 > 0
Figure 14. S–Parameter Test Circuit
IF
Input
SMA
1.0n
1.0n
47
IN2 16
1 IN1
C2
C15
2 DEC1
DEC2 15
3 VCC1
VEE1 14
4 DETO1
RSSI 13
Buffer
5 DETO2
RSSI 12
6 VCC2
VEE2 11
VEE
1.0n
100n
10µ
+
SMA
47
Page 6 of 16
7 LIMO1
LIMO2 10
8 QUAD1
QUAD2 9
1.0n
1.0n
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IF
Output
Issue A
LANSDALE Semiconductor, Inc.
ML13155
S–Parameters (VEE = – 5.0 Vdc, TA = 25°C, C2 and C15 = 0 pF)
Frequency
Input S11
Forward S21
Rev S12
Output S22
K
MAG
MHz
MAG
ANG
MAG
ANG
MAG
ANG
MAG
ANG
MAG
dB
1.0
0.94
–13
8.2
143
0.001
7.0
0.87
– 22
2.2
32
2.0
0.78
–2 3
23.5
109
0.001
– 40
0.64
– 31
4.2
33.5
5.0
0.48
1.0
39.2
51
0.001
– 97
0.34
–17
8.7
33.7
7.0
0.59
15
40.3
34
0.001
– 41
0.33
–13
10.6
34.6
10
0.75
17
40.9
19
0.001
– 82
0.41
–1.0
5.7
36.7
20
0.95
7.0
42.9
– 6.0
0.001
– 42
0.45
0
1.05
46.4
50
0.98
–10
42.2
– 48
0.001
– 9.0
0.52
– 3.0
0.29
–
70
0.95
–16
39.8
– 68
0.001
112
0.54
–16
1.05
46.4
100
0.93
–2 3
44.2
– 93
0.001
80
0.53
– 22
0.76
–
150
0.91
–3 4
39.5
–139
0.001
106
0.50
– 34
0.94
–
200
0.87
–4 7
34.9
–179
0.002
77
0.42
– 44
0.97
–
500
0.89
–103
11.1
– 58
0.022
57
0.40
–117
0.75
–
700
0.61
–156
3.5
–164
0.03
0
0.52
179
2.6
13.7
900
0.56
162
1.2
92
0.048
– 44
0.47
112
4.7
4.5
1000
0.54
131
0.8
42
0.072
– 48
0.44
76
5.1
0.4
K
MAG
S–Parameters (VEE = – 5.0 Vdc, TA = 25°C, C2 and C15 = 100 pF)
Frequency
Page 7 of 16
Input S11
Forward S21
Rev S12
Output S22
MHz
MAG
ANG
MAG
ANG
MAG
ANG
MAG
ANG
MAG
dB
1.0
0.98
–15
11.7
174
0.001
–14
0.84
– 27
1.2
37.4
2.0
0.50
– 2.0
39.2
85.5
0.001
–108
0.62
– 35
6.0
35.5
5.0
0.87
8.0
39.9
19
0.001
100
0.47
– 9.0
4.2
39.2
7.0
0.90
5.0
40.4
9.0
0.001
– 40
0.45
– 8.0
3.1
40.3
10
0.92
3.0
41
1.0
0.001
– 40
0.44
– 5.0
2.4
41.8
20
0.92
– 2.0
42.4
–14
0.001
– 87
0.49
– 6.0
2.4
41.9
50
0.91
– 8.0
41.2
– 45
0.001
85
0.50
– 5.0
2.3
42
70
0.91
–11
39.1
– 63
0.001
76
0.52
– 4.0
2.2
41.6
100
0.91
–15
43.4
– 84
0.001
85
0.50
–11
1.3
43.6
150
0.90
– 22
38.2
–126
0.001
96
0.43
– 22
1.4
41.8
200
0.86
– 33
35.5
–160
0.002
78
0.43
– 21
1.3
39.4
500
0.80
– 66
8.3
– 9.0
0.012
75
0.57
– 63
1.7
23.5
700
0.62
– 96
2.9
– 95
0.013
50
0.49
–111
6.3
12.5
900
0.56
–120
1.0
–171
0.020
53
0.44
–150
13.3
2.8
1000
0.54
–136
0.69
154
0.034
65
0.44
–179
12.5
– 0.8
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Issue A
LANSDALE Semiconductor, Inc.
ML13155
S–Parameters (VEE = – 5.0 Vdc, TA = 25°C, C2 and C15 = 680 pF)
Frequency
Input S11
Forward S21
Rev S12
Output S22
K
MAG
MHz
MAG
ANG
MAG
ANG
MAG
ANG
MAG
ANG
MAG
dB
1.0
0.74
4.0
53.6
110
0.001
101
0.97
– 35
0.58
–
2.0
0.90
3.0
70.8
55
0.001
60
0.68
– 34
1.4
45.6
5.0
0.91
0
87.1
21
0.001
–121
0.33
– 60
1.1
49
7.0
0.91
0
90.3
11
0.001
–18
0.25
– 67
1.2
48.4
10
0.91
– 2.0
92.4
2.0
0.001
33
0.14
– 67
1.5
47.5
20
0.91
– 4.0
95.5
–16
0.001
63
0.12
–15
1.3
48.2
50
0.90
– 8.0
89.7
– 50
0.001
– 43
0.24
26
1.8
46.5
70
0.90
–10
82.6
–70
0.001
92
0.33
21
1.4
47.4
100
0.91
–14
77.12
–93
0.001
23
0.42
–1.0
1.05
49
150
0.94
– 20
62.0
–122
0.001
96
0.42
– 22
0.54
–
200
0.95
– 33
56.9
–148
0.003
146
0.33
– 62
0.75
–
500
0.82
– 63
12.3
–12
0.007
79
0.44
– 67
1.8
26.9
700
0.66
– 98
3.8
–107
0.014
84
0.40
–115
4.8
14.6
900
0.56
–122
1.3
177
0.028
78
0.39
–166
8.0
4.7
1000
0.54
–139
0.87
141
0.048
76
0.41
165
7.4
0.96
K
MAG
S–Parameters (VEE = – 3.0 Vdc, TA = 25°C, C2 and C15 = 0 pF)
Frequency
Page 8 of 16
Input S11
Forward S21
Rev S12
Output S22
MHz
MAG
ANG
MAG
ANG
MAG
ANG
MAG
ANG
MAG
dB
1.0
0.89
–14
9.3
136
0.001
2.0
0.84
– 27
3.2
30.7
2.0
0.76
– 22
24.2
105
0.001
– 90
0.67
– 37
3.5
34.3
5.0
0.52
5.0
35.7
46
0.001
– 32
0.40
–13
10.6
33.3
7.0
0.59
12
38.1
34
0.001
– 41
0.40
–10
9.1
34.6
10
0.78
15
37.2
16
0.001
– 92
0.40
–1.0
5.7
36.3
20
0.95
5.0
38.2
– 9.0
0.001
47
0.51
– 4.0
0.94
–
50
0.96
–11
39.1
– 50
0.001
–103
0.48
– 6.0
1.4
43.7
70
0.93
–17
36.8
– 71
0.001
– 76
0.52
–13
2.2
41.4
100
0.91
– 25
34.7
– 99
0.001
–152
0.51
–19
3.0
39.0
150
0.86
– 37
33.8
–143
0.001
53
0.49
– 34
1.7
39.1
200
0.81
– 49
27.8
86
0.003
76
0.55
– 56
2.4
35.1
500
0.70
– 93
6.2
– 41
0.015
93
0.40
–110
2.4
19.5
700
0.62
–144
1.9
–133
0.049
56
0.40
–150
3.0
8.25
900
0.39
–176
0.72
125
0.11
–18
0.25
163
5.1
–1.9
1000
0.44
166
0.49
80
0.10
– 52
0.33
127
7.5
– 4.8
www.lansdale.com
Issue A
LANSDALE Semiconductor, Inc.
ML13155
S–Parameters (VEE = – 3.0 Vdc, TA = 25°C, C2 and C15 = 100 pF)
Frequency
Input S11
Forward S21
Rev S12
Output S22
K
MAG
MHz
MAG
ANG
MAG
ANG
MAG
ANG
MAG
ANG
MAG
dB
1.0
0.97
–15
11.7
171
0.001
– 4.0
0.84
– 27
1.4
36.8
2.0
0.53
2.0
37.1
80
0.001
– 91
0.57
– 31
6.0
34.8
5.0
0.88
7.0
37.7
18
0.001
– 9.0
0.48
– 7.0
3.4
39.7
7.0
0.90
5.0
37.7
8.0
0.001
–11
0.49
– 7.0
2.3
41
10
0.92
2.0
38.3
1.0
0.001
– 59
0.51
– 9.0
2.0
41.8
20
0.92
– 2.0
39.6
–15
0.001
29
0.48
– 3.0
1.9
42.5
50
0.91
– 8.0
38.5
– 46
0.001
– 21
0.51
– 7.0
2.3
41.4
70
0.91
–11
36.1
– 64
0.001
49
0.50
– 8.0
2.3
40.8
100
0.91
–15
39.6
– 85
0.001
114
0.52
–13
1.7
37.8
150
0.89
– 22
34.4
–128
0.001
120
0.48
– 23
1.6
40.1
200
0.86
– 33
32
–163
0.002
86
0.40
– 26
1.7
37.8
500
0.78
– 64
7.6
–12
0.013
94
0.46
– 71
1.9
22.1
700
0.64
– 98
2.3
–102
0.027
58
0.42
–109
4.1
10.1
900
0.54
–122
0.78
179
0.040
38.6
0.35
–147
10.0
– 0.14
1000
0.53
–136
0.47
144
0.043
23
0.38
–171
15.4
– 4.52
K
MAG
S–Parameters (VEE = – 3.0 Vdc, TA = 25°C, C2 and C15 = 680 pF)
Frequency
Page 9 of 16
Input S11
Forward S21
Rev S12
Output S22
MHz
MAG
ANG
MAG
ANG
MAG
ANG
MAG
ANG
MAG
dB
1.0
0.81
3.0
37
101
0.001
–19
0.90
– 32
1.1
43.5
2.0
0.90
2.0
47.8
52.7
0.001
– 82
0.66
– 39
0.72
–
5.0
0.91
0
58.9
20
0.001
104
0.37
– 56
2.3
44
7.0
0.90
–1
60.3
11
0.001
– 76
0.26
– 55
2.04
44
10
0.91
– 2.0
61.8
3.0
0.001
105
0.18
– 52
2.2
43.9
20
0.91
– 4.0
63.8
– 15
0.001
59
0.11
–13
2.0
44.1
50
0.90
– 8.0
60.0
– 48
0.001
96
0.22
33
2.3
43.7
70
0.90
–11
56.5
– 67
0.001
113
0.29
15
2.3
43.2
100
0.91
–14
52.7
– 91
0.001
177
0.36
5.0
2.0
43
150
0.93
– 21
44.5
–126
0.001
155
0.35
–17
1.8
42.7
200
0.90
– 43
41.2
–162
0.003
144
0.17
– 31
1.6
34.1
500
0.79
– 65
7.3
–13
0.008
80
0.44
– 75
3.0
22
700
0.65
– 97
2.3
–107
0.016
86
0.38
–124
7.1
10.2
900
0.56
–122
0.80
174
0.031
73
0.38
–174
12
0.37
1000
0.55
–139
0.52
137
0.50
71
0.41
157
11.3
– 3.4
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Issue A
LANSDALE Semiconductor, Inc.
ML13155
DC BIASING CONSIDERATIONS
The DC biasing scheme utilizes two VCC connections (Pins 3 and
6) and two VEE connections (Pins 14 and 11). VEE1 (Pin 14) is
connected internally to the IF and RSSI circuits’ negative supply bus
while the VEE2 (Pin 11) is connected internally to the quadrature
detector’s negative bus. Under positive ground operation, this
unique configuration offers the ability to bias the RSSI and IF separately from the quadrature detector. When two ICs are cascaded as
shown in the 70 MHz application circuit and provided by the PCB
(see Figures 17 and 18), the first ML13155 is used without biasing
its quadrature detector, thereby saving approximately 3.0 mA. A
total current of 7.0 mA is used to fully bias each IC, thus the total
current in the application circuit is approximately 11 mA. Both VCC
pins are biased by the same supply. VCC1 (Pin 3) is connected internally to the positive bus of the first half of the IF limiting amplifier,
while VCC2 is internally connected to the positive bus of the RSSI,
the quadrature detector circuit, and the second half of the IF limiting
amplifier (see Figure 15). This distribution of the VCC enhances the
stability of the IC.
RSSI CIRCUITRY
The RSSI circuitry provides typically 35 dB of linear dynamic range
and its output voltage swing is adjusted by selection of the resistor
from Pin 12 to VEE. The RSSI slope is typically 2.1 µA/dB; thus,
for a dynamic range of 35 dB, the current output is approximately
74 µA. A 47 k resistor will yield an RSSI output voltage swing of
3.5 Vdc. The RSSI buffer output at Pin 13 is an emitter–follower
and needs an external emitter resistor of 10 k to VEE.
In a cascaded configuration (see circuit application in Figure 16),
only one of the RSSI Buffer outputs (Pin 13) is used; the RSSI outputs (Pin 12 of each IC) are tied together and the one closest to the
VEE supply trace is decoupled to VCC ground. The two pins are
connected to VEE through a 47 k resistor. This resistor sources a
RSSI current which is proportional to the signal level at the IF input;
typically 1.0 mVms (–47 dBm) is required to place the ML13155
into limiting. The measured RSSI output voltage response of the
application circuit is shown in Figure 12. Since the RSSI current
output is dependent upon the input signal level at the IF input, a
careful accounting of filter losses, matching and other losses and
gains must be made in the entire receiver system. In the block diagram of the application circuit shown below, an accounting of the
signal levels at points throughout the system shows how the RSSI
response in Figure 12 is justified.
Block Diagram of 70 MHz Video Receiver Application Circuit
Input
Level:
– 45 dBm
1.26 mVrms
– 70 dBm
71 µVrms
IF
Input
– 72 dBm
57 µVrms
– 32 dBm
57 µVrms
16
Saw
Filter
1:4
Transformer
– 25 dB
2.0 dB
(Insertion Loss)
(Insertion Loss)
Minimum Input to Acquire
Limiting in ML13155
16
10
ML13155
ML13155
7
1
1
40 dB Gain
CASCADING STAGES
The limiting IF output is pinned–out differentially, cascading is easily achieved by AC coupling stage to stage. In the evaluation PCB,
AC coupling is shown, however interstage filtering may be desirable
in some application. In which case, the S–parameters provide a
means to implement a low loss interstage match and better receiver
sensitivity.
–15 dB
(Attenuator)
40 dB Gain
selecting the insertion loss. A network topology shown below may
be used to provide a bandpass response with the desired insertion loss.
Where a linear response of the RSSI output is desired when cascading the ICs, it is necessary to provide at least 10 dB of interstage
loss. Figure 12 shows the RSSI response with and without interstage
loss. A 15 dB resistive attenuator is an inexpensive way to linearize
the RSSI response. This has its drawbacks since it is a wideband
noise source that is dependent upon the source and load impedance
and the amount of attenuation that it provides. A better, although
more costly, solution would be a bandpass filter designed to the
desired center frequency and bandpass response while carefully
Page 10 of 16
– 47 dBm
1.0 mVrms
www.lansdale.com
Network Topology
1.0n
10
16
0.22µ
7
1
1.0n
Issue A
LANSDALE Semiconductor, Inc.
ML13155
QUADRATURE DETECTOR
The quadrature detector is coupled to the IF with internal 2.0
pF. capacitors between Pins 7 and 8 and Pins 9 and 10. For
wideband data applications, such as FM video and satellite
receivers, the drive to the the detector can be increased with
additional external capacitors between these pins, thus, the
recovered video signal level output is increased for a given
bandwidth (see Figure 11A and Figure 11B).
The wideband performance of the detector is controlled by
the loaded Q of the LC tank circuit. The following equation
defines the components which set the detector circuit's bandwidth:
Q=RT/XL
(1)
where: RT is the equivalent shunt resistance across the LC
Tank and XL is the reactance of the quadrature inductor at the
IF frequency (XL = 2πfL).
The inductor and capacitor are chosen to form a resonant LC
Tank with the PCB and parasitic device capacitance at the
desired IF center frequency as predicted by:
(2)
fc = (2π √(LCp))–1
where: L is the parallel tank inductor and Cp is the equivalent
parallel capacitance of the parallel resonant tank circuit.
The following is a design example for a wideband detector at
70 MHz and a loaded Q of 5. The loaded Q of the quadrature
detector is chosen somewhat less than the Q of the IF bandpass. For an IF frequency of 70 MHz and an IF bandpass of
10.9 MHz, the IF bandpass Q is approximately 6.4.
Example:
Let thE external Cext = 20 pF. (The minimum value here
should be greater than 15 pF making it greater than the internal device and PCB parasitic capacitance. Cint ≈ 3.0 pF).
Cp = Cint + Cext = 23 pF
Rewrite Equation 2 and solve for L:
L = (0.159)2/(Cp fc2)
L = 198 nH, thus, a standard value is chosen.
L = 0.22 µH (tunable shielded inductor).
Page 11 of 16
The value of the total damping resistor to obtain the required
loaded Q of 5 can be calculated by rearranging Equation 1:
RT = Q(2πfl)
RT = 5(2π)(70)(0.22) - 483.8 Ω
The internal resistance, Rint between the quadrature tank Pins
8 and 9 is approximately 3200 Ω and is considered in determining the external resistance, Rext which is calculated from:
Rext = ((RT)(Rint))/(Rint–RT)
Rext = 570, thus, choose the standard value
Rext = 560 Ω
SAW FILTER
In wideband video data applications, the IF occupied bandwidth may be several MHz wide. A good rule of thumb is to
choose the IF frequency about 10 or more times greater than
the IF occupied bandwidth. The IF bandpass filter is a SAW
filter in video data applications where a very selective
response is needed (i.e., very sharp bandpass response). The
evaluation PCB is laid out to accommodate two SAW filter
package types: 1) A five–leaded plastic SIP package.
Recommended part numbers are Siemens X6950M which
operates at 70 MHz; 10.4 Mhz 3 dB passband, X6951M
(X252.8) which operates at 70 Mhz; 9.2 MHz 3 dB passband;
and X6958M which operates at 70 MHz, 6.3 MHz 3 dB passband, and 2) A four–leaded TO–39 metal can package.
Typical insertion loss in a wide bandpass SAW filter is 25 dB.
The above SAW filters require source and load impedances of
50 Ω to assure stable operation. On the PC board layout,
space is provided to add a matching network, such as a 1:4
surface mount transformer between the SAW filter output and
the input to the ML13155. A 1:4 transformer, made by
Coilcraft and Mini Circuits, provides a suitable interface (see
Figures 16, 17 and 18). In the circuit and layout, the SAW filter and the ML13155 are differentially configured with interconnect traces which are equal in length and symmetrical.
This balanced feed enhances RF stability, phase linearity, and
noise performance.
www.lansdale.com
Issue A
Page 12 of 16
16
1.0k
15
10p
Decouple
1
2
12
www.lansdale.com
Input
1.0k
Input
RSSIRSSI
Buffer
13
3
Bias
8.0k
8.0k
VCC 1
Bias
14
10
LIM Out
VEE 1
9
8
Quad Coil
Figure 15. Simplified Internal Circuit Schematic
2.0p
1.6k
7
2.0p
1.6k
LIM Out
1.0p
VEE 2
11
6
VCC 2
Det
Out
ML13155
LANSDALE Semiconductor, Inc.
Figure 15.
Issue A
LANSDALE Semiconductor, Inc.
ML13155
Figure 16. 70 MHz Video Receiver Application Circuit
If Input
1:4
1
5
SAW Filter
2
3
4
220
SAW Filter is Siemens
Part Number X6950M
1.0n
1.0n
RSSI
Output
ML13155
IN2 16
1 IN1
100p
2 DEC1
DEC2 15
3 VCC1
VEE1 14
4 DETO1
RSSI 13
Buffer
5 DETO2
RSSI 12
6 VCC2
VEE2 11
7 LIMO1
LIMO2 10
10k
100p
10n
47k
100n
1.0n
10n
QUAD2
8 QUAD1
9
+ 10µ
VEE1
820
820
820
820
1.0n
IN2 16
1 IN1
100p
1.0n
ML13155
DEC2 15
2 DEC1
100p
3 VCC1
VEE1 14
4 DETO1
RSSI 13
Buffer
5 DETO2
RSSI 12
6 VCC2
VEE2 11
10n
100n
Detector
Output
100n
33p
1.0k
33p
1.0k
10n
LIMO2 10
7 LIMO1
2.0p
QUAD2
8 QUAD1
10µ
VEE2
+
2.0p
9
560
20p
L
L– Coilcraft part number 146–08J08S
0.22µ
Page 13 of 16
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Issue A
LANSDALE Semiconductor, Inc.
ML13155
Legacy Applications Information
Figure 17. Component Placement (Circuit Side)
Figure 18. Component Placement (Ground Side)
Page 14 of 16
www.lansdale.com
Issue A
LANSDALE Semiconductor, Inc.
ML13155
Legacy Applications Information
Figure 19. Circuit Side View
4.0"
4.0"
Figure 20. Ground Side View
Page 15 of 16
www.lansdale.com
Issue A
LANSDALE Semiconductor, Inc.
ML13155
OUTLINE DIMENSIONS
SO–16 = -5P
(ML13155-5P)
PLASTIC PACKAGE
CASE 751B
(SO–16)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. 751B–03 IS OBSOLETE, NEW STANDARD
751B–04.
–A
–
16
9
–B
–
1
0.25 (0.010)
P
M
B
M
8 PL
8
G
R X 45
C
SEATING
PLANE
–T
–
D 16 PL
0.25 (0.010)
M
T
K
B
S
A
M
F
S
J
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80 10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0
7
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386 0.393
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0
7
0.229 0.244
0.010 0.019
Lansdale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Lansdale does not assume any liability arising out of the application or use of any product or circuit
described herein; neither does it convey any license under its patent rights nor the rights of others. “Typical” parameters which
may be provided in Lansdale data sheets and/or specifications can vary in different applications, and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by the customer’s
technical experts. Lansdale Semiconductor is a registered trademark of Lansdale Semiconductor, Inc.
Page 16 of 16
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Issue A