MC74LVX4066 Quad Analog Switch/ Multiplexer/Demultiplexer High–Performance Silicon–Gate CMOS The MC74LVX4066 utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF–channel leakage current. This bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full power–supply range (from VCC to GND). The LVX4066 is identical in pinout to the metal–gate CMOS MC14066 and the high–speed CMOS HC4066A. Each device has four independent switches. The device has been designed so that the ON resistances (RON) are much more linear over input voltage than RON of metal–gate CMOS analog switches. The ON/OFF control inputs are compatible with standard CMOS outputs; with pull–up resistors, they are compatible with LSTTL outputs. • • • • • • • • • Fast Switching and Propagation Speeds High ON/OFF Output Voltage Ratio Low Crosstalk Between Switches Diode Protection on All Inputs/Outputs Wide Power–Supply Voltage Range (VCC – GND) = 2.0 to 6.0 Volts Analog Input Voltage Range (VCC – GND) = 2.0 to 6.0 Volts Improved Linearity and Lower ON Resistance over Input Voltage than the MC14016 or MC14066 Low Noise Chip Complexity: 44 FETs or 11 Equivalent Gates 1 2 14–LEAD SOIC D SUFFIX CASE 751A 14–LEAD TSSOP DT SUFFIX CASE 948G PIN CONNECTION AND MARKING DIAGRAM (Top View) XA 1 14 YA 2 13 YB 3 12 XB B ON/OFF CONTROL C ON/OFF CONTROL GND 4 11 VCC A ON/OFF CONTROL D ON/OFF CONTROL XD 5 10 YD 6 9 YC 7 8 XC For detailed package marking information, see the Marking Diagram section on page 10 of this data sheet. LOGIC DIAGRAM XA http://onsemi.com YA FUNCTION TABLE A ON/OFF CONTROL XB B ON/OFF CONTROL XC C ON/OFF CONTROL XD D ON/OFF CONTROL 13 4 3 YB ANALOG OUTPUTS/INPUTS 5 8 9 L H Off On ORDERING INFORMATION 11 10 Device Package Shipping MC74LVX4066D SOIC 55 Units/Rail MC74LVX4066DR2 SOIC 2500 Units/Reel MC74LVX4066DT TSSOP 96 Units/Rail MC74LVX4066DTR2 TSSOP 2500 Units/Reel YD ANALOG INPUTS/OUTPUTS = XA, XB, XC, XD PIN 14 = VCC PIN 7 = GND Semiconductor Components Industries, LLC, 1999 March, 2000 – Rev. 2 State of Analog Switch YC 6 12 On/Off Control Input 1 Publication Order Number: MC74LVX4066/D MC74LVX4066 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ MAXIMUM RATINGS* Symbol Parameter Value Unit – 0.5 to + 7.0 V V VCC Positive DC Supply Voltage (Referenced to GND) VIS Analog Input Voltage (Referenced to GND) – 0.5 to VCC + 0.5 Vin Digital Input Voltage (Referenced to GND) – 0.5 to VCC + 0.5 V Iin DC Current Into or Out of ON/OFF Control Pins ± 20 mA Is DC Current Into or Out of Switch Pins ± 20 mA PD Power Dissipation in Still Air, 500 450 mW Tstg Storage Temperature – 65 to + 150 _C 260 _C TL SOIC Package† TSSOP Package† Lead Temperature, 1 mm from Case for 10 Seconds This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ). Unused outputs must be left open. I/O pins must be connected to a properly terminated line or bus. v *Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. †Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: – 6.1 mW/_C from 65_ to 125_C v ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 2.0 6.0 V Analog Input Voltage (Referenced to GND) GND VCC V Digital Input Voltage (Referenced to GND) GND VCC V Static or Dynamic Voltage Across Switch — 1.2 V – 55 + 85 VCC Positive DC Supply Voltage (Referenced to GND) VIS Vin VIO* TA Operating Temperature, All Package Types tr, tf Input Rise and Fall Time, ON/OFF Control Inputs (Figure 10) VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V _C ns/V 0 0 100 20 *For voltage drops across the switch greater than 1.2 V (switch on), excessive VCC current may be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ v ÎÎÎÎ v ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ DC ELECTRICAL CHARACTERISTIC Digital Section (Voltages Referenced to GND) Guaranteed Limit Symbol Parameter Test Conditions VCC V – 55 to 25_C 85_C 125_C Unit VIH Minimum High–Level Voltage ON/OFF Control Inputs (Note 1) Ron = Per Spec 2.0 3.0 4.5 5.5 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 V VIL Maximum Low–Level Voltage ON/OFF Control Inputs (Note 1) Ron = Per Spec 2.0 3.0 4.5 5.5 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 V Iin Maximum Input Leakage Current ON/OFF Control Inputs Vin = VCC or GND 5.5V ± 0.1 ± 1.0 ± 1.0 µA Maximum Quiescent Supply Current (per Package) Vin = VCC or GND VIO = 0 V 5.5 4.0 40 160 µA ICC 1. Specifications are for design target only. Not final specification limits. http://onsemi.com 2 MC74LVX4066 ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ v v ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ v ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ v ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ v ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ v ÎÎÎÎ v ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ DC ELECTRICAL CHARACTERISTICS Analog Section (Voltages Referenced to GND) Guaranteed Limit Symbol Ron VCC V – 55 to 25_C Vin = VIH VIS = VCC to GND |IS| 10 mA (Figures 1, 2) 2.0† 3.0 4.5 5.5 Vin = VIH VIS = VCC or GND (Endpoints) |IS| 10 mA (Figures 1, 2) Parameter Test Conditions Maximum “ON” Resistance 85_C 125_C — 40 25 20 — 45 30 25 — 50 35 30 2.0 3.0 4.5 5.5 — 30 25 20 — 35 30 25 — 40 35 30 Unit Ω ∆Ron Maximum Difference in “ON” Resistance Between Any Two Channels in the Same Package Vin = VIH VIS = 1/2 (VCC – GND) IS 2.0 mA 3.0 4.5 5.5 15 10 10 20 12 12 25 15 15 Ω Ioff Maximum Off–Channel Leakage Current, Any One Channel Vin = VIL VIO = VCC or GND Switch Off (Figure 3) 5.5 0.1 0.5 1.0 µA Ion Maximum On–Channel Leakage Current, Any One Channel Vin = VIH VIS = VCC or GND (Figure 4) 5.5 0.1 0.5 1.0 µA †At supply voltage (VCC) approaching 2 V the analog switch–on resistance becomes extremely non–linear. Therefore, for low–voltage operation, it is recommended that these devices only be used to control digital signals (See Figure 1a). AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, ON/OFF Control Inputs: tr = tf = 6 ns) Guaranteed Limit Symbol Parameter VCC V – 55 to 25_C 85_C 125_C Unit tPLH, tPHL Maximum Propagation Delay, Analog Input to Analog Output (Figures 8 and 9) 2.0 3.0 4.5 5.5 4.0 3.0 1.0 1.0 6.0 5.0 2.0 2.0 8.0 6.0 2.0 2.0 ns tPLZ, tPHZ Maximum Propagation Delay, ON/OFF Control to Analog Output (Figures 10 and 11) 2.0 3.0 4.5 5.5 30 20 15 15 35 25 18 18 40 30 22 20 ns tPZL, tPZH Maximum Propagation Delay, ON/OFF Control to Analog Output (Figures 10 and 1 1) 2.0 3.0 4.5 5.5 20 12 8.0 8.0 25 14 10 10 30 15 12 12 ns Maximum Capacitance ON/OFF Control Input — 10 10 10 pF Control Input = GND Analog I/O Feedthrough — — 35 1.0 35 1.0 35 1.0 C Typical @ 25°C, VCC = 5.0 V CPD Power Dissipation Capacitance (Per Switch) (Figure 13)* * Used to determine the no–load dynamic power consumption: P D = C PD V CC 2 f + I CC V CC . http://onsemi.com 3 15 pF MC74LVX4066 ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ v ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) Symbol Parameter Test Conditions VCC V Limit* 25_C Unit BW Maximum On–Channel Bandwidth or Minimum Frequency Response (Figure 5) fin = 1 MHz Sine Wave Adjust fin Voltage to Obtain 0 dBm at VOS Increase fin Frequency Until dB Meter Reads – 3 dB RL = 50 Ω, CL = 10 pF 4.5 5.5 150 160 MHz — Off–Channel Feedthrough Isolation (Figure 6) fin Sine Wave Adjust fin Voltage to Obtain 0 dBm at VIS fin = 10 kHz, RL = 600 Ω, CL = 50 pF 4.5 5.5 – 50 – 50 dB fin = 1.0 MHz, RL = 50 Ω, CL = 10 pF 4.5 5.5 – 37 – 37 Vin 1 MHz Square Wave (tr = tf = 6 ns) Adjust RL at Setup so that IS = 0 A RL = 600 Ω, CL = 50 pF 4.5 5.5 100 200 RL = 10 kΩ, CL = 10 pF 4.5 5.5 50 100 fin Sine Wave Adjust fin Voltage to Obtain 0 dBm at VIS fin = 10 kHz, RL = 600 Ω, CL = 50 pF 4.5 5.5 – 70 – 70 fin = 1.0 MHz, RL = 50 Ω, CL = 10 pF 4.5 5.5 – 80 – 80 — — THD Feedthrough Noise, Control to Switch (Figure 7) Crosstalk Between Any Two Switches (Figure 12) Total Harmonic Distortion (Figure 14) fin = 1 kHz, RL = 10 kΩ, CL = 50 pF THD = THDMeasured – THDSource VIS = 4.0 VPP sine wave VIS = 5.0 VPP sine wave *Guaranteed limits not tested. Determined by design and verified by qualification. http://onsemi.com 4 mVPP dB % 4.5 5.5 0.10 0.06 MC74LVX4066 400 250 350 Is = 1mA 200 –55°C 300 Ron (Ohms) Ron (Ohms) 25°C 150 Is = 5mA 100 Is = 9mA 250 200 85°C 150 125°C 100 50 50 0 Is = 15mA 0 0.5 1.5 1 2 0 2.5 0 0.5 1.5 1 Vin (Volts) 2 Vin (Volts) Figure 1a. Typical On Resistance, VCC = 2.0 V, T = 25°C Figure 1b. Typical On Resistance, VCC = 2.0 V 35 20 18 30 16 25 12 125°C 85°C 25°C 10 –55°C 14 20 Ron (Ohms) Ron (Ohms) 2.5 125°C 85°C 25°C –55°C 15 10 8 6 4 5 2 0 0 2 1 0 4 3 0 1 2 3 4 Vin (Volts) Vin (Volts) Figure 1c. Typical On Resistance, VCC = 3.0 V Figure 1d. Typical On Resistance, VCC = 4.5 V 18 PLOTTER 16 125°C 85°C 25°C 14 Ron (Ohms) 12 10 –55°C 8 PROGRAMMABLE POWER SUPPLY – MINI COMPUTER + DC ANALYZER VCC DEVICE UNDER TEST 6 4 2 ANALOG IN COMMON OUT 0 0 1 2 3 4 5 6 GND Vin (Volts) Figure 2. On Resistance Test Set–Up Figure 1e. Typical On Resistance, VCC = 5.5 V http://onsemi.com 5 5 MC74LVX4066 VCC VCC VCC VCC 14 GND 14 A A VCC OFF 7 SELECTED CONTROL INPUT VIL 7 Figure 3. Maximum Off Channel Leakage Current, Any One Channel, Test Set–Up CL* 7 SELECTED CONTROL INPUT VCC 14 VIS ON 0.1µF SELECTED CONTROL INPUT VIH Figure 4. Maximum On Channel Leakage Current, Test Set–Up VOS VCC 14 fin N/C ON GND fin dB METER VOS OFF 0.1µF CL* RL dB METER SELECTED CONTROL INPUT VCC 7 *Includes all probe and jig capacitance. *Includes all probe and jig capacitance. Figure 5. Maximum On–Channel Bandwidth Test Set–Up VCC VCC/2 Figure 6. Off–Channel Feedthrough Isolation, Test Set–Up VCC/2 14 RL RL OFF/ON VOS IS VCC CL* VCC GND Vin ≤ 1 MHz tr = tf = 3 ns 7 ANALOG IN SELECTED CONTROL INPUT 50% GND tPHL tPLH CONTROL 50% ANALOG OUT *Includes all probe and jig capacitance. Figure 7. Feedthrough Noise, ON/OFF Control to Analog Out, Test Set–Up Figure 8. Propagation Delays, Analog In to Analog Out http://onsemi.com 6 MC74LVX4066 VCC tr tf 14 ANALOG IN ANALOG OUT ON TEST POINT VCC 90% 50% 10% CONTROL GND CL* 7 SELECTED CONTROL INPUT tPZL tPLZ HIGH IMPEDANCE 50% VCC ANALOG OUT tPZH 10% VOL 90% VOH tPHZ 50% HIGH IMPEDANCE *Includes all probe and jig capacitance. Figure 9. Propagation Delay Test Set–Up Figure 10. Propagation Delay, ON/OFF Control to Analog Out VIS POSITION 1 WHEN TESTING tPHZ AND tPZH VCC POSITION 2 WHEN TESTING tPLZ AND tPZL 1 14 RL 2 fin VCC VCC 1 TEST POINT ON/OFF 2 0.1 µF 1 kΩ 14 VOS ON OFF VCC OR GND CL* RL RL SELECTED CONTROL INPUT SELECTED CONTROL INPUT CL* VCC/2 RL CL* VCC/2 7 7 VCC/2 *Includes all probe and jig capacitance. *Includes all probe and jig capacitance. Figure 11. Propagation Delay Test Set–Up Figure 12. Crosstalk Between Any Two Switches, Test Set–Up VCC A VIS VCC 14 N/C OFF/ON VOS 0.1 µF N/C fin ON RL 7 CL* TO DISTORTION METER VCC/2 SELECTED CONTROL INPUT 7 SELECTED CONTROL INPUT VCC ON/OFF CONTROL *Includes all probe and jig capacitance. Figure 13. Power Dissipation Capacitance Test Set–Up Figure 14. Total Harmonic Distortion, Test Set–Up http://onsemi.com 7 MC74LVX4066 0 – 10 FUNDAMENTAL FREQUENCY – 20 dBm – 30 – 40 – 50 DEVICE – 60 SOURCE – 70 – 80 – 90 1.0 2.0 3.0 FREQUENCY (kHz) Figure 15. Plot, Harmonic Distortion APPLICATION INFORMATION Therefore, using the configuration in Figure 16, a maximum analog signal of six volts peak–to–peak can be controlled. When voltage transients above VCC and/or below GND are anticipated on the analog channels, external diodes (Dx) are recommended as shown in Figure 17. These diodes should be small signal, fast turn–on types able to absorb the maximum anticipated current surges during clipping. An alternate method would be to replace the Dx diodes with Mosorbs (Mosorb is an acronym for high current surge protectors). Mosorbs are fast turn–on devices ideally suited for precise DC protection with no inherent wear out mechanism. The ON/OFF Control pins should be at VCC or GND logic levels, VCC being recognized as logic high and GND being recognized as a logic low. Unused analog inputs/outputs may be left floating (not connected). However, it is advisable to tie unused analog inputs and outputs to VCC or GND through a low value resistor. This minimizes crosstalk and feedthrough noise that may be picked–up by the unused I/O pins. The maximum analog voltage swings are determined by the supply voltages VCC and GND. The positive peak analog voltage should not exceed VCC. Similarly, the negative peak analog voltage should not go below GND. In the example below, the difference between VCC and GND is six volts. VCC VCC = 6.0 V + 6.0 V 14 ANALOG I/O ON ANALOG O/I Dx + 6.0 V SELECTED CONTROL INPUT 7 16 Dx ON 0V 0V VCC Dx VCC OTHER CONTROL INPUTS (VCC OR GND) Dx SELECTED CONTROL INPUT 7 Figure 16. 6.0 V Application OTHER CONTROL INPUTS (VCC OR GND) Figure 17. Transient Suppressor Application http://onsemi.com 8 MC74LVX4066 +5 V +5 V 14 ANALOG SIGNALS R* R* R* R* LVX4066 LSTTL/ NMOS 6 CONTROL INPUTS 15 ANALOG SIGNALS LVXT4066 LSTTL/ NMOS/ ABT/ ALS 5 14 14 ANALOG SIGNALS ANALOG SIGNALS 5 6 14 CONTROL INPUTS 15 7 7 R* = 2 TO 10 kΩ a. Using Pull-Up Resistors b. Using LVXT4066 Figure 18. LSTTL/NMOS to CMOS Interface VDD = 5 V 13 1 VCC = 2.0 TO 7.0 V 16 14 ANALOG SIGNALS 3 LVX4066 5 7 ANALOG SIGNALS MC14504 5 2 9 4 6 11 6 14 CONTROL INPUTS 10 15 7 14 8 Figure 19. TTL/NMOS–to–CMOS Level Converter Analog Signal Peak–to–Peak Greater than 5 V CHANNEL 4 1 OF 4 SWITCHES CHANNEL 3 1 OF 4 SWITCHES CHANNEL 2 1 OF 4 SWITCHES CHANNEL 1 1 OF 4 SWITCHES COMMON I/O – INPUT 1 OF 4 SWITCHES + OUTPUT LF356 OR EQUIVALENT 0.01 µF 1 2 3 4 CONTROL INPUTS Figure 20. 4–Input Multiplexer Figure 21. Sample/Hold Amplifier http://onsemi.com 9 MC74LVX4066 MARKING DIAGRAMS (Top View) 14 13 12 11 10 9 14 8 13 12 11 10 9 8 5 6 7 LVX LVX4066 4066 AWLYWW* 1 2 3 4 ALYW* 5 6 7 1 2 14–LEAD SOIC D SUFFIX CASE 751A 3 4 14–LEAD TSSOP DT SUFFIX CASE 948G *See Applications Note #AND8004/D for date code and traceability information. PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751A–03 ISSUE F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A– 14 8 –B– 1 P 7 PL 0.25 (0.010) 7 G 0.25 (0.010) M T B F J M K D 14 PL M R X 45° C SEATING PLANE B M S A S http://onsemi.com 10 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0° 7° 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0° 7° 0.228 0.244 0.010 0.019 MC74LVX4066 PACKAGE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G–01 ISSUE O 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. S S N 2X 14 L/2 0.25 (0.010) 8 M B –U– L PIN 1 IDENT. F 7 1 0.15 (0.006) T U N S DETAIL E K A –V– ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ K1 J J1 SECTION N–N –W– C 0.10 (0.004) –T– SEATING PLANE D G H DETAIL E http://onsemi.com 11 DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 ––– 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 ––– 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ MC74LVX4066 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). 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