Datasheet Serial EEPROM series Standard EEPROM MicroWire BUS EEPROM (3-Wire) BR93G86-3A ●General Description BR93G86-3A is serial EEPROM of serial 3-line Interface method. They are 16bit organization and CS PIN is the first PIN in their PIN configuration. ●Packages W(Typ.) x D(Typ.)x H(Max.) ●Features ■ 3-line communications of chip select, serial clock, serial data input / output (the case where input and output are shared) ■ Operations available at high speed 3MHz clock (4.5 V~5.5 V) ■ High speed write available (write time 5ms max.） ■ Same package and pin configuration from 1Kbit to 16Kbit ■ 1.7~5.5V single power source operation ■ Address auto increment function at read operation ■ Write mistake prevention function » Write prohibition at power on » Write prohibition by command code » Write mistake prevention function at low voltage ■ Self-timed programming cycle ■ Program condition display by READY / BUSY ■ Compact package SOP8/SOP-J8/SSOP-B8/TSSOP-B8/MSOP8/ TSSOP-B8J/DIP-T8/VSON008X2030 ■ More than 40 years data retention ■ More than 1 million write cycles ■ Initial delivery state all addresses FFFFh TSSOP-B8 DIP-T8 3.00mm x 6.40mm x 1.20mm 9.30mm x 6.50mm x 7.10mm SOP8 TSSOP-B8J 5.00mm x 6.20mm x 1.71mm 3.00mm x 4.90mm x 1.10mm SOP- J8 MSOP8 4.90mm x 6.00mm x 1.65mm 2.90mm x 4.00mm x 0.90mm SSOP-B8 VSON008X2030 3.00mm x 6.40mm x 1.35mm 2.00mm x 3.00mm x 0.60mm ●BR93G86-3A *1 DIP-T8 is not halogen free package Capacity Bit Format Type Power Source Voltage BR93G86-3A DIP-T8 BR93G86F-3A SOP8 BR93G86FJ-3A SOP-J8 BR93G86FV-3A 16Kbit 1024×16 Package BR93G86FVT-3A SSOP-B8 1.7V to 5.5V TSSOP-B8 BR93G86FVJ-3A TSSOP-B8J BR93G86FVM-3A MSOP8 BR93G86NUX-3A VSON008X2030 ○Product structure：Silicon monolithic integrated circuit www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 ○This product is not designed protection against radioactive rays 1/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Absolute Maximum Ratings Parameter Supply voltage Permissible dissipation Symbol Ratings Unit VCC -0.3 to +6.5 V Pd Storage temperature Operating temperature Input voltage/ Output voltage Junction temperature Remarks 0.80 (DIP-T8) When using at Ta=25℃ or higher 8.0mW to be reduced per 1℃. 0.45 (SOP8) When using at Ta=25℃ or higher 4.5mW to be reduced per 1℃. 0.45 (SOP-J8) When using at Ta=25℃ or higher 4.5mW to be reduced per 1℃. 0.30 (SSOP-B8) W 0.33 (TSSOP-B8) When using at Ta=25℃ or higher 3.0mW to be reduced per 1℃. When using at Ta=25℃ or higher 3.3mW to be reduced per 1℃. 0.31 (TSSOP-B8J) When using at Ta=25℃ or higher 3.1mW to be reduced per 1℃. 0.31 (MSOP8) When using at Ta=25℃ or higher 3.1mW to be reduced per 1℃. 0.30 (VSON008X2030) When using at Ta=25℃ or higher 3.0mW to be reduced per 1℃. Tstg －65 to +150 ℃ Topr －40 to +85 ℃ ‐ -0.3 to Vcc+1.0 V The Max value of Input voltage/Output voltage is not over 6.5V. When the pulse width is 50ns or less, the Min value of Input voltage/Output voltage is not under -0.8V. Tjmax 150 ℃ Junction temperature at the storage condition ●Memory cell characteristics (VCC=1.7~5.5V) Limit Parameter Write cycles *1 Data retention *1 Unit Condition - Times Ta=25℃ - - Years Ta=25℃ Symbol Limits Unit VCC 1.7~5.5 VIN 0~VCC Min. Typ. Max. 1,000,000 - 40 ○Shipment data all address FFFFh *1 Not 100% TESTED ●Recommended Operation Ratings Parameter Supply voltage V Input voltage www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 2/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●DC characteristics (Unless otherwise specified, VCC=1.7~5.5V, Ta=-40~+85℃) Limits Parameter Symbol Unit Min. Typ. Max. Condition Input low voltage VIL -0.3*1 - 0.3VCC V 1.7V≦VCC≦5.5V Input high voltage VIH 0.7VCC - VCC+1.0 V 1.7V≦VCC≦5.5V Output low voltage 1 VOL1 0 - 0.4 V IOL=2.1mA, 2.7V≦VCC≦5.5V Output low voltage 2 VOL2 0 - 0.2 V IOL=100μA Output high voltage 1 VOH1 2.4 - VCC V IOH=-0.4mA, 2.7V≦VCC≦5.5V Output high voltage 2 VOH2 VCC-0.2 - VCC V IOH=-100μA Input leakage current1 ILI1 -1 - +1 µA VIN=0V~VCC(CS,SK,DI) Output leakage current ILO -1 - +1 µA VOUT=0V~VCC, CS=0V - - 1.0 mA VCC=1.7V, fSK=1MHz, tE/W =5ms (WRITE) - - 2.0 mA VCC=5.5V ,fSK=3MHz, tE/W =5ms (WRITE) - - 0.5 mA fSK=1MHz (READ) - - 1.0 mA fSK=3MHz (READ) - - 2.0 mA - - 3.0 mA - - 2.0 µA ICC1 Supply current ICC2 ICC3 Standby current ISB1 VCC=2.5V, fSK=1MHz tE/W =5ms (WRAL, ERAL) VCC=5.5V ,fSK=3MHz tE/W =5ms (WRAL, ERAL) CS=0V *1 When the pulse width is 50ns or less, the Min value of VIL is admissible to -0.8V. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 3/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●AC characteristics (Unless otherwise specified, VCC=1.7~2.5V, Ta=-40~+85℃) Limits Parameter Symbol Min. Typ. Max. Unit SK frequency fSK - - 1 MHz SK high time tSKH 250 - - ns SK low time tSKL 250 - - ns CS low time tCS 250 - - ns CS setup time tCSS 200 - - ns DI setup time tDIS 100 - - ns CS hold time tCSH 0 - - ns DI hold time tDIH 100 - - ns Data “1” output delay tPD1 - - 400 ns Data “0” output delay tPD0 - - 400 ns Time from CS to output establishment tSV - - 400 ns Time from CS to High-Z tDF - - 200 ns Write cycle time tE/W - - 5 ms (Unless otherwise specified, VCC=2.5~4.5V, Ta=-40~+85℃) Parameter Symbol Limits Min. Typ. Max. Unit SK frequency fSK - - 2 MHz SK high time tSKH 230 - - ns SK low time tSKL 200 - - ns CS low time tCS 200 - - ns CS setup time tCSS 50 - - ns DI setup time tDIS 100 - - ns CS hold time tCSH 0 - - ns DI hold time tDIH 100 - ns Data “1” output delay tPD1 - - 200 ns Data “0” output delay tPD0 - - 200 ns Time from CS to output establishment tSV - - 150 ns Time from CS to High-Z tDF - - 100 ns Write cycle time tE/W - - 5 ms (Unless otherwise specified, VCC=4.5~5.5V, Ta=-40~+85℃) Parameter Symbol Limits Min. Typ. Max. Unit SK frequency fSK - - 3 MHz SK high time tSKH 100 - - ns SK low time tSKL 100 - - ns CS low time tCS 200 - - ns CS setup time tCSS 50 - - ns DI setup time tDIS 50 - - ns CS hold time tCSH 0 - - ns DI hold time tDIH 50 - - ns Data “1” output delay tPD1 - - 200 ns Data “0” output delay tPD0 - - 200 ns Time from CS to output establishment tSV - - 150 ns Time from CS to High-Z tDF - - 100 ns Write cycle time tE/W - - 5 ms www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 4/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Serial input / output timing 1/ fSK CS tCSS tSKH tSKL tCSH SK tDIS tD IH DI tPD1 tPD0 DO(READ) t DF tSV STATUS VALID DO(WRITE) Figure 1. Sync data input / output timing ○Data is taken by DI sync with the rise of SK. ○At read operation, data is output from DO in sync with the rise of SK. ○The STATUS signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area DO where CS is high, and valid until the next command start bit is input. And, while CS is low, DO becomes High-Z. ○After completion of each mode execution, set CS low once for internal circuit reset, and execute the following operation mode. ○1/fSK is the SK clock cycle, even if fSK is maximum, the SK clock cycle can’t be tSKH(Min.)+tSKL(Min.) ○For “Write cycle time tE/W”, please see Figure 36,37,39,40. ○For “CS low time tCS”, please see Figure 36,37,39,40. ●Block diagram CS Power source voltage detection Command decode Control SK Clock generation Write High voltage occurrence prohibition DI Command register Address buffer Address 10bit decoder 10bit 16,384 bit EEPROM Data DO Dummy bit register 16bit R/W amplifier 16bit Figure 2. Block diagram www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 5/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Pin Configuration VCC DU BR93G86-3A BR93G86F-3A BR93G86FJ-3A BR93G86FV-3A BR93G86FVT-3A BR93G86FVJ-3A BR93G86FVM-3A BR93G86NUX-3A CS NC GND :DIP-T8 :SOP8 :SOP-J8 :SSOP-B8 :TSSOP-B8 :TSSOP-B8J :MSOP8 :VSON008X2030 SK DI DO Figure 3. Pin Configuration ●Pin Descriptions Pin name I/O Function CS Input Chip select input SK Input Serial clock input DI Input Start bit, ope code, address, and serial data input DO Output GND - All input / output reference voltage, 0V NC - Non connected terminal*1 DU - Don’t use terminal*1 VCC - Supply voltage ――――― Serial data output, READY / BUSY STATUS display output *1 Terminals not used may be set to any of high,low, and OPEN www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 6/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Typical Performance Curves 6 6 INPUT LOW VOLTAGE : V IH (V) INPUT HIGH VOLTAGE : V IL (V) Ta=-40℃ Ta= 25℃ Ta= 85℃ 5 4 3 SPEC 2 1 0 1 2 3 4 5 4 3 2 SPEC 1 6 0 1 2 3 4 5 SUPPLY VOLTAGE: VCC(V) SUPPLY VOLTAGE: VCC(V) Figure 4. Input high voltage VIH(CS,SK,DI) Figure 5. Input low voltage VIL(CS,SK,DI) 1 6 1 0.8 OL2 (V) Ta=-40℃ Ta= 25℃ Ta= 85℃ OUTPUT LOW VOLTAGE2 : V OL1 (V) Ta=-40℃ Ta= 25℃ Ta= 85℃ 0 0 OUTPUT LOW VOLTAGE1 : V 5 0.6 SPEC 0.4 0.2 0 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.8 0.6 0.4 SPEC 0.2 0 0 1 2 3 4 5 0 2 3 4 5 OUTPUT LOW CURRENT : IOL(mA) OUTPUT LOW CURRENT:IOL(mA) Figure 6. Output low voltage1 VOL1(VCC=2.7V) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 Figure 7. Output low voltage2 VOL2(VCC=1.7V) 7/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Typical Performance Curves‐Continued 4 4 OH2(V) Ta=-40℃ Ta= 25℃ Ta= 85℃ OUTPUT HIGH VOLTAGE2 : V OUTPUT HIGH VOLTAGE1 : V OH1(V) 5 3 SPEC 2 1 0 Ta=-40℃ Ta= 25℃ Ta= 85℃ 3 2 SPEC 1 0 0 0.4 0.8 1.2 1.6 0 0.4 OUTPUT HIGH CURRENT: IOH(mA) 1.6 Figure 9. Output high voltage2 VOH2(VCC=1.7V) 1.2 LI1 (uA) 1.2 SPEC 1 0.8 INPUT LEAKAGE CURRENT1 : I LI1 (uA) 1.2 OUTPUT HIGH CURRENT: IOH(mA) Figure 8. Output high voltage1 VOH1(VCC=2.7V) INPUT LEAKAGE CURRENT1 : I 0.8 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.6 0.4 0.2 0 SPEC 1 0.8 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.6 0.4 0.2 0 0 1 2 3 4 5 6 0 1 2 3 4 5 SUPPLY VOLTAGE: VCC(V) SUPPLY VOLTAGE: VCC(V) Figure 10. Input leakage current1 ILI1 (CS) Figure 11. Input leakage current1 ILI1(SK) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 8/36 6 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Typical Performance Curves‐Continued LO(uA) 1.2 SPEC 1 0.8 OUTPUT LEAKAGE CURRENT : I INPUT LEAKAGE CURRENT1 : I LI1 (uA) 1.2 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.6 0.4 0.2 0 SPEC 1 0.8 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.6 0.4 0.2 0 0 1 2 3 4 5 6 0 1 SUPPLY VOLTAGE: VCC(V) 3 4 5 6 SUPPLY VOLTAGE: VCC(V) Figure 13. Output leakage current ILO(DO) Figure 12. Input leakage current1 ILI1(DI) 2.5 5 SUPPLY CURRENT (WRITE) : ICC1(mA) SUPPLY CURRENT (WRITE) : ICC1(mA) 2 Ta=-40℃ Ta= 25℃ Ta= 85℃ 2 1.5 SPEC 1 0.5 0 Ta=-40℃ Ta= 25℃ Ta= 85℃ 4 3 SPEC 2 1 0 0 1 2 3 4 5 6 0 SUPPLY VOLTAGE: VCC(V) 2 3 4 5 6 SUPPLY VOLTAGE: VCC(V) Figure 15. Supply current (WRITE) ICC1(WRITE,fSK=3MHz) Figure 14. Supply current (WRITE) ICC1(WRITE, fSK=1MHz) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 9/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Typical Performance Curves‐Continued 2 CC2 (mA) 2.5 Ta=-40℃ Ta= 25℃ Ta= 85℃ SUPPLY CURRENT (READ) : I SUPPLY CURRENT (READ) : I CC2 (mA) 2.5 1.5 1 SPEC 0.5 Ta=-40℃ Ta= 25℃ Ta= 85℃ 2 1.5 SPEC 1 0.5 0 0 0 1 2 3 4 5 6 0 1 SUPPLY VOLTAGE: VCC(V) 3 4 5 6 SUPPLY VOLTAGE: VCC(V) Figure 16 Supply current (READ) ICC2(READ,fSK=1MHz). Figure 17. Supply current (READ) ICC2(READ,fSK=3MHz) 5 SUPPLY CURRENT (WRAL) : ICC3(mA) 2.5 SUPPLY CURRENT (WRAL) : I CC3(mA) 2 SPEC 2 Ta=-40℃ Ta= 25℃ Ta= 85℃ 1.5 1 0.5 Ta=-40℃ Ta= 25℃ Ta= 85℃ 4 SPEC 3 2 1 0 0 0 1 2 3 4 5 0 6 2 3 4 5 6 SUPPLY VOLTAGE: VCC(V) SUPPLY VOLTAGE: VCC(V) Figure 19. Supply current (WRAL) ICC3(WRAL,fSK=3MHz) Figure 18. Supply current (WRAL) ICC3(WRAL,fSK=1MHz) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 10/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Typical Performance Curves‐Continued 1000 2.5 Ta=-40℃ Ta= 25℃ Ta= 85℃ SPEC SK FREQUENCY : fSK(MHz) SB1(uA) STANDBY CURRENT : I 100 2 Ta=-40℃ Ta= 25℃ Ta= 85℃ 1.5 1 0.5 10 SPEC 1 0.1 0.01 0 0 1 2 3 4 5 0 6 1 2 3 4 5 6 SUPPLY VOLTAGE: VCC(V) SUPPLY VOLTAGE: VCC(V) Figure 20. Standby current ISB1(CS=0V) Figure 21. SK frequency fSK 500 500 Ta=-40℃ Ta= 25℃ Ta= 85℃ 400 SK LOW TIME : tSKL(ns) 400 SK HIGH TIME : tSKH(ns) SPEC SPEC 300 SPEC SPEC 200 SPEC 100 Ta=-40℃ Ta= 25℃ Ta= 85℃ 300 SPEC SPEC 200 SPEC 100 0 0 0 1 2 3 4 5 6 0 SUPPLY VOLTAGE: VCC(V) 2 3 4 5 6 SUPPLY VOLTAGE: VCC(V) Figure 22. SK high time tSKH www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 Figure 23. SK low time tSKL 11/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Typical Performance Curves‐Continued 50 500 Ta=-40℃ Ta= 25℃ Ta= 85℃ CS HOLD TIME : tCSH(ns) CS LOW TIME : tCS(ns) 400 SPEC 0 300 SPEC SPEC 200 100 -50 Ta=-40℃ Ta= 25℃ Ta= 85℃ -100 -150 -200 -250 0 -300 0 1 2 3 4 5 6 0 1 SUPPLY VOLTAGE: VCC(V) 2 4 5 6 SUPPLY VOLTAGE: VCC(V) Figure 24. CS low time tCS Figure 25. CS hold time tCSH 150 300 250 SPEC 100 SPEC DI SETUP TIME : tDIS(ns) CS SETUP TIME : tCSS(ns) 3 200 Ta=-40℃ Ta= 25℃ Ta= 85℃ 150 100 SPEC 50 Ta=-40℃ Ta= 25℃ Ta= 85℃ 50 SPEC 0 -50 0 0 1 2 3 4 5 0 6 1 2 3 4 SUPPLY VOLTAGE: VCC(V) SUPPLY VOLTAGE: VCC(V) Figure 26. CS setup time tCSS Figure 27. DI setup time tDIS www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 12/36 5 6 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Typical Performance Curves‐Continued 150 SPEC 100 DI HOLD TIME : tDIH(ns) DATA "0" OUTPUT DELAY : tPD0(ns) 1000 Ta=-40℃ Ta= 25℃ Ta= 85℃ 50 SPEC 0 Ta=-40℃ Ta= 25℃ Ta= 85℃ 800 600 SPEC 400 SPEC 200 -50 0 0 1 2 3 4 5 6 0 1 SUPPLY VOLTAGE: VCC(V) 3 4 5 6 SUPPLY VOLTAGE: VCC(V) Figure 29. Data "0" output delay tPD0 Figure 28. DI hold time tDIH 1000 500 Ta=-40℃ Ta= 25℃ Ta= 85℃ 800 TIME FROM CS TO OUTPUT ESTABLISHMENT : tSV(ns) DATA "1" OUTPUT DELAY : tPD1(ns) 2 SPEC 400 600 Ta=-40℃ Ta= 25℃ Ta= 85℃ 300 SPEC 400 200 SPEC 200 SPEC 100 0 0 1 2 3 4 5 6 0 SUPPLY VOLTAGE: VCC(V) 1 2 3 4 5 6 SUPPLY VOLTAGE: VCC(V) Figure 31. Time from CS to output establishment tSV Figure 30. Data "1" output delay tPD1 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 0 13/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Typical Performance Curves‐Continued 6 SPEC 200 Ta=-40℃ Ta= 25℃ Ta= 85℃ 150 SPEC 5 WRITE CYCLE TIME : t E/W(ms) TIME FROM CS TO HIGH-Z : t DF(ns) 250 SPEC 100 50 0 4 3 Ta=-40℃ Ta= 25℃ Ta= 85℃ 2 1 0 0 1 2 3 4 5 6 0 SUPPLY VOLTAGE: VCC(V) 2 3 4 5 6 SUPPLY VOLTAGE: VCC(V) Figure 33. Write cycle time tE/W Figure 32. Time from CS to High-Z tDF www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 14/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Description of operations Communications of the MicroWire BUS are carried out by SK (serial clock), DI (serial data input),DO (serial data output) ,and CS (chip select) for device selection. When to connect one EEPROM to a microcontroller, connect it as shown in Figure 34(a) or Figure 34(b). When to use the input and output common I/O port of the microcontroller, connect DI and DO via a resistor as shown in Figure 34(b) (Refer to pages 21, 22.), and connection by 3 lines is available. In the case of plural connections, refer to Figure 34 (c). Microcontroller SK SK SK DO DI DI DO BR93GXX CS SK DI/O DI DO (a). Connection by 4 lines CS3 CS2 CS1 SK DO DI (b). Connection by 3 lines CS SK DI DO CS Microcontroller CS CS SK DI DO BR93GXX CS SK DI DO Microcontroller CS Device 1 Device 2 Device 3 (c). Connection example of plural devices Figure 34. Connection method with microcontroller Communications of the MicroWire BUS are started by the first “1” input after the rise of CS. This input is called a start bit. After input of the start bit, input ope code, address and data. Address and data are input all in MSB first manners. “0” input after the rise of CS to the start bit input is all ignored. Therefore, when there is limitation in the bit width of PIO of the microcontroller, input “0” before the start bit input, to control the bit width. ●Command mode Start bit Ope code Address BR93G86-3 MSB of Address(Am) is A9 Data MSB of Data(Dx) is D15 Read (READ) *1 1 10 A9,A8,A7,A6,A5,A4,A3,A2,A1,A0 D15~D0(READ DATA) Write enable (WEN) 1 00 1 1 ******** Write disable (WDS) 1 00 0 0 ******** Write (WRITE) *2 1 01 Write all (WRAL) *2 1 00 Erase (ERASE) 1 11 Erase all (ERAL) 1 00 Command A9,A8,A7,A6,A5,A4,A3,A2,A1,A0 0 1 ******** A9,A8,A7,A6,A5,A4,A3,A2,A1,A0 1 0 ******** Required clocks(n) BR93G86-3:n=29 BR93G86-3:n=13 D15~D0(WRITE DATA) D15~D0(WRITE DATA) BR93G86-3:n=29 BR93G86-3:n=13 ・ Input the address and the data in MSB first manners. ・ As for *, input either “1” or “0” . *Start bit Acceptance of all the commands of this IC starts at recognition of the start bit. The start bit means the first “1” input after the rise of CS. *1 As for read, by continuous SK clock input after setting the read command, data output of the set address starts, and address data in significant order are sequentially output continuously. (Auto increment function) *2 For write or write all commands, an internal erase or erase all is included and no separate erase or erase all is needed before write or write all command. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 15/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Timing chart 1) Read cycle (READ) ～ ～ ～ ～ ～ ～ CS *1 SK ～ ～ 1 2 n 4 DI 1 1 ～ ～ ～ ～ A1 Am 0 n+1 ～ ～ *2 A0 ～ ～ *2 ～ ～ 0 ～ ～ DO Dx Dx-1 D1 D0 ～ ～ Dx Dx-1 ～ ～ ～ ～ High-Z Am: MSB of address Dx: MSB of data n: required clocks *1 Start bit When data “1” is input for the first time after the rise of CS, this is recognized as a start bit. And when “1” is input after plural “0” are input, it is recognized as a start bit, and the following operation is started. This is common to all the commands to described hereafter. *2 For the meaning of Am,Dx,n,please see tables of command mode in Page15. For example, Am=A9,Dx=D15,n=29. Figure 35. Read cycle ○When the read command is recognized, input address data (16bit) is output to serial. And at that moment, at taking A0, in sync with the rise of SK, “0” (dummy bit) is output. And, the following data is output in sync with the rise of SK. This IC has an address auto increment function which is valid only at read command. This is the function where after the above read execution, by continuously inputting SK clock, the above address data is read sequentially. And, during the auto increment, keep CS at high. 2) Write cycle (WRITE) ～ ～ ～ ～ ～ ～ tCS CS ～ ～ SK 1 2 STATUS ～ ～ ～ ～ Am: MSB of address Dx: MSB of data n: required clocks n 4 ～ ～ ～ ～ ～ ～ DI 1 0 1 A1 Am A0 Dx Dx-1 D1 D0 ～ ～ ～ ～ ～ ～ tSV BUSY READY ～ ～ DO High-Z For the meaning of Am,Dx,n, please see tables of command mode in Page15. tE/W Figure 36. Write cycle ○In this command, input 16bit data are written to designated addresses (Am~A0). The actual write starts by the fall of CS of D0 taken SK clock. When STATUS is not detected (CS=low fixed),make sure Max 5ms time is in comforming with tE/W. When STATUS is detected (CS=high), all commands are not accepted for areas where low (BUSY) is output from DO, therefore, do not input any command. 3) Write all cycyle (WRAL) ～ ～ ～ ～ ～ ～ tCS CS ～ ～ SK 1 2 STATUS ～ ～ ～ ～ n 5 ～ ～ ～ ～ ～ ～ DI 1 0 0 0 Dx 1 DO Dx-1 D1 ～ ～ ～ ～ ～ ～ ～ ～ High-Z For the meaning of Dx,n,please see tables of command mode in Page15. Dx: MSB of data n: required clocks D0 ～ ～ tSV BUSY READY ～ ～ tE/W Figure 37. Write all cycle ○In this command, input 16bit data is written simultaneously to all adresses. Data is not written continuously per one word but is written in bulk, the write time is only Max. 5ms in conformity with t E/W. In WRAL, STATUS can be detected in the same manner as in WRITE command. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 16/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A 4) Write enable (WEN) / disable (WDS) cycle ～ ～ CS SK 1 2 3 4 5 6 7 n: required clocks n 8 ～ ～ ENABLE=1 1 DISABLE=0 0 ～ ～ DI 1 0 0 ～ ～ DO High-Z For the meaning of n,please see tables of command mode in Page15. Figure 38. Write enable (WEN) / disable (WDS) cycle ○At power on, this IC is in write disable status by the internal RESET circuit. Before executing the write command, it is necessary to execute the write enable command. And, once this command is executed, it is valid unitl the write disable command is executed or the power is turned off. However, the read command is valid irrespective of write enable / diable command. Input to SK after 6 clocks of this command is available by either “1” or “0”, but be sure to input it. ○When the write enable command is executed after power on, write enable status gets in. When the write disable command is executed then, the IC gets in write disable status as same as at power on, and then the write command is canceled thereafter in software manner. However, the read command is executable. In write enable status, even when the write command is input by mistake, write is started. To prevent such a mistake, it is recommended to execute the write disable command after completion of write. 5) Erase cycle (ERASE) ～ ～ ～ ～ tCS CS STATUS ～ ～ ～ ～ ～ ～ SK 1 n 4 2 ～ ～ ～ ～ ～ ～ ～ ～ DI 1 1 1 A3 Am A2 A1 A0 ～ ～ DO Am: MSB of address n: required clocks ～ ～ ～ ～ tSV ～ ～ BUSY READY ～ ～ High-Z ～ ～ tE/W For the meaning of Am,n,please see tables of command mode in Page15. Figure 39. Erase cycle ○In this command, data of the designated address is made into “1”. The data of the designated address becomes “FFFFh”. Actual ERASE starts at the fall of CS after the fall of A0 taken SK clock. In ERASE, STATUS can be detected in the same manner as in WRITE command. 6) Erase all cycle (ERAL) ～ ～ ～ ～ tCS CS STATUS ～ ～ SK 1 DI DO 1 0 0 1 ～ ～ ～ ～ ～ ～ ～ ～ tSV ～ ～ n 4 2 ～ ～ ～ ～ 0 BUSY READY ～ ～ High-Z n: required clocks ～ ～ tE/W For the meaning of n,please see tables of command mode in Page15. Figure 40. Erase all cycle ○In this command, data of all addresses is made into “1”. Data of all addresses becomes ”FFFFh”. Actual ERASE starts at the fall of CS after the falll of the n-th clock from the start bit input. In ERAL, STATUS can be detected in the same manner as in WRAL command. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 17/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Application 1)Method to cancel each command ○READ Start bit 1bit Address *1 Ope code Data *1 2bit m+1bit Cancel is available in all areas in read mode. *1 For the meaning of m,x, please see tables of command mode in Page15 x+1bit ・Method to cancel：cancel by CS=low Figure 41. READ cancel available timing ○WRITE,WRAL Clock rise of D0 taken n-1 SK n n+2 D0 A1 DI n+1 a D1 c b Enlarged figure Start bit 1bit Ope code Address *1 Data 2bit m+1bit x+1bit a tE/W *1 For the meaning of m,n,x, please see tables of command mode in Page15 c b a：From start bit to the clock rise of D0 taken Cancel by CS=low b：The clock rise of D0 taken and after Cancellation is not available by any means. c：n+1 clock rise and after Cancel by CS=low However, when write is started in b area (CS is ended), cancellation is not available by any means. And when SK clock is output continuously cancel function is not available. Note 1) If VCC is made OFF in this area, designated address data is not guaranteed, therefore write once again is suggested. Note 2) If CS is started at the same timing as that of the SK rise, write execution/cancel becomes unstable, therefore, it is recommended to fall in SK=low area. As for SK rise, recommend timing of tCSS/tCSH or higher. Figure 42. WRITE, WRAL cancel available timing ○ERASE, ERAL Clock rise of A0 taken n-1 SK DI n n+1 A1 A0 a b n+2 c Enlarged figure Start bit 1bit Ope code 2bit Address *1 tE/W *1 For the meaning of m,n,please see tables of command mode in Page15 m+1bit a a：From start bit to clock rise of A0 taken Cancel by CS=low b c b：Clock rise of A0 taken Cancellation is not available by any means. c：n+1 clock rise and after Cancel by CS=low However, when write is started in b area (CS is ended), cancellation is not available by any means. And when SK clock is output continuously cancel function is not available. Note 1) If VCC is made OFF in this area, designated address data is not guaranteed, therefore write once again is suggested. Note 2) If CS is started at the same timing as that of the SK rise, write execution/cancel becomes unstable, therefore, it is recommended to fall in SK=low area. As for SK rise, recommend timing of tCSS/tCSH or higher. Figure 43. ERASE, ERAL cancel available timing www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 18/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A 2) At standby When CS is low , even if SK,DI,DO are low, high or with middle electric potential, current does not over ISB1 Max. 3) I/O peripheral circuit 3-1) Pull down CS. By making CS=low at power ON/OFF, mistake in operation and mistake write are prevented. ○Pull down resistance Rcs of CS pin To prevent mistake in operation and mistake write at power ON/OFF, CS pull down resistance is necessary. Select an appropriate value to this resistance value from microcontroller VOH, IOH, and VIL characteristics of this IC. VOHM Rcs ≧ IOHM VOHM ≧ VIHE Microcontroller EEPROM VOHM high output Rcs ・・・② Example) When VCC =5V, VIHE=2V, VOHM=2.4V, IOHM=2mA, from the equation ①, VIHE IOHM ・・・① Rcs ≧ 2.4 2×10-3 Rcs ≧ 1.2 [kΩ] low input ∴ With the value of Rpd to satisfy the above equation, VOHM becomes 2.4V or higher, and VIHE (=2.0V), the equation ② is also satisfied. Figure 44. CS pull down resistance ・VIHE ・VOHM ・IOHM : EEPROM VIH specifications : Microcontroller VOH specifications : Microcontroller IOH specifications 3-2) DO is available in both pull up and pull down. Do output always is High-Z except in READY / BUSY STATUS and data output in read command. Malfunction may occur when High-Z is input to the microcontroller port connected to DO, it is necessary to pull down and pull up DO. When there is no influence upon the microcontroller operations, DO may be OPEN. If DO is OPEN, and at timing to output STATUS READY, at timing of CS=high, SK=high, DI=high, EEPROM recognizes this as a start bit, resets READY output, and DO=High-Z, therefore, READY signal cannot be detected. To avoid such output, pull up DO pin for improvement. CS CS high SK SK Enlarged DI D0 DI High-Z READY DO DO BUSY BUSY High-Z CS=SK=DI=high When DO=OPEN Improvement by DO pull up DO BUSY READY CS=SK=DI=high When DO=pull up Figure 45. READY output timing at DO=OPEN www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 19/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ○Pull up resistance Rpu and pull down resistance Rpd of DO pin As for pull up and pull down resistance value, select an appropriate value to this resistance value from microcontroller VIH, VIL, and VOH, IOH, VOL, IOL characteristics of this IC. Rpu ≧ Microcontroller VILM EEPROM Rpu VOLE ≦ IOLE VILM ・・・③ ・・・④ Example) When VCC =5V, VOLE=0.4V, IOLE=2.1mA, VILM=0.8V, from the equation ③, VOLE low input 5－0.4 2.1×10-3 Rpu ≧ 2.2 [kΩ] Rpu ≧ low output ∴ With the value of Rpu to satisfy the above equation, V OLE becomes 0.4V or below, and with VILM(=0.8V), the equation ④ is also satisfied. Figure 46. DO pull up resistance ・VOLE ・IOLE ・VILM : EEPROM VOL specifications : EEPROM IOL specifications : Microcontroller VIL specifications EEPROM Microcontroller VOHE IOHE Rpd ≧ VIHM high input VCC－VOLE IOLE VOHE ≧ VOHE Rpd IOHE ・・・⑤ VIHM ・・・⑥ Example) When VCC =5V, VOHE=VCC－0.2V, IOHE=0.1mA, VIHM=VCC×0.7V from the equation ⑤, high output ∴ Figure 47. DO pull down resistance Rpd ≧ 5－0.2 0.1×10-3 Rpd ≧ 48 [kΩ] With the value of Rpd to satisfy the above equation, V OHE becomes 2.4V or below, and with VIHM (=3.5V), the equation ⑥ is also satisfied. ・VOHE ・IOHE ・VIHM : EEPROM VOH specifications : EEPROM IOH specifications : Microcontroller VIH specifications ○READY / BUSY STATUS display (DO terminal) This display outputs the internal STATUS signal. When CS is started after t CS from CS fall after write command input, high or low is output. R/B display＝low (BUSY) = write under execution After the timer circuit in the IC works and creates the period of t E/W, this timer circuit completes automatically. And the memory cell is written in the period of tE/W, and during this period, other command is not accepted. （DO STATUS） R/B display = high (READY) = command wait STATUS After tE/W (max.5ms) the following command is accepted. Therefore, CS=high in the period of tE/W, and If signals are input in SK, DI, malfunction may occur, therefore, DI=low in the area CS=high. (Especially, in the case of shared input port, attention is required.) （DO STATUS） *Do not input any command while STATUS signal is output. Command input in BUSY area is cancelled, but command input in READY area is accepted. Therefore, STATUS READY output is cancelled, and malfunction and mistake write may occur. CS STATUS SK CLOCK DI DO WRITE INSTRUCTION High-Z tSV READY BUSY tE/W Figure 48. READY/BUSY STATUS output timing chart www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 20/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A 4) When to directly connect DI and DO This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart, meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1 control line. Microcontroller EEPROM DI/O PORT DI R DO Figure 49. DI, DO control line common connection ○Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input of EEPROM. Drive from the microcontroller DI/O output to DI input of EEPROM on I/O timing, and output signal from DO output of EEPROM occur at the same time in the following points. 4-1) 1 clock cycle to take in A0 address data at read command Dummy bit “0” is output to DO terminal. →When address data A0 = “1” input, through current route occurs. EEPROM CS input high *1 X=15,for the meaning of x , please see tables of command mode in Page15. EEPROM SK input A1 EEPROM DI input A0 Collision of DI input and DO output EEPROM DO output 0 High-Z Microcontroller DI/O port A1 Dx Dx-1 Dx-2 *1 A0 Microcontroller output High-Z Microcontroller input Figure 50. Collision timing at read data output at DI, DO direct connection 4-2) Timing of CS = high after write command. DO terminal in READY / BUSY function output. When the next start bit input is recognized, High-Z gets in. →Especially, at command input after write, when CS input is started with microcontroller DI/O output low, READY output high is output from DO terminal, and through current route occurs. Feedback input at timing of these (4-1) and (4-2) does not cause disorder in basic operations, if resistance R is inserted. ～ ～ EEPROM CS input Write command ～ ～ ～ ～ EEPROM SK input Write command ～ ～ ～ ～ EEPROM DI input Write command EEPROM DO output Write command ～ ～ Microcontroller DI/O port Write command BUSY READY BUSY High-Z Collision of DI input and DO output READY ～ ～ ～ ～ Microcontroller output READY ～ ～ ～ ～ Microcontroller input Microcontroller output Figure 51. Collision timing at DI, DO direct connection Note) As for the case (4-2), attention must be paid to the following. When STATUS READY is output, DO and DI are shared, DI=high and the microcontroller DI/O=High-Z or the microcontroller DI/O=high,if SK clock is input, DO output is input to DI and is recognized as a start bit, and malfunction may occur. As a method to avoid malfunction, at STATUS READY output, set SK=low, or start CS within 4 clocks after high of READY signal is output. Start bit CS Because DI=high, set SK=low at CS rise. SK DI READY DO Figure.52 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 High-Z Start bit input timing at DI, DO direct connection 21/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ○Selection of resistance value R The resistance R becomes through current limit resistance at data collision. When through current flows, noises of power source line and instantaneous stop of power source may occur. When allowable through current is defined as I, the following relation should be satisfied. Determine allowable current amount in consideration of impedance and so forth of power source line in set. And insert resistance R, and set the value R to satisfy EEPROM input level V IH/VIL even under influence of voltage decline owing to leak current and so forth. Insertion of R will not cause any influence upon basic operations. 4-3) Address data A0 = “1” input, dummy bit “0” output timing (When microcontroller DI/O output is high, EEPROM DO outputs low, and high is input to DI) ・Make the through current to EEPROM 10mA or below. ・See to it that the level VIH of EEPROM should satisfy the following. Conditions Microcontroller EEPROM DI/O PORT VIHE ≦ IOHM×R + VOLE At this moment, if VOLE=0V, DI VOHM high output IOHM R ∴ DO ・VIHE ・VOLE ・IOHM VOLE low output VIHE ≦ IOHM×R VIHE R ≧ IOHM ・・・⑦ : EEPROM VIH specifications : EEPROM VOL specifications : Microcontroller IOH specifications Figure 53. Circuit at DI, DO direct connection (Microcontroller DI/O high output, EEPROM low output) 4-4) DO STATUS READY output timing (When the microcontroller DI/O is low, EEPROM DO output high, and low is input to DI) ・Set the EEPROM input level VIL so as to satisfy the following. Conditions Microcontroller low output EEPROM DI/O PORT VILE ≧ VOHE – IOLM×R DI As this moment, VOHE=VCC VOLM VILE ≧ VCC – IOLM×R IOLM R VOHE R ≧ ∴ DO ・VILE ・VOHE ・IOLM high output VCC – VILE IOLM ・・・⑧ : EEPROM VIL specifications : EEPROM VOH specifications : Microcontroller IOL specifications Example) When VCC=5V, VOHM=5V, IOHM=0.4mA, VOLM=5V, IOLM=0.4mA, From the equation ⑦, R ≧ R ≧ ∴ R ≧ From the equation⑧, VIHE R ≧ IOHM 3.5 R ≧ 0.4×10-3 8.75 [kΩ] ・・・⑨ ∴ R ≧ VCC – VILE IOLM 5 – 1.5 2.1×10-3 1.67 [kΩ] ・・・⑩ Therefore, from the equations ⑨ and ⑩, ∴ R ≧ 8.75 [kΩ] Figure 54. Circuit at DI, DO direct connection (Microcontroller DI/O low output, EEPROM high output) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 22/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A 5) I/O equivalence circuit Output circuit Input citcuit RESET int. DO CSint. CS OEint. Figure 56. Input circuit (CS) Figure 55. Output circuit (DO) Input circuit Input circuit CS int. CS int. SK DI Figure 57. Input circuit (DI) Figure 58. Input circuit (SK) 6)Power-Up/Down conditions ○At power ON/OFF, set CS low. When CS is high, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may cause malfunction, mistake write or so. To prevent these, at power ON, set CS low. (When CS is in low status all inputs are cancelled.) And at power decline, owing to power line capacity and so forth, low power status may continue long. At this case too, owing to the same reason, malfunction, mistake write may occur, therefore, at power OFF too, set CS low. VCC VCC GND VCC CS GND Bad example Good example Figure 59. Timing at power ON/OFF （Bad example）CS pin is pulled up to VCC （Good example）It is low at power ON/OFF. In this case, CS becomes high (active status), and EEPROM may have malfunction, mistake write owing to noise and the likes. Even when CS input is High-Z, the status becomes like this case, which please note. Set 10ms or higher to recharge at power OFF. When power is turned on without observing this condition, IC internal circuit may not be reset, which please note. ○POR citcuit This IC has a POR (Power On Reset) circuit as a mistake write countermeasure. After POR operation, it gets in write disable status. The POR circuit is valid only when power is ON, and does not work when power is OFF. However, if CS is high at power ON/OFF, it may become write enable status owing to noises and the likes. For secure operations, observe the follwing conditions. 1. Set CS=low 2. Turn on power so as to satisfy the recommended conditions of t R, tOFF, Vbot for POR circuit operation. Recommended conditions of tR, tOFF, Vbot tR VCC tOFF Vbot 0 Figure 60. tR tOFF Vbot 10ms or below 10ms or higher 0.3V or below 100ms or below 10ms or higher 0.2V or below Rise waveform diagram ○LVCC circuit LVCC (VCC-Lockout) circuit prevents data rewrite operation at low power, and prevents wrong write. At LVCC voltage (Typ.=1.2V) or below, it prevent data rewrite www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 23/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A 7)Noise countermeasures ○VCC noise (bypass capacitor) When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is recommended to attach a by pass capacitor (0.1μF) between IC VCC and GND, At that moment, attach it as close to IC as possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND. ○SK noise When the rise time of SK is long, and a certain degree or more of noise exists, malfunction may occur owing to clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SK input. The hysteresis width of this circuit is set about 0.2V, if noises exist at SK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise time of SK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise countermeasures. Make the clock rise, fall time as small as possible. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 24/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Operational Notes (1) Described numeric values and data are design representative values, and the values are not guaranteed. (2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin in consideration of static characteristics and transition characteristics and fluctuations of external parts and our LSI. (3) Absolute Maximum Ratings If the absolute maximum ratings such as supply voltage and operating temperature range and so forth are exceeded, LSI may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum ratings should not be impressed to LSI. (4) GND electric potential Set the voltage of GND terminal lowest at any operating condition. Make sure that each terminal voltage is not lower than that of GND terminal in consideration of transition status. (5) Heat design In consideration of allowable loss in actual use condition, carry out heat design with sufficient margin. (6) Terminal to terminal short circuit and wrong packaging When to package LSI onto a board, pay sufficient attention to LSI direction and displacement. Wrong packaging may destruct LSI. And in the case of pin short between LSI terminals and terminals, terminals and power source, terminals and GND owing to unconnect use, LSI may be destructed. (7) Using this LSI in a strong electromagnetic field may cause malfunction, therefore, evaluate the www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 25/36 design sufficiently. TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Part numbering B R 9 3 G 8 6 x x x － 3 x x x x x BUS type 93：MicroWire Operating temperature / Operating Voltage -40℃ to +85℃/ 1.7V to 5.5V Capacity 86=16K Package Blank :DIP-T8 F FJ :SOP8 :SOP-J8 FV :SSOP-B8 FVT FVJ FVM NUX :TSSOP-B8 :TSSOP-B8J :MSOP8 :VSON008X2030 Process code Pin assignment Blank: Pin1~8: CS, SK, DI, DO, GND, ORG, DU, VCC respectively A : Pin1~8: CS, SK, DI, DO, GND, NC, DU, VCC respectively B : Pin1~8: DU, VCC, CS, SK, DI, DO, GND, NC respectively G : Halogen free Blank: Not Halogen free As an exception, VSON008X2030 package will be Halogen free with “Blank” T : 100% Sn Blank: 100% Sn Packaging and forming specification E2 : Embossed tape and reel (SOP8,SOP-J8, SSOP-B8,TSSOP-B8, TSSOP-B8J) TR : Embossed tape and reel (MSOP8, VSON008X2030) Blank : Tube (DIP-T8) Package Orderable Part Number Type Remark Quantity BR93G86 -3A DIP-T8 Tube of 2000 Not Halogen free 100% Sn BR93G86F -3AGTE2 SOP8 Reel of 2500 Halogen free 100% Sn BR93G86FJ -3AGTE2 SOP-J8 Reel of 2500 Halogen free 100% Sn BR93G86FV -3AGTE2 SSOP-B8 Reel of 2500 Halogen free 100% Sn BR93G86FVT -3AGE2 TSSOP-B8 Reel of 3000 Halogen free 100% Sn BR93G86FVJ -3AGTE2 TSSOP-B8J Reel of 2500 Halogen free 100% Sn BR93G86FVM -3AGTTR MSOP8 Reel of 3000 Halogen free 100% Sn BR93G86NUX -3ATTR VSON008X2030 Reel of 4000 Halogen free 100% Sn www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 26/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Physical Dimensions Tape and Reel information Package Name www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 DIP-T8 27/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A Package Name SOP8 (Max 5.35 (include.BURR)) (UNIT : mm) PKG : SOP8 Drawing No. : EX112-5001-1 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 28/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A Package Name www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 SOP-J8 29/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A Package Name www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 SSOP-B8 30/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A Package Name www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 TSSOP-B8 31/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A Package Name www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 TSSOP-B8J 32/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A Package Name www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 MSOP8 33/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A Package Name www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 VSON008X2030 34/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Marking Diagrams SOP8(TOP VIEW) DIP-T8 (TOP VIEW) Part Number Marking Part Number Marking 9 G 8 6 A BR93G86A LOT Number LOT Number 1PIN MARK SOP-J8(TOP VIEW) SSOP-B8(TOP VIEW) Part Number Marking Part Number Marking 9 GEA 9 G 8 6 A LOT Number LOT Number 1PIN MARK 1PIN MARK 9 G8 6A TSSOP-B8(TOP VIEW) TSSOP-B8J(TOP VIEW) Part Number Marking Part Number Marking (A0, A1, A2, SCL, WP) LOT Number 9 G 8 6 A 3 1PIN MARK 1PIN MARK MSOP8(TOP VIEW) VSON008X2030 (TOP VIEW) Part Number Marking Part Number Marking 9 G E A G 3 LOT Number 9 G 8 LOT Number LOT Number 66 A 33 1PIN MARK 1PIN MARK www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 35/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 BR93G86-3A ●Revision History Date Revision 21.Jan.2013 001 New Release 002 P.1 Change format of package line-up table. P.2 Change Remark of Power Dissipasion. P.26 Add the list of Part Numbering. P.27 Correct wrong size of Physical Dimensions. Wrong : The body thickness is 3.4±0.3 Correct : The leugth from high side of the body to the stopper of terminal is 3.4±0.3 P.28-34 Change the format of Physical Dimensions. 21.Dec.2015 Changes www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 36/36 TSZ02201-09190G100110-1-2 21.DEC.2015 REV.002 Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you (Note 1) intend to use our Products in devices requiring extremely high reliability (such as medical equipment , transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice-PGA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice-PGA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Datasheet General Precaution 1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents. ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s representative. 3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. Notice – WE © 2015 ROHM Co., Ltd. All rights reserved. Rev.001 Datasheet BR93G86-3A - Web Page Buy Distribution Inventory Part Number Package Unit Quantity Minimum Package Quantity Packing Type Constitution Materials List RoHS BR93G86-3A DIP-T8 2000 50 Tube inquiry Yes