TI1 LM193FKB Dual differential comparator Datasheet

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LM193-MIL
SLIS183 – JUNE 2017
LM193-MIL Dual Differential Comparators
1 Features
3 Description
•
•
The device consist of two independent voltage
comparators that are designed to operate from a
single power supply over a wide range of voltages.
Operation from dual supplies also is possible as long
as the difference between the two supplies is 2 V to
36 V, and VCC is at least 1.5 V more positive than the
input common-mode voltage. Current drain is
independent of the supply voltage. The outputs can
be connected to other open-collector outputs to
achieve wired-AND relationships.
1
•
•
•
•
•
•
•
•
•
Single-Supply or Dual Supplies
Wide Range of Supply Voltage
– Maximum Rating: 2 V to 36 V
– Tested to 30 V: Non-V Devices
– Tested to 32 V: V-Suffix Devices
Low Supply-Current Drain Independent of Supply
Voltage: 0.4 mA (Typical) Per Comparator
Low Input Bias Current: 25 nA (Typical)
Low Input Offset Current: 3 nA (Typical) (LM193)
Low Input Offset Voltage: 2 mV (Typical)
Common-Mode Input Voltage Range
Includes Ground
Differential Input Voltage Range Equal to
Maximum-Rated Supply Voltage: ±36 V
Low Output Saturation Voltage
Output Compatible With TTL, MOS, and CMOS
On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise
Noted. On All Other Products, Production
Processing Does Not Necessarily Include Testing
of All Parameters.
The LM193-MIL device is characterized for operation
from −55°C to +125°C.
Device Information(1)
PART NUMBER
LM193-MIL
PACKAGE
BODY SIZE (NOM)
SOIC (8)
4.90 mm x 6.00 mm
CDIP (8)
10.00 mm x 7.00 mm
LCCC (20)
9.00 mm x 9.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
•
Chemical or Gas Sensor
Desktop PC
Motor Control: AC Induction
Weigh Scale
Simplified Schematic
IN+
IN-
OUT
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM193-MIL
SLIS183 – JUNE 2017
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
7.4 Device Functional Modes.......................................... 7
8
Application and Implementation .......................... 8
8.1 Application Information.............................................. 8
8.2 Typical Application ................................................... 8
9 Power Supply Recommendations...................... 10
10 Layout................................................................... 10
10.1 Layout Guidelines ................................................. 10
10.2 Layout Example .................................................... 10
11 Device and Documentation Support ................. 11
11.1
11.2
11.3
11.4
11.5
11.6
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
7.3 Feature Description................................................... 7
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
11
11
11
11
11
11
12 Mechanical, Packaging, and Orderable
Information ........................................................... 11
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
2
DATE
REVISION
NOTES
June 2017
*
Initial release.
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5 Pin Configuration and Functions
D, JG
8-Pin SOIC, CDIP
Top View
8
2
7
3
6
4
5
NC
1OUT
NC
VCC
NC
1
VCC
2OUT
2IN−
2IN+
3 2
NC
1IN−
NC
1IN+
NC
4
1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
NC
2OUT
NC
2IN−
NC
NC
GND
NC
2IN+
NC
1OUT
1IN−
1IN+
GND
FK Package
20-Pin LCCC
Top View
NC – No internal connection
Pin Functions
PIN
I/O
DESCRIPTION
NAME
SOIC, CDIP
LCCC
1OUT
1
2
Output
1IN–
2
5
Input
Negative input pin of comparator 1
1IN+
3
7
Input
Positive input pin of comparator 1
GND
4
10
—
2IN+
5
12
Input
Positive input pin of comparator 2
2IN-
6
15
Input
Negative input pin of comparator 2
2OUT
7
17
Output
VCC
8
20
—
Output pin of comparator 1
Ground
Output pin of comparator 2
Supply Pin
1
3
4
6
8
NC
—
9
11
N/A
No Connect (No Internal Connection)
13
14
16
18
19
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
36
V
±36
V
Supply voltage (2)
VCC
(3)
VID
Differential input voltage
VI
Input voltage (either input)
IIK
–0.3
36
V
Input current (4)
-50
mA
VO
Output voltage
36
V
IO
Output current
20
mA
Duration of output short circuit to ground (5)
TJ
Unlimited
Operating virtual-junction temperature
150
°C
FK package
260
°C
Lead temperature 1.6 mm (1/16 in) from case for 60 s JG package
300
°C
150
°C
Case temperature for 60 s
Tstg
(1)
(2)
(3)
(4)
(5)
Storage temperature
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to network ground.
Differential voltages are at IN+ with respect to IN–.
Input current flows thorough parasitic diode to ground and will turn on parasitic transistors that will increase ICC and may cause output
to be incorrect. Normal operation resumes when input current is removed.
Short circuits from outputs to VCC can cause excessive heating and eventual destruction.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±750
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage
TA
Operating temperature
non-V devices
V devices
MIN
MAX
2
30
UNIT
V
2
32
V
LM193
–55
125
°C
LM293, LM293A
–25
85
°C
LM393, LM393A
0
70
°C
–40
125
°C
LM2903, LM2903V,
LM2903AV
6.4 Thermal Information
LM193-MIL
THERMAL METRIC (1)
RθJC(top)
(1)
4
Junction-to-case (top) thermal resistance
JG (CDIP)
FK (LCCC)
8 PINS
20 PINS
14.5
5.61
UNIT
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at specified free-air temperature, VCC = 5 V (unless otherwise noted)
PARAMETER
VIO
Input offset voltage
VCC = 5 V to 30 V,
VIC = VICR min,
VO = 1.4 V
IIO
Input offset current
VO = 1.4 V
IIB
Input bias current
VO = 1.4 V
Common-mode input-voltage range
MIN
25°C
Large-signal differential-voltage
amplification
IOH
High-level output current
25°C
3
25°C
VOH = 5 V
VID = 1 V
25°C
VOH = 30 V
VID = 1 V
Full range
–25
IOL = 4 mA,
VID = –1 V
IOL
Low-level output current
VOL = 1.5 V,
VID = –1 V
25°C
VCC = 5 V
25°C
VCC = 30 V
Full range
(1)
(2)
mV
25
nA
–100
nA
–300
0 to
VCC – 1.5
V
0 to
VCC – 2
50
200
V/mV
0.1
nA
1
25°C
Low-level output voltage
UNIT
100
25°C
VCC = 15 V,
VO = 1.4 V to 11.4 V,
RL ≥ 15 kΩ to VCC
RL = ∞
5
Full range
(2)
Supply current
2
Full range
VOL
ICC
MAX
9
Full range
AVD
TYP
Full range
25°C
VICR
LM193-MIL
TA (1)
TEST CONDITIONS
150
Full range
400
700
6
µA
mV
mA
0.8
1
2.5
mA
Full range (minimum or maximum) for LM193-MIL is –55°C to 125°C. All characteristics are measured with zero common-mode input
voltage, unless otherwise specified.
The voltage at either input should not be allowed to go negative by more than 0.3 V otherwise output may be incorrect and excessive
input current can flow. The upper end of the common-mode voltage range is limited by VCC – 2 V. However only one input needs to be
in the valid common mode range, the other input can go up the maximum VCC level and the comparator provides a proper output state.
Either or both inputs can go to maximum VCC level without damage.
6.6 Switching Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Response time
(1)
(2)
TEST CONDITIONS
RL connected to 5 V through 5.1 kΩ,
CL = 15 pF (1) (2)
TYP
100-mV input step with 5-mV overdrive
1.3
TTL-level input step
0.3
UNIT
µs
CL includes probe and jig capacitance.
The response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.
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6.7 Typical Characteristics
80
1.8
1.6
IIN – Input Bias Current – nA
ICC – Supply Current – mA
70
TA = –55°C
1.4
TA = 25°C
TA = 0°C
1.2
1
TA = 70°C
0.8
TA = 125°C
0.6
0.4
TA = –55°C
60
TA = 0°C
50
TA = 25°C
40
TA = 70°C
30
TA = 125°C
20
10
0.2
0
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
VCC – Supply Voltage – V
VCC – Supply Voltage – V
Figure 1. Supply Current vs Supply Voltage
Figure 2. Input Bias Current vs Supply Voltage
6
10
Overdrive = 5 mV
VO – Output Voltage – V
VO – Saturation Voltage – V
5
1
TA = 125°C
TA = 25°C
0.1
TA = –55°C
0.01
4
Overdrive = 20 mV
3
Overdrive = 100 mV
2
1
0
0.001
0.01
0.1
1
10
-1
-0.3
100
0
0.25 0.5 0.75
IO – Output Sink Current – mA
1
1.25 1.5 1.75
2
2.25
t – Time – µs
Figure 4. Response Time for Various Overdrives
Negative Transition
Figure 3. Output Saturation Voltage
6
VO – Output Voltage – V
5
Overdrive = 5 mV
4
Overdrive = 20 mV
3
Overdrive = 100 mV
2
1
0
-1
-0.3
0
0.25 0.5 0.75
1
1.25 1.5 1.75
2
2.25
t – Time – µs
Figure 5. Response Time for Various Overdrives
Positive Transition
6
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7 Detailed Description
7.1 Overview
The dual comparator has the ability to operate up to absolute maximum of 36 V on the supply pin. This device
has proven ubiquity and versatility across a wide range of applications. This is due to very wide supply voltages
range (2 V to 36 V), low Iq and fast response of the device.
The open-drain output allows the user to configure the output's logic high voltage (VOH) and can be used to
enable the comparator to be used in AND functionality.
7.2 Functional Block Diagram
VCC
80-µA
Current Regulator
60 µA
10 µA
10 µA
80 µA
IN+
COMPONENT COUNT
OUT
Epi-FET
Diodes
Resistors
Transistors
1
2
2
30
IN−
GND
Copyright © 2017, Texas Instruments Incorporated
Figure 6. Schematic (Each Comparator)
7.3 Feature Description
The comparator consists of a PNP darlington pair input, allowing the device to operate with very high gain and
fast response with minimal input bias current. The input Darlington pair creates a limit on the input common
mode voltage capability, allowing the comparator to accurately function from ground to VCC– 1.5 V input. Allow
for VCC– 2 V at cold temperature.
The output consists of an open drain NPN (pull-down or low side) transistor. The output NPN will sink current
when the negative input voltage is higher than the positive input voltage and the offset voltage. The VOL is
resistive and will scale with the output current. See Figure 3 for VOL values with respect to the output current.
7.4 Device Functional Modes
7.4.1 Voltage Comparison
The device operates solely as a voltage comparator, comparing the differential voltage between the positive and
negative pins and outputting a logic low or high impedance (logic high with pullup) based on the input differential
polarity.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The device will typically be used to compare a single signal to a reference or two signals against each other.
Many users take advantage of the open drain output to drive the comparison logic output to a logic voltage level
to an MCU or logic device. The wide supply range and high voltage capability makes this comaprator optimal for
level shifting to a higher or lower voltage.
8.2 Typical Application
VLOGIC
VLOGIC
VSUP
VSUP
RPULLUP
VIN
RPULLUP
VIN+
+
½ LM2903
+
½ LM2903
VREF
CL
VIN-
CL
Copyright © 2017, Texas Instruments Incorporated
Figure 7. Single-Ended and Differential Comparator Configurations Using the LM2903
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER
Input Voltage Range
Supply Voltage
0 V to Vsup-2 V
4.5 V to VCC maximum
Logic Supply Voltage
Output Current (RPULLUP)
Input Overdrive Voltage
8
EXAMPLE VALUE
0 V to VCC maximum
1 µA to 4 mA
100 mV
Reference Voltage
2.5 V
Load Capacitance (CL)
15 pF
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8.2.2 Detailed Design Procedure
When using the device in a general comparator application, determine the following:
• Input Voltage Range
• Minimum Overdrive Voltage
• Output and Drive Current
• Response Time
8.2.2.1 Input Voltage Range
When choosing the input voltage range, the input common mode voltage range (VICR) must be taken in to
account. If temperature operation is below 25°C the VICR can range from 0 V to VCC– 2.0 V. This limits the input
voltage range to as high as VCC– 2.0 V and as low as 0 V. Operation outside of this range can yield incorrect
comparisons.
The following is a list of input voltage situation and their outcomes:
1. When both IN- and IN+ are both within the common-mode range:
(a) If IN- is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking
current
(b) If IN- is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is
not conducting
2. When IN- is higher than common-mode and IN+ is within common-mode, the output is low and the output
transistor is sinking current
3. When IN+ is higher than common-mode and IN- is within common-mode, the output is high impedance and
the output transistor is not conducting
4. When IN- and IN+ are both higher than common-mode, the output is low and the output transistor is sinking
current
8.2.2.2 Minimum Overdrive Voltage
Overdrive Voltage is the differential voltage produced between the positive and negative inputs of the comparator
over the offset voltage (VIO). To make an accurate comparison the Overdrive Voltage (VOD) should be higher
than the input offset voltage (VIO). Overdrive voltage can also determine the response time of the comparator,
with the response time decreasing with increasing overdrive. Figure 8 and Figure 9 show positive and negative
response times with respect to overdrive voltage.
8.2.2.3 Output and Drive Current
Output current is determined by the load/pull-up resistance and logic/pullup voltage. The output current will
produce a output low voltage (VOL) from the comparator. In which VOL is proportional to the output current. Use
Typical Characteristics to determine VOL based on the output current.
The output current can also effect the transient response. See Response Time for more information.
8.2.2.4 Response Time
Response time is a function of input over drive. See Application Curves for typical response times. The rise and
falls times can be determined by the load capacitance (CL), load/pullup resistance (RPULLUP) and equivalent
collector-emitter resistance (RCE).
•
•
The rise time (τR) is approximately τR ~ RPULLUP × CL
The fall time (τF) is approximately τF ~ RCE × CL
– RCE can be determine by taking the slope of Typical Characteristics in its linear region at the desired
temperature, or by dividing the VOL by Iout
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8.2.3 Application Curves
6
6
5
5
Output Voltage (Vo)
Output Voltage, Vo(V)
The following curves were generated with 5 V on VCC and VLogic, RPULLUP = 5.1 kΩ, and 50 pF scope probe.
4
3
2
5mV OD
1
20mV OD
0
4
3
2
5mV OD
1
20mV OD
0
100mV OD
±1
-0.25
0.25
0.75
1.25
1.75
2.25
Time (usec)
100mV OD
±1
±0.25 0.00
0.25
0.50
Figure 8. Response Time for Various Overdrives
(Positive Transition)
0.75
1.00
1.25
1.50
1.75
2.00
Time (usec)
C004
C006
Figure 9. Response Time for Various Overdrives
(Negative Transition)
9 Power Supply Recommendations
For fast response and comparison applications with noisy or AC inputs, TI recommends to use a bypass
capacitor on the supply pin to reject any variation on the supply voltage. This variation can eat into the input
common-mode range of the comparator and create an inaccurate comparison.
10 Layout
10.1 Layout Guidelines
For accurate comparator applications without hysteresis it is important maintain a stable power supply with
minimized noise and glitches. To achieve this, it is best to add a bypass capacitor between the supply voltage
and ground. This should be implemented on the positive power supply and negative supply (if available). If a
negative supply is not being used, do not put a capacitor between the device's GND pin and system ground.
Minimize coupling between outputs and inverting inputs to prevent output oscillations. Do not run output and
inverting input traces in parallel unless there is a VCC or GND trace between output and inverting input traces to
reduce coupling. When series resistance is added to inputs, place resistor close to the device.
10.2 Layout Example
Better
Ground
PF
Input Resistors
Close to device
1 1OUT
2 1IN-
VCC 8
2OUT 7
VCC
OK
VCC or GND
Ground
3 1IN+
2IN- 6
4 GND
2IN+ 5
Figure 10. LM2903 Layout Example Used as an Example
10
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11 Device and Documentation Support
11.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 2. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
LM193
Click here
Click here
Click here
Click here
Click here
LM293
Click here
Click here
Click here
Click here
Click here
LM293A
Click here
Click here
Click here
Click here
Click here
LM393
Click here
Click here
Click here
Click here
Click here
LM393A
Click here
Click here
Click here
Click here
Click here
LM2903
Click here
Click here
Click here
Click here
Click here
LM2903V
Click here
Click here
Click here
Click here
Click here
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
29-Jun-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-9452601Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629452601Q2A
LM193FKB
5962-9452601QPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9452601QPA
LM193
JM38510/11202BPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/11202BPA
LM193FKB
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629452601Q2A
LM193FKB
LM193JG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
LM193JG
LM193JGB
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9452601QPA
LM193
M38510/11202BPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/11202BPA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
29-Jun-2017
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
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