PD - 95041
IRFP254NPbF
HEXFET® Power MOSFET
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Advanced Process Technology
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Ease of Paralleling
Simple Drive Requirements
Lead-Free
D
VDSS = 250V
RDS(on) = 125mΩ
G
ID = 23A
S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the designer with an
extremely efficient and reliable device for use in a wide variety of applications.
The TO-247 package is preferred for commercial-industrial applications where
higher power levels preclude the use of TO-220 devices. The TO-247 is similar
but superior to the earlier TO-218 package because of its isolated mounting hole.
TO-247AC
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
Units
23
16
92
220
1.5
± 20
300
14
22
7.4
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
–––
0.24
–––
0.68
–––
40
°C/W
1
2/24/04
IRFP254NPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
∆V(BR)DSS/∆TJ
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min.
250
–––
–––
2.0
15
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.33
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
34
37
29
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
125
mΩ VGS = 10V, ID = 14A
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 14A
25
VDS = 250V, VGS = 0V
µA
250
VDS = 200V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
100
ID = 14A
17
nC
VDS = 200V
44
VGS = 10V, See Fig. 6 and 13
–––
VDD = 125V
–––
ID = 14A
ns
–––
RG = 3.6Ω
–––
VGS = 10V, See Fig. 10
D
Between lead,
5.0 –––
–––
6mm (0.25in.)
nH
G
from package
–––
13 –––
and center of die contact
S
––– 2040 –––
VGS = 0V
––– 260 –––
VDS = 25V
–––
62 –––
pF
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
23
––– –––
showing the
A
G
integral reverse
––– –––
92
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 14A, VGS = 0V
––– 210 310
ns
TJ = 25°C, IF = 14A
––– 1.7 2.6
µC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
ISD ≤ 14A, di/dt ≤ 460A/µs, VDD ≤ V(BR)DSS,
Starting TJ = 25°C, L = 3.1mH
Pulse width ≤ 400µs; duty cycle ≤ 2%.
max. junction temperature. (See fig. 11)
RG = 25Ω, IAS = 14A,VGS=10V
2
TJ ≤ 175°C
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IRFP254NPbF
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
4.5V
1
20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
1
10
10
4.5V
1
0.1
100
Fig 1. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
4.0
TJ = 175 ° C
10
TJ = 25 ° C
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
100
VGS , Gate-to-Source Voltage (V)
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
1
4.0
20µs PULSE WIDTH
TJ = 175 ° C
9.0
ID = 23A
3.0
2.0
1.0
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFP254NPbF
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
3000
Ciss
2000
Coss
1000
Crss
20
VGS , Gate-to-Source Voltage (V)
4000
0
1
10
100
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
20
1000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
100
TJ = 175° C
10
1
TJ = 25 ° C
V GS = 0 V
0.4
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
60
80
100
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
4
40
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
0.1
0.2
VDS = 200V
VDS = 125V
VDS = 50V
16
0
1000
ID = 14A
1.2
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
10
100µsec
1msec
1
0.1
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
1
10
100
1000
10000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFP254NPbF
25
VDS
VGS
ID , Drain Current (A)
20
D.U.T.
RG
15
RD
+
-VDD
V GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
5
VDS
90%
0
25
50
75
100
125
150
TC , Case Temperature ( ° C)
175
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
PDM
0.05
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
L
VDS
D.U.T
RG
VGS
20V
IAS
DRIVER
+
V
- DD
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS , Single Pulse Avalanche Energy (mJ)
IRFP254NPbF
600
TOP
500
BOTTOM
ID
5.6A
9.8A
14A
400
300
200
100
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
VGS
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFP254NPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For N-channel HEXFET® power MOSFETs
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7
IRFP254NPbF
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
-D-
3.65 (.143)
3.55 (.140)
15.90 (.626)
15.30 (.602)
-B-
-A-
0.25 (.010) M D B M
2.50 (.089)
1.50 (.059)
4
5.50 (.217)
20.30 (.800)
19.70 (.775)
2X
1
2
5.30 (.209)
4.70 (.185)
NOTES:
5.50 (.217)
4.50 (.177)
1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 CONFORMS TO JEDEC OUTLINE
TO-247-AC.
3
-C-
14.80 (.583)
14.20 (.559)
2.40 (.094)
2.00 (.079)
2X
5.45 (.215)
2X
4.30 (.170)
3.70 (.145)
0.80 (.031)
3X 0.40 (.016)
1.40 (.056)
3X 1.00 (.039)
0.25 (.010) M
2.60 (.102)
2.20 (.087)
C A S
3.40 (.133)
3.00 (.118)
LEAD ASSIGNMENTS
Hexfet
IGBT
1 -LEAD
GateASSIGNMENTS
1 - Gate
1
GATE
2 - Drain
2 - Collector
2 - DRAIN
3 - Source
3 - Emitter
3 - SOURCE
4 - Drain
4 - DRAIN4 - Collector
TO-247AC Part Marking Information
EXAMPLE: T HIS IS AN IRFPE30
WIT H ASSEMBLY
LOT CODE 5657
ASSEMBLED ON WW 35, 2000
IN THE AS SEMBLY LINE "H"
Note: "P" in assembly line
position indicates "Lead-Free"
INT ERNATIONAL
RECT IFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
IRFPE30
56
035H
57
DAT E CODE
YEAR 0 = 2000
WEEK 35
LINE H
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 02/04
8
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