MC74HCT4851A, MC74HCT4852A Analog Multiplexers/ Demultiplexers with Injection Current Effect Control with LSTTL Compatible Inputs http://onsemi.com MARKING DIAGRAMS Automotive Customized 16 This device is pin compatible to standard HC405x and MC1405xB analog mux/demux devices, but feature injection current effect control. This makes them especially suited for usage in automotive applications where voltages in excess of normal logic voltage are common. The injection current effect control allows signals at disabled analog input channels to exceed the supply voltage range without affecting the signal of the enabled analog channel. This eliminates the need for external diode/ resistor networks typically used to keep the analog channel signals within the supply voltage range. The devices utilize low power silicon gate CMOS technology. The Channel Select and Enable inputs are compatible with standard CMOS or LSTTL outputs. • Injection Current Cross−Coupling Less than 1mV/mA • • • 16 1 16 SOIC−16 WIDE DW SUFFIX CASE 751G 16 1 HCT485xA AWLYWWG 1 16 TSSOP−16 DT SUFFIX CASE 948F 1 (See Figure 6) Pin Compatible to HC405x and MC1405xB Devices Power Supply Range (VCC − GND) = 4.5 to 5.5 V In Compliance With the Requirements of JEDEC Standard No. 7 A Chip Complexity: 154 FETs or 36 Equivalent Gates NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant HCT485xAG AWLYWW 1 16 Features • • • SOIC−16 D SUFFIX CASE 751B HCT4 85xA ALYWG G 1 X A WL, L YY, Y WW, W G or G = 1 or 2 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. © Semiconductor Components Industries, LLC, 2013 April, 2013 − Rev. 6 1 Publication Order Number: MC74HCT4851A/D MC74HCT4851A, MC74HCT4852A FUNCTION TABLE − MC74HCT4851A Control Inputs 13 X0 14 X1 15 X2 ANALOG 12 MULTIPLEXER/ INPUTS/ X3 DEMULTIPLEXER OUTPUTS X4 1 5 X5 2 X6 4 X7 11 A CHANNEL 10 B SELECT 9 INPUTS C 6 ENABLE PIN 16 = VCC PIN 8 = GND 3 X Select B A Enable C L L L L L L L L H L L L L H H H H X L L H H L L H H X COMMON OUTPUT/ INPUT ON Channels L H L H L H L H X X0 X1 X2 X3 X4 X5 X6 X7 NONE VCC X2 X1 X0 X3 A B C 16 15 14 13 12 11 10 9 6 7 8 GND Figure 1. MC74HCT4851A Logic Diagram Single−Pole, 8−Position Plus Common Off 1 2 3 4 5 X4 X6 X X7 X5 Enable NC Figure 2. MC74HCT4851A 16−Lead Pinout (Top View) FUNCTION TABLE − MC74HCT4852A Control Inputs 12 ANALOG INPUTS/OUTPUTS CHANNEL‐SELECT INPUTS X0 14 X1 15 X2 11 X3 Y0 Y1 Y2 Y3 A B ENABLE X SWITCH 13 X COMMON OUTPUTS/INPUTS 1 5 2 Y SWITCH 3 B Select A L L L L H L L H H X L H L H X ON Channels Y0 Y1 Y2 Y3 X0 X1 X2 X3 NONE X = Don’t Care Y 4 10 9 Enable PIN 16 = VCC PIN 8 = GND VCC X2 X1 X X0 X3 A B 16 15 14 13 12 11 10 9 6 7 8 GND 6 Figure 3. MC74HCT4852A Logic Diagram Double−Pole, 4−Position Plus Common Off 1 2 3 4 5 Y0 Y2 Y Y3 Y1 Enable NC Figure 4. MC74HCT4852A 16−Lead Pinout (Top View) http://onsemi.com 2 MC74HCT4851A, MC74HCT4852A MAXIMUM RATINGS Symbol Value Unit VCC Positive DC Supply Voltage (Referenced to GND) –0.5 to + 7.0 V Vin DC Input Voltage (Any Pin) (Referenced to GND) –0.5 to VCC + 0.5 V $25 mA 500 450 mW I Parameter DC Current, Into or Out of Any Pin PD Power Dissipation in Still Air, SOIC Package† TSSOP Package† Tstg Storage Temperature Range TL Lead Temperature, 1 mm from Case for 10 Seconds SOIC or TSSOP Package –65 to + 150 °C °C 260 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC Positive DC Supply Voltage (Referenced to GND) 4.5 5.5 V Vin DC Input Voltage (Any Pin) (Referenced to GND) GND VCC V Static or Dynamic Voltage Across Switch 0.0 1.2 V TA Operating Temperature Range, All Package Types – 55 + 125 °C tr, tf Input Rise/Fall Time (Channel Select or Enable Inputs) 1000 500 400 ns VIO* VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 0 0 0 *For voltage drops across switch greater than 1.2 V (switch on), excessive VCC current may be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. DC CHARACTERISTICS — Digital Section (Voltages Referenced to GND) VEE = GND, Except Where Noted Symbol Parameter Condition VCC V Guaranteed Limit −55 to 25°C ≤85°C ≤125°C Unit VIH Minimum High−Level Input Voltage, Channel−Select or Enable Inputs Ron = Per Spec 4.5 to 5.5 2.0 2.0 2.0 V VIL Maximum Low−Level Input Voltage, Channel−Select or Enable Inputs Ron = Per Spec 4.5 to 5.5 0.8 0.8 0.8 V Iin Maximum Input Leakage Current on Digital Pins (Enable/A/B/C) Vin = VCC or GND 5.5 ± 0.1 ± 1.0 ± 1.0 mA ICC Maximum Quiescent Supply Current (per Package) Vin(digital) = VCC or GND Vin(analog) = GND 5.5 2.0 20 40 mA http://onsemi.com 3 MC74HCT4851A, MC74HCT4852A DC CHARACTERISTICS — Analog Section Guaranteed Limit Symbol Ron Parameter Condition VCC −55 to 25°C ≤85°C ≤125°C Unit Maximum “ON” Resistance Vin = VIL or VIH;VIS = VCC to GND; IS ≤ 2.0 mA 4.5 5.5 550 400 650 500 750 600 W Delta “ON” Resistance Vin = VIL or VIH; VIS = VCC/2 IS ≤ 2.0 mA 4.5 5.5 80 60 100 80 120 100 W Ioff Maximum Off−Channel Leakage Current, Any One Channel Common Channel Vin = VCC or GND 5.5 ±0.1 ±0.1 ±0.1 ±0.1 ±0.1 ±0.1 Ion Maximum On−Channel Leakage Vin = VCC or GND Channel−to−Channel 5.5 ±0.1 ±0.1 ±0.1 VCC −55 to 25°C ≤85°C ≤125°C Unit Maximum Propagation Delay, Analog Input to Analog Output 5.0 40 45 50 ns Maximum Propagation Delay, Enable or Channel−Select to Analog Output 5.0 80 90 100 ns 10 35 40 10 35 40 10 35 40 pF DRon mA mA AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns, VCC = 5.0 V ± 10%) Symbol tPHL, tPLH tPHL, tPHZ,PZH tPLH, tPLZ,PZL Parameter Cin Maximum Input Capacitance (All Switches Off) (All Switches Off) CPD Power Dissipation Capacitance Digital Pins Any Single Analog Pin Common Analog Pin Typical 5.0 20 pF INJECTION CURRENT COUPLING SPECIFICATIONS (VCC = 5V, TA = −55°C to +125°C) Symbol VDout Parameter Condition Maximum Shift of Output Voltage of Enabled Analog Channel Iin* ≤ 1 mA, RS ≤ 3,9 kW Iin* ≤ 10 mA, RS ≤ 3,9 kW Iin* ≤ 1 mA, RS ≤ 20 kW Iin* ≤ 10 mA, RS ≤ 20 kW * Iin = Total current injected into all disabled channels. Figure 5. Typical On Resistance VCC = 4.5V http://onsemi.com 4 Typ Max Unit 0.1 1.0 0.5 5.0 1.0 5.0 2.0 20 mV MC74HCT4851A, MC74HCT4852A External DC P.S. VCC = 5 V Vin2 / Iin2 meas. here. Current Source HP4155C Smu #2 Vin1 = 4.9 V (Smu3) Iin1 meas. Here Vm1 connected here. X7 RS X0 4 16 13 3 X Vout Vm2 connected here. 6 NOTES: Rs = 3.9 KW or 20 KW. NOTES: Vm1 & Vm2 are internal NOTES: HP4155C Voltmeters. 8 GND or VSS Figure 6. Injection Current Coupling Specification http://onsemi.com 5 MC74HCT4851A, MC74HCT4852A 5V 6V 5V VCC VCC HCT4051A Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 Channel 8 Sensor (8x Identical Circuitry) Microcontroller Common Out A/D - Input Figure 7. Actual Technology Requires 32 passive components and one extra 6V regulator to suppress injection current into a standard HCT4051 multiplexer 5V VCC VCC HCT4851A Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 Channel 8 Sensor (8x Identical Circuitry) Common Out Microcontroller A/D - Input Figure 8. MC74HCT4851A Solution Solution by applying the HCT4851A multiplexer http://onsemi.com 6 MC74HCT4851A, MC74HCT4852A PLOTTER VCC PROGRAMMABLE POWER SUPPLY MINI COMPUTER DC ANALYZER 16 VEE VCC OFF - + VCC VCC A COMMON O/I OFF NC DEVICE UNDER TEST ANALOG IN VIH COMMON OUT 6 8 GND Figure 10. Maximum Off Channel Leakage Current, Any One Channel, Test Set−Up Figure 9. On Resistance Test Set−Up VCC 16 VEE ANALOG I/O 16 A OFF VCC OFF VIH VCC VCC VCC ON VEE COMMON O/I VCC N/C ANALOG I/O VIL 6 COMMON O/I OFF 6 8 8 Figure 11. Maximum Off Channel Leakage Current, Common Channel, Test Set−Up Figure 12. Maximum On Channel Leakage Current, Channel to Channel, Test Set−Up VCC VCC CHANNEL SELECT (VI) VCC ON/OFF VM COMMON O/I ANALOG I/O OFF/ON GND tPLH ANALOG OUT 16 TEST POINT CL* tPHL 6 50% 8 CHANNEL SELECT VI = GND to 3.0 V VM = 1.3 V *Includes all probe and jig capacitance Figure 13. Propagation Delays, Channel Select to Analog Out Figure 14. Propagation Delay, Test Set−Up Channel Select to Analog Out http://onsemi.com 7 MC74HCT4851A, MC74HCT4852A VCC 16 VCC ANALOG IN (VI) COMMON O/I ANALOG I/O ON 50% TEST POINT CL* GND tPLH tPHL ANALOG OUT 6 8 50% VI = GND to 3.0 V VM = 1.3 V *Includes all probe and jig capacitance Figure 15. Propagation Delays, Analog In to Analog Out tf Figure 16. Propagation Delay, Test Set−Up Analog In to Analog Out tr 90% VM 10% ENABLE (VI) tPZL ANALOG OUT 2 GND tPLZ 16 HIGH IMPEDANCE 10% 1 10kW ANALOG I/O TEST POINT ON/OFF 2 CL* VOL tPHZ ENABLE VOH 90% ANALOG OUT VCC VCC 50% tPZH POSITION 1 WHEN TESTING tPHZ AND tPZH POSITION 2 WHEN TESTING tPLZ AND tPZL 1 VCC 50% 6 8 HIGH IMPEDANCE VI = GND to 3.0 V VM = 1.3 V Figure 17. Propagation Delays, Enable to Analog Out Figure 18. Propagation Delay, Test Set−Up Enable to Analog Out VCC A VCC 16 ON/OFF COMMON O/I NC ANALOG I/O OFF/ON VCC 6 8 11 CHANNEL SELECT Figure 19. Power Dissipation Capacitance, Test Set−Up http://onsemi.com 8 MC74HCT4851A, MC74HCT4852A Gate = VCC (Disabled) Disabled Analog Mux Input Vin > VCC + 0.7V P+ Common Analog Output Vout > VCC P+ + + + N - Substrate (on VCC potential) Figure 20. Diagram of Bipolar Coupling Mechanism Appears if Vin exceeds VCC, driving injection current into the substrate A B C ENABLE 11 10 9 6 Figure 21. Function Diagram, HCT4851A http://onsemi.com 9 INJECTION CURRENT CONTROL 13 INJECTION CURRENT CONTROL 14 INJECTION CURRENT CONTROL 15 INJECTION CURRENT CONTROL 12 INJECTION CURRENT CONTROL 1 INJECTION CURRENT CONTROL 5 INJECTION CURRENT CONTROL 2 INJECTION CURRENT CONTROL 4 INJECTION CURRENT CONTROL 3 X0 X1 X2 X3 X4 X5 X6 X7 X MC74HCT4851A, MC74HCT4852A A B ENABLE 10 9 6 Figure 22. Function Diagram, HCT4852A http://onsemi.com 10 INJECTION CURRENT CONTROL 13 INJECTION CURRENT CONTROL 14 INJECTION CURRENT CONTROL 15 INJECTION CURRENT CONTROL 12 INJECTION CURRENT CONTROL 13 INJECTION CURRENT CONTROL 1 INJECTION CURRENT CONTROL 5 INJECTION CURRENT CONTROL 2 INJECTION CURRENT CONTROL 4 INJECTION CURRENT CONTROL 3 X0 X1 X2 X3 X Y0 Y1 Y2 Y3 Y MC74HCT4851A, MC74HCT4852A ORDERING INFORMATION Package Shipping† MC74HCT4851ADG SOIC−16 (Pb−Free) 48 Units / Rail MC74HCT4851ADR2G SOIC−16 (Pb−Free) 2500 Units / Tape & Reel NLV74HCT4851ADR2G* SOIC−16 (Pb−Free) 2500 Units / Tape & Reel MC74HCT4851ADTG TSSOP−16 (Pb−Free) 48 Units / Rail M74HCT4851ADTR2G TSSOP−16 (Pb−Free) 2500 Units / Tape & Reel NLVHCT4851ADTR2G* TSSOP−16 (Pb−Free) 2500 Units / Tape & Reel M74HCT4851ADWR2G SOIC−16 WIDE (Pb−Free) 1000 Units / Tape & Reel MC74HCT4852ADG SOIC−16 (Pb−Free) 48 Units / Rail MC74HCT4852ADR2G SOIC−16 (Pb−Free) 2500 Units / Tape & Reel MC74HCT4852ADTG TSSOP−16 (Pb−Free) 48 Units / Rail M74HCT4852ADTR2G TSSOP−16 (Pb−Free) 2500 Units / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. http://onsemi.com 11 MC74HCT4851A, MC74HCT4852A PACKAGE DIMENSIONS SOIC−16 D SUFFIX CASE 751B−05 ISSUE K −A− 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 −B− 1 P 8 PL 0.25 (0.010) 8 M B S G R K F X 45 _ C −T− SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S SOLDERING FOOTPRINT 8X 6.40 16X 1 1.12 16 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS http://onsemi.com 12 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 MC74HCT4851A, MC74HCT4852A PACKAGE DIMENSIONS SOIC−16 WIDE DW SUFFIX CASE 751G−03 ISSUE C A D 9 h X 45 _ E 0.25 1 16X M 14X e T A S B S L A 0.25 B B NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS DIM MIN MAX A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 10.15 10.45 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 q 0_ 7_ 8 A1 H 8X M B M 16 q SEATING PLANE T C http://onsemi.com 13 MC74HCT4851A, MC74HCT4852A PACKAGE DIMENSIONS TSSOP−16 CASE 948F ISSUE B 16X K REF 0.10 (0.004) 0.15 (0.006) T U M T U S V S K S ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ K1 2X L/2 16 9 J1 B −U− L SECTION N−N J PIN 1 IDENT. N 8 1 0.25 (0.010) M 0.15 (0.006) T U S A −V− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. N F DETAIL E −W− C 0.10 (0.004) −T− SEATING PLANE D H G DETAIL E DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 16X 0.36 16X 1.26 DIMENSIONS: MILLIMETERS ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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