TI1 LM2903-Q1 Dual differential comparator Datasheet

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LM2903-Q1
SLCS141E – MAY 2003 – REVISED JULY 2014
LM2903-Q1 Dual Differential Comparators
1 Features
2 Applications
•
•
•
1
•
•
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
AEC-Q100 Qualified with the Following Results:
– Device Temperature Grade 1: –40°C to 125°C
Ambient Operating Temperature Range
– Device HBM ESD Classification Level H1C
– Device CDM ESD Classification Level C4B
ESD Protection Exceeds 1000 V Per
MIL-STD-883, Method 3015; Exceeds 100 V
Using Machine Model (C = 200 pF, R = 0 Ω)
Single Supply or Dual Supplies
Low Supply-Current Drain Independent of
Supply Voltage 0.4 mA Typ Per
Comparator
Low Input Bias Current 25 nA Typ
Low Input Offset Current 5 nA Typ
Low Input Offset Voltage 2 mV Typ
Common-Mode Input Voltage Range Includes
Ground
Differential Input Voltage Range Equal to
Maximum-Rated Supply Voltage ±36 V
Low Output Saturation Voltage
Output Compatible With TTL, MOS, and CMOS
•
•
•
•
•
Automotive
– HEV/EV & Power Train
– Infotainment & Cluster
– Body Control Module
Industrial
Power supervision
Oscillator
Peak Detector
Logic Voltage Translation
3 Description
This device consists of two independent voltage
comparators that are designed to operate from a
single power supply over a wide range of voltages.
Operation from dual supplies is possible, as long as
the difference between the two supplies is 2 V to 36
V, and VCC is at least 1.5 V more positive than the
input common-mode voltage. Current drain is
independent of the supply voltage. The outputs can
be connected to other open-collector outputs to
achieve wired-AND relationships.
Device Information(1)
PART NUMBER
LM2903-Q1
PACKAGE
BODY SIZE (NOM)
VSSOP(8)
3.00 mm x 3.00 mm
SOIC (8)
4.90 mm × 3.91 mm
TSSOP (8)
3.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Simplified Schematic
IN+
OUT
IN−
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2903-Q1
SLCS141E – MAY 2003 – REVISED JULY 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Simplified Schematic.............................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
2
3
3
7.1
7.2
7.3
7.4
7.5
7.6
7.7
3
3
4
4
4
5
5
Absolute Maximum Ratings ......................................
Handling Ratings.......................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 6
8.1 Overview ................................................................... 6
8.2 Functional Block Diagram ......................................... 6
8.3 Feature Description................................................... 6
8.4 Device Functional Modes.......................................... 6
9
Application and Implementation .......................... 7
9.1 Application Information.............................................. 7
9.2 Typical Application ................................................... 7
10 Power Supply Recommendations ....................... 9
11 Layout..................................................................... 9
11.1 Layout Guidelines ................................................... 9
11.2 Layout Example ...................................................... 9
12 Device and Documentation Support ................... 9
12.1 Trademarks ............................................................. 9
12.2 Electrostatic Discharge Caution .............................. 9
12.3 Glossary .................................................................. 9
13 Mechanical, Packaging, and Orderable
Information ............................................................. 9
5 Revision History
Changes from Revision D (April 2008) to Revision E
Page
•
Added AEC-Q100 info to Features. ....................................................................................................................................... 1
•
Added Applications. ............................................................................................................................................................... 1
•
Added Device Information table. ........................................................................................................................................... 1
•
Added Pin Functions table. .................................................................................................................................................... 3
•
Added Handling Ratings table. .............................................................................................................................................. 3
•
Added TJ and ESD ratings to Abs Max table. ........................................................................................................................ 3
•
Updated Recommended Operating Conditions table. ........................................................................................................... 4
•
Added Thermal Information table. .......................................................................................................................................... 4
•
Updated Electrical Characteristics table. ............................................................................................................................... 4
2
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6 Pin Configuration and Functions
D, DGK OR PW PACKAGE
Top View
1OUT
1IN−
1IN+
GND
1
8
2
7
3
6
4
5
VCC
2OUT
2IN−
2IN+
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
1OUT
1
Output
1IN-
2
Input
Comparator 1's negative input pin
1IN+
3
Input
Comparator 1's positive input pin
GND
4
Input
Ground
2IN+
5
Input
Comparator 2's positive input pin
2IN-
6
Input
Comparator 2's negative input pin
2OUT
7
Output
VCC
8
Input
Comparator 1's output pin
Comparator 2's output pin
Supply Pin
7 Specifications
7.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
(2)
MAX
UNIT
VCC
Supply voltage
VID
Differential input voltage (3)
36
V
–36
36
VI
Input voltage range (either input)
V
−0.3
36
V
VO
Output voltage
36
V
IO
Output current
20
mA
Duration of output short-circuit to ground
Unlimited
D package
θJA
Package thermal impedance
(4)
PW package
DGK package
(1)
(2)
(3)
(4)
97
°C/W
149
°C/W
199.4
°C/W
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to GND.
Differential voltages are at IN+ with respect to IN−.
The package thermal impedance is calculated in accordance with JESD 51-7.
7.2 Handling Ratings
MIN
Tstg
Storage temperature range
V(ESD)
(1)
Electrostatic discharge
MAX
–65
150
Human body model (HBM), per AEC Q100-002 (1)
0
1000
Charged device model (CDM), per
AEC Q100-011
0
750
All pins
UNIT
°C
V
AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VCC (non-V devices)
2
30
VCC (V devices)
2
32
V
-40
125
°C
TJ
Junction Temperature
V
7.4 Thermal Information
LM2903-Q1
THERMAL METRIC (1)
DGK
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
199.4
RθJCtop
Junction-to-case (top) thermal resistance
120.8
RθJB
Junction-to-board thermal resistance
90.2
ψJT
Junction-to-top characterization parameter
21.5
ψJB
Junction-to-board characterization parameter
119.1
(1)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
7.5 Electrical Characteristics
at specified free-air temperature, VCC = 5 V (unless otherwise noted)
PARAMETER
VIO
Input offset voltage
TA (1)
TEST CONDITIONS
VO = 1.4 V,
VIC = VIC(min),
VCC = 5 V to MAX (2)
Non-A devices
A-suffix devices
Input offset current
VO = 1.4 V
IIB
Input bias current
VO = 1.4 V
VICR
Common-mode input
voltage range (3)
AVD
Large-signal
differential-voltage
amplification
VCC = 15 V,
VO = 1.4 V to 11.4 V,
RL ≥ 15 kΩ to VCC
IOH
High-level output
current
VOH = 5 V
VOL
Low-level output
voltage
IOL = 4 mA,
VID = −1 V
IOL
Low-level output
current
VOL = 1.5 V,
VID = −1 V
ICC
Supply current
RL = ∞
(1)
(2)
(3)
4
TYP
MAX
2
7
Full range
15
25°C
1
2
5
50
Full range
Full range
200
−25
25°C
25°C
25°C
VID = 1 V
VCC = 5 V
VCC = MAX (2)
0 to VCC−1.5
25
25°C
100
0.1
25°C
150
Full range
25°C
Full range
mV
nA
nA
V
0 to VCC−2
Full range
25°C
−250
−500
Full range
Full range
UNIT
4
25°C
IIO
VOH = VCC MAX (2)
MIN
25°C
V/mV
50
nA
1
µA
400
700
6
mV
mA
0.8
1
2.5
mA
Full range (MIN or MAX) for LM2903Q is −40°C to 125°C. All characteristics are measured with zero common-mode input voltage,
unless otherwise specified.
VCC MAX = 30 V for non-V devices and 32 V for V-suffix devices.
The voltage at either input or common-mode should not be allowed to go negative by more than 0.3 V. The upper end of the commonmode voltage range is VCC+ − 1.5 V for the inverting input (−), and the non-inverting input (+) can exceed the VCC level; the
comparator provides a proper output state. Either or both inputs can go to 30 V (32V for V-suffix devices) without damage.
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7.6 Switching Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Response time
(1)
(2)
TEST CONDITIONS
TYP
RL connected to 5 V through 5.1 kΩ,
100-mV input step with 5-mV overdrive
1.3
CL = 15 pF (1) (2)
TTL-level input step
0.3
UNIT
µs
CL includes probe and jig capacitance.
The response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.
7.7 Typical Characteristics
1.0
70
-40C
0C
25C
85C
125C
60
Input Bias Current (nA)
Supply Current (mA)
0.8
0.6
0.4
0.2
-40C
0C
85C
125C
25C
50
40
30
20
10
0.0
0
0
10
20
30
40
Vcc (V)
0
8
16
24
32
Vcc (V)
C001
Figure 1. Supply Current vs. Supply Voltage
40
C002
Figure 2. Input Bias Current vs. Supply Voltage
Output Low Voltage, VOL(V)
10.000
1.000
0.100
0.010
0.001
0.01
-40C
0C
25C
85C
125C
0.1
1
10
100
Output Sink Current, Io(mA)
C005
Figure 3. Output Low Voltage vs. Output Current
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8 Detailed Description
8.1 Overview
The LM2903 is a dual comparator with the ability to operate up to 36 V on the supply pin. This standard device
has proven ubiquity and versatility across a wide range of applications. This is due to it's very wide supply
voltages range (2 V to 36 V), low Iq and fast response.
This device is Q100 qualified and can operate over a wide temperature range (–40°C to 125°C).
The open-drain output allows the user to configure the output's logic low voltage (VOL) and can be utilized to
enable the comparator to be used in AND functionality.
8.2 Functional Block Diagram
VCC
80-µA
Current Regulator
60 µA
10 µA
10 µA
80 µA
IN+
COMPONENT COUNT
OUT
Epi-FET
Diodes
Resistors
Transistors
1
2
2
30
IN−
GND
Figure 4. Schematic (Each Comparator)
8.3 Feature Description
LM2903 consists of a PNP darlington pair input, allowing the device to operate with very high gain and fast
response with minimal input bias current. The input Darlington pair creates a limit on the input common mode
voltage capability, allowing LM2903 to accurately function from ground to VCC–1.5V differential input. This is
enables much head room for modern day supplies of 3.3 V & 5.0 V.
The output consists of an open drain NPN (pull-down or low side) transistor. The output NPN will sink current
when the positive input voltage is higher than the negative input voltage and the offset voltage. The VOL is
resistive and will scale with the output current. Please see Figure 2 in the Typical Characteristics section for VOL
values with respect to the output current.
8.4 Device Functional Modes
8.4.1 Voltage Comparison
The LM2903-Q1 operates solely as a voltage comparator, comparing the differential voltage between the positive
and negative pins and outputting a logic low or high impedance (logic high with pull-up) based on the input
differential polarity.
6
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9 Application and Implementation
9.1 Application Information
LM2903Q1 will typically be used to compare a single signal to a reference or two signals against each other.
Many users take advantage of the open drain output to drive the comparison logic output to a logic voltage level
to an MCU or logic device. The wide supply range and high voltage capability makes LM2903Q1 optimal for level
shifting to a higher or lower voltage.
9.2 Typical Application
VLOGIC
VLOGIC
VSUP
Vin
VSUP
Rpullup
+
Vin+
½ LM2903
Rpullup
+
½ LM2903
Vin-
Vref
CL
CL
Figure 5. Single-ended and Differential Comparator Configurations
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input Voltage Range
0 V to Vsup-1.5 V
Supply Voltage
2 V to 36 V
Logic Supply Voltage
2 V to 36 V
Output Current (RPULLUP)
1 µA to 20 mA
Input Overdrive Voltage
100 mV
Reference Voltage
2.5 V
Load Capacitance (CL)
15 pF
9.2.2 Detailed Design Procedure
When using LM2903-Q1 in a general comparator application, determine the following:
• Input Voltage Range
• Minimum Overdrive Voltage
• Output & Drive Current
• Response Time
9.2.2.1 Input Voltage Range
When choosing the input voltage range, the input common mode voltage range (VICR) must be taken in to
account. If temperature operation is above or below 25°C the VICR can range from 0 V to VCC–2.0V. This limits
the input voltage range to as high as VCC–2.0V and as low as 0 V. Operation outside of this range can yield
incorrect comparisons.
Below is a list of input voltage situation and their outcomes:
1. When both IN- & IN+ are both within the common mode range:
(a) If IN- is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking
current
(b) If IN- is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is
not conducting
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2. When IN- is higher than common mode and IN+ is within common mode, the output is low and the output
transistor is sinking current
3. When IN+ is higher than common mode and IN- is within common mode, the output is high impedance and
the output transistor is not conducting
4. When IN- and IN+ are both higher than common mode, the output is low and the output transistor is sinking
current
9.2.2.2 Minimum Overdrive Voltage
Overdrive Voltage is the differential voltage produced between the positive and negative inputs of the comparator
over the offset voltage (VIO). In order to make an accurate comparison the Overdrive Voltage (VOD) should be
higher than the input offset voltage (VIO). Overdrive voltage can also determine the response time of the
comparator, with the response time decreasing with increasing overdrive. Figure 6 & Figure 7 show positive and
negative response times with respect to overdrive voltage.
9.2.2.3 Output & Drive Current
Output current is determined by the load/pull-up resistance and logic/pull-up voltage. The output current will
produce a output low voltage (VOL) from the comparator. In which VOL is proportional to the output current. Use
Figure 3 to determine VOL based on the output current.
The output current can also effect the transient response. More will be explained in the next section.
9.2.2.4 Response Time
The transient response can be determined by the load capacitance (CL), load/pull-up resistance (RPULLUP) and
equivalent collector-emitter resistance (RCE).
•
•
The positive response time (τp) is approximately τP ~ RPULLUP x CL
The negative response time (τN) is approximately τN ~ RCE x CL
– RCE can be determine by taking the slope of Figure 3 in it's linear region at the desired temperature, or by
dividing the VOL by Iout
9.2.3 Application Curves
6
6
5
5
Output Voltage (Vo)
Output Voltage, Vo(V)
The following curves were generated with 5 V on VCC & VLogic, RPULLUP = 5.1 kΩ, and 50 pF scope probe.
4
3
2
5mV OD
1
20mV OD
0
4
3
2
5mV OD
1
20mV OD
0
100mV OD
±1
-0.25
0.25
0.75
1.25
Time (usec)
1.75
2.25
0.25
0.50
0.75
1.00
Time (usec)
C004
Figure 6. Response Time for Various Overdrives (Positive
Transition)
8
100mV OD
±1
±0.25 0.00
1.25
1.50
1.75
2.00
C006
Figure 7. Response Time for Various Overdrives (Negative
Transition)
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10 Power Supply Recommendations
For fast response and comparison applications with noisy or AC inputs, it is recommended to use a bypass
capacitor on the supply pin to reject any variation on the supply voltage. This variation can eat into the
comparator's input common mode range and create an inaccurate comparison.
11 Layout
11.1 Layout Guidelines
For accurate comparator applications without hysteresis it is important maintain a stable power supply with
minimized noise and glitches, which can affect the high level input common mode voltage range. In order to
achieve this, it is best to add a bypass capacitor between the supply voltage and ground. This should be
implemented on the positive power supply and negative supply (if available). If a negative supply is not being
used, do not put a capacitor between the IC's GND pin and system ground.
11.2 Layout Example
Ground
Bypass
Capacitor
1
1OUT
1INí 2
3
1IN+
GND
4
Negative Supply or Ground
Only needed
for dual power
supplies
0.1PF
VCC
7 2OUT
6 2INí
5 2IN+
8
Positive Supply
0.1PF
Ground
Figure 8. LM2903Q1 Layout Example
12 Device and Documentation Support
12.1 Trademarks
All trademarks are the property of their respective owners.
12.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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18-Jul-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM2903AVQDRG4Q1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903AVQ
LM2903AVQDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903AVQ
LM2903AVQPWRG4Q1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903AVQ
LM2903AVQPWRQ1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903AVQ
LM2903QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
KACQ
LM2903QDRG4Q1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903Q1
LM2903QDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903Q1
LM2903QPWRG4Q1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903Q1
LM2903QPWRQ1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903Q1
LM2903VQDRG4Q1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903VQ1
LM2903VQDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903VQ1
LM2903VQPWRG4Q1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903VQ
LM2903VQPWRQ1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903VQ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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18-Jul-2014
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM2903-Q1 :
• Catalog: LM2903
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
LM2903QDGKRQ1
Package Package Pins
Type Drawing
VSSOP
DGK
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
5.3
B0
(mm)
K0
(mm)
P1
(mm)
3.4
1.4
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2014
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2903QDGKRQ1
VSSOP
DGK
8
2500
366.0
364.0
50.0
Pack Materials-Page 2
PACKAGE OUTLINE
PW0008A
TSSOP - 1.2 mm max height
SCALE 2.800
SMALL OUTLINE PACKAGE
C
6.6
TYP
6.2
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
6X 0.65
8
1
3.1
2.9
NOTE 3
2X
1.95
4
5
B
4.5
4.3
NOTE 4
SEE DETAIL A
8X
0.30
0.19
0.1
C A
1.2 MAX
B
(0.15) TYP
0.25
GAGE PLANE
0 -8
0.15
0.05
0.75
0.50
DETAIL A
TYPICAL
4221848/A 02/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
1
8
(R0.05)
TYP
SYMM
6X (0.65)
5
4
(5.8)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221848/A 02/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
(R0.05) TYP
1
8
SYMM
6X (0.65)
5
4
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221848/A 02/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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