AD ADG702BRJ-REEL7 Cmos low voltage 2 î© spst switch Datasheet

CMOS Low Voltage
2 Ω SPST Switches
ADG701/ADG702
FUNCTIONAL BLOCK DIAGRAM
1.8 V to 5.5 V single supply
2 Ω (typical) on resistance
Low on resistance flatness
–3 dB bandwidth > 200 MHz
Rail-to-rail operation
Fast switching times
tON 18 ns
tOFF 12 ns
Typical power consumption < 0.01 μW
TTL/CMOS-compatible
ADG701
S
ADG702
D
S
IN
D
IN
SWITCHES SHOWN FOR A LOGIC 1 INPUT
00039-001
FEATURES
Figure 1.
APPLICATIONS
Battery-powered systems
Communications systems
Sample-and-hold systems
Audio signal routing
Video switching
Mechanical reed relay replacement
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG701/ADG702 are monolithic CMOS SPST switches.
These switches are designed on an advanced submicron process
that provides low power dissipation yet high switching speed,
low on resistance, and low leakage currents. In addition, −3 dB
bandwidths of greater than 200 MHz can be achieved.
1.
1.8 V to 5.5 V Single-Supply Operation.
The ADG701/ADG702 offer high performance, including
low on resistance and fast switching times, and are fully
specified and guaranteed with 3 V and 5 V supply rails.
2.
Very Low RON (3 Ω Maximum at 5 V, 5 Ω Maximum at 3 V).
At 1.8 V operation, RON is typically 40 Ω over the temperature range.
3.
On Resistance Flatness RFLAT(ON) (1 Ω Maximum).
Figure 1 shows that with a logic input of 1, the switch of the
ADG701 is closed and that of the ADG702 is open. Each switch
conducts equally well in both directions when on.
4.
−3 dB Bandwidth > 200 MHz.
5.
Low Power Dissipation.
CMOS construction ensures low power dissipation.
The ADG701/ADG702 are available in 5-lead SOT-23, 6-lead
SOT-23, and 8-lead MSOP packages.
6.
Fast tON/tOFF.
The ADG701/ADG702 can operate from a single 1.8 V to 5.5 V
supply, making it ideal for use in battery-powered instruments
and with the new generation of DACs and ADCs from Analog
Devices, Inc.
Table 1. Related Devices
Part No.
ADG701L/ADG702L
Description
Low voltage 2 Ω SPST switches
with guaranteed leakage
specifications
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2006 Analog Devices, Inc. All rights reserved.
ADG701/ADG702
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Applications....................................................................................... 1
Terminology .......................................................................................8
Functional Block Diagram .............................................................. 1
Test Circuits........................................................................................9
General Description ......................................................................... 1
Applications Information .............................................................. 10
Product Highlights ........................................................................... 1
ADG701/ADG702 Supply Voltages......................................... 10
Revision History ............................................................................... 2
Bandwidth ................................................................................... 10
Specifications..................................................................................... 3
Off Isolation ................................................................................ 10
Absolute Maximum Ratings............................................................ 5
Outline Dimensions ....................................................................... 11
ESD Caution.................................................................................. 5
Ordering Guide .......................................................................... 12
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
7/06—Rev. B to Rev. C
Changes to Product Highlights....................................................... 1
Added Table 1.................................................................................... 1
Changes to Table 2............................................................................ 3
Changes to Table 3............................................................................ 4
Added Pb-Free Reflow Soldering to Absolute Maximum Ratings ..5
Changes to Ordering Guide .......................................................... 13
6/04—Rev. A to Rev. B
Updated Format..................................................................Universal
Added 5-Lead SOT-23 Package ........................................Universal
Updated Outline Dimensions ....................................................... 10
Changes to Ordering Guide .......................................................... 11
8/98—Rev. 0 to Rev. A
Rev. C | Page 2 of 12
ADG701/ADG702
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V. Temperature range for B version is −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT(ON))
+25°C
B Version
–40°C to
+85°C
0 V to VDD
2
3
0.5
4
1.0
LEAKAGE CURRENTS
Source OFF Leakage, IS (OFF)
Drain OFF Leakage, ID (OFF)
Channel ON Leakage, ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS 1
tON
±0.01
±0.01
±0.01
5
–55
–75
200
17
17
38
IDD
VDD = 5.5 V
VS = 4.5 V/1 V, VD = 1 V/4.5 V; Figure 12
VS = 4.5 V/1 V, VD = 1 V/4.5 V; Figure 12
VS = VD = 1 V, or 4.5 V; Figure 13
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 300 Ω, CL = 35 pF
VS = 3 V; Figure 14
RL = 300 Ω, CL = 35 pF
VS = 3 V; Figure 14
VS = 2 V, RS = 0 Ω, CL = 1 nF; Figure 15
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 16
RL = 50 Ω, CL = 5 pF; Figure 17
VDD = 5.5 V
Digital inputs = 0 V or 5 V
0.001
1.0
1
VS = 0 V to VDD, IS = –10 mA
μA typ
μA max
12
Bandwidth –3 dB
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
VS = 0 V to VDD, IS = –10 mA; Figure 11
V min
V max
18
Charge Injection
Off Isolation
Test Conditions/Comments
2.4
0.8
12
8
V
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA typ
nA typ
0.005
tOFF
Unit
μA typ
μA max
Guaranteed by design, not subject to production test.
Rev. C | Page 3 of 12
ADG701/ADG702
VDD = 3 V ± 10%, GND = 0 V. Temperature range for B version is −40°C to +85°C, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS 1
tON
+25°C
B Version
−40°C to
+85°C
0 V to VDD
3.5
5
1.5
6
±0.01
±0.01
±0.01
4
−55
−75
200
17
17
38
IDD
μA typ
μA max
VIN = VINL or VINH
ns typ
ns max
ns typ
ns max
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 300 Ω, CL = 35 pF
VS = 2 V, Figure 14
RL = 300 Ω, CL = 35 pF
VS = 2 V, Figure 14
VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Figure 15
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 16
RL = 50 Ω, CL = 5 pF; Figure 17
VDD = 3.3 V
Digital inputs = 0 V or 3 V
0.001
1.0
1
VS = 0 V to VDD, IS = −10 mA
VDD = 3.3 V
VS = 3 V/1 V, VD = 1 V/3 V; Figure 12
VS = 3 V/1 V, VD = 1 V/3 V; Figure 12
V = VD = 1 V, or 3 V; Figure 13
±0.1
13
Bandwidth −3 dB
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
VS = 0 V to VDD, IS = −10 mA; Figure 11
V min
V max
20
Charge Injection
Off Isolation
Test Conditions/Comments
2.0
0.4
14
8
V
Ω typ
Ω max
Ω typ
nA typ
nA typ
nA typ
0.005
tOFF
Unit
Guaranteed by design, not subject to production test.
Rev. C | Page 4 of 12
μA typ
μA max
ADG701/ADG702
ABSOLUTE MAXIMUM RATINGS
TA = +25°C, unless otherwise noted.
Table 4.
Parameter
VDD to GND
Analog and Digital Inputs 1
Continuous Current, S or D
Peak Current, S or D
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
MSOP Package, Power Dissipation
θJA Thermal Impedance
θJC Thermal Impedance
SOT-23 Package, Power Dissipation
θJA Thermal Impedance
θJC Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
Pb-free Reflow Soldering
Peak Temperature
Time at Peak Temperature
ESD
1
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V
or 30 mA, whichever
occurs first
30 mA
100 mA, pulsed at 1 ms,
10% duty cycle maximum
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating may be applied at any
one time.
−40°C to +85°C
−65°C to +150°C
150°C
315 mW
206°C/W
44°C/W
282 mW
229.6°C/W
91.99°C/W
Table 5. Truth Table
ADG701 In
0
1
ADG702 In
1
0
215°C
220°C
260(+0/−5)°C
10 sec to 40 sec
2 kV
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 5 of 12
Switch Condition
Off
On
ADG701/ADG702
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
S
7
GND
6 IN
TOP VIEW
VDD 4 (Not to Scale) 5 NC
NC 3
NC = NO CONNECT
D 1
S 2
6
ADG701/
ADG702
VDD
NC
TOP VIEW
GND 3 (Not to Scale) 4 IN
NC = NO CONNECT
Figure 2. 8-Lead MSOP
D 1
5
Figure 3. 6-Lead SOT-23
S 2
TOP VIEW
GND 3 (Not to Scale)
8-Lead
MSOP
1
2, 3, 5
4
6
7
8
5-Lead
SOT-23
1
5
4
3
2
Mnemonic
D
NC
VDD
IN
GND
S
Description
Drain Terminal. Can be an input or output.
No Connect
Most Positive Power Supply Potential.
Logic Control Input.
Ground (0 V) Reference.
Source Terminal. Can be an input or output.
Rev. C | Page 6 of 12
VDD
4
IN
Figure 4. 5-Lead SOT-23
Table 6. Pin Descriptions
Pin No.
6-Lead
SOT-23
1
5
6
4
3
2
5
ADG701/
ADG702
00039-004
8
00039-003
ADG701/
ADG702
00039-002
D 1
NC 2
ADG701/ADG702
TYPICAL PERFORMANCE CHARACTERISTICS
10m
3.5
VDD = 2.7V
TA = 25°C
1m
3.0
100μ
2.5
VDD = 4.5V
2.0
1.5
VDD = 5.0V
10μ
1μ
100n
0.5
10n
00039-005
1.0
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VD OR VS (DRAIN OR SOURCE VOLTAGE (V))
00039-008
ISUPPLY (A)
VDD = 3.0V
RON (Ω)
VDD = 5V
1n
10
5.0
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 8. Supply Current vs. Input Switching Frequency
Figure 5. On Resistance as a Function of VD (VS) Single Supplies
–10
3.5
VDD = 3V
VDD = 5V, 3V
–20
3.0
–30
+85°C
OFF ISOLATION (dB)
2.5
RON (Ω)
+25°C
2.0
–40°C
1.5
1.0
–40
–50
–60
–70
–80
00039-006
0
0
0.5
1.0
1.5
2.0
2.5
VD OR VS (DRAIN OR SOURCE VOLTAGE (V))
00039-009
–90
0.5
–100
–110
10k
3.0
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 9. Off Isolation vs. Frequency
Figure 6. On Resistance as a Function of VD (VS) for Different Temperatures
VDD = 3 V
3.5
0
VDD = 5V
VDD = 3V
3.0
RON (Ω)
+85°C
2.0
+25°C
1.5
–40°C
1.0
00039-007
0.5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VD OR VS (DRAIN OR SOURCE VOLTAGE (V))
–2
–4
–6
10k
5.0
Figure 7. On Resistance as a Function of VD (VS) for Different Temperatures
VDD = 5 V
Rev. C | Page 7 of 12
00039-010
ON RESPONSE (dB)
2.5
100k
1M
10M
FREQUENCY (Hz)
Figure 10. Bandwidth
100M
ADG701/ADG702
TERMINOLOGY
Table 7.
Term
RON
RFLAT(ON)
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
tON
tOFF
Off Isolation
Charge Injection
Bandwidth
On Response
On Loss
Description
Ohmic resistance between D and S.
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the
specified analog signal range.
Source leakage current with the switch off.
Drain leakage current with the switch off.
Channel leakage current with the switch on.
Analog voltage on terminals D and S.
Off switch source capacitance.
Off switch drain capacitance.
On switch capacitance.
Delay between applying the digital control input and the output switching on. See Figure 14.
Delay between applying the digital control input and the output switching off.
A measure of unwanted signal coupling through an off switch.
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
The frequency at which the output is attenuated by −3 dB.
The frequency response of the on switch.
The voltage drop across the on switch seen in Figure 10 as the number of decibels that the signal is from 0 dB at very
low frequencies.
Rev. C | Page 8 of 12
ADG701/ADG702
TEST CIRCUITS
IDS
V1
D
VS
VD
Figure 11. On Resistance
S
A
D
ID (ON)
A
VS
VD
Figure 12. Off Leakage
Figure 13. On Leakage
VDD
0.1μF
VIN ADG701
50%
50%
VIN
50%
50%
VDD
VS
VOUT
D
RL
300Ω
IN
ADG702
CL
35pF
90%
VOUT
90%
GND
tON
tOFF
00039-014
S
Figure 14. Switching Times
VDD
VDD
S
VIN
D
ADG701
ON
OFF
QINJ = CL × ΔVOUT
ΔVOUT
VOUT
CL
1nF
VS
IN
VIN
ADG702
VOUT
GND
00039-015
RS
Figure 15. Charge Injection
VDD
VDD
0.1μF
0.1μF
VDD
S
RL
50Ω
IN
VIN
GND
VS
Figure 16. Off Isolation
RL
50Ω
VIN
GND
Figure 17. Bandwidth
Rev. C | Page 9 of 12
VOUT
D
IN
00039-016
VS
VOUT
D
00039-017
S
VDD
00039-013
RON = V1/IDS
VS
ID (OFF)
S
A
00039-012
IS (OFF)
D
00039-011
S
ADG701/ADG702
APPLICATIONS INFORMATION
ADG701/ADG702 SUPPLY VOLTAGES
Functionality of the ADG701/ADG702 extends from 1.8 V to
5.5 V single supply, making the parts ideal for battery-powered
instruments, where power efficiency and performance are
important design parameters.
It is important to note that the supply voltage affects the input
signal range, on resistance, and switching times of the part. The
effects of the power supplies can be clearly seen in the Typical
Performance Characteristics and the Specifications sections.
For VDD = 1.8 V operation, RON is typically 40 Ω over the
temperature range.
BANDWIDTH
Figure 18 illustrates the parasitic components that affect the ac
performance of CMOS switches (a box surrounds the switch).
Additional external capacitances further degrade performance by
affecting feedthrough, crosstalk, and system bandwidth.
The signal transfer characteristic is dependent on the switch
channel capacitance, CDS. This capacitance creates a frequency
zero in the numerator of the transfer function A(s). Because the
switch on resistance is small, this zero usually occurs at high
frequencies. The bandwidth is a function of the switch output
capacitance combined with CDS and the load capacitance. The
frequency pole corresponding to these capacitances appears in
the denominator of A(s).
The dominant effect of the output capacitance, CD, causes the pole
breakpoint frequency to occur first. To maximize bandwidth, a
switch must have a low input and output capacitance and low
on resistance. The on response vs. frequency for the ADG701/
ADG702 can be seen in Figure 10.
OFF ISOLATION
Off isolation is a measure of the input signal coupled through
an off switch to the switch output. The capacitance, CDS, couples
the input signal to the output load when the switch is off, as
shown in Figure 19.
CDS
S
VOUT
VIN
CDS
S
D
VIN
CLOAD
RLOAD
Figure 18. Switch Represented by Equivalent Parasitic Components
The transfer function that describes the equivalent diagram of
the switch (see Figure 18) is of the form (A)s, shown in the
following equation:
⎡ s(RON C DS ) + 1 ⎤
A(s) = RT ⎢
⎥
⎣ s(RON CT RT ) + 1 ⎦
where CT = CLOAD + CD + CDS.
CD
CLOAD
RLOAD
Figure 19. Off Isolation Is Affected by External Load Resistance and
Capacitance
VOUT
CD
00039-018
RON
D
00039-019
The ADG701/ADG702 belong to the Analog Devices family
of CMOS switches. This series of general-purpose switches
has improved switching times, lower on resistance, higher
bandwidth, low power consumption, and low leakage currents.
The larger the value of CDS, the larger the values of feedthrough
produced. Figure 9 illustrates the drop in off isolation as a
function of frequency. From dc to roughly 1 MHz, the switch
shows better than −75 dB isolation. Up to frequencies of 10 MHz,
the off isolation remains better than −55 dB. As the frequency
increases, more of the input signal is coupled through to the
output. Off isolation can be maximized by choosing a switch
with the smallest CDS possible. The values of load resistance and
capacitance also affect off isolation, because they contribute to
the coefficients of the poles and zeros in the transfer function of
the switch when open.
⎡ s(R LOAD C DS ) + 1 ⎤
A(s) = RT ⎢
⎥
⎣ s(R LOAD )(CT ) + 1 ⎦
Rev. C | Page 10 of 12
ADG701/ADG702
OUTLINE DIMENSIONS
3.00
BSC
8
3.00
BSC
5
4.90
BSC
1
4
PIN 1
0.65 BSC
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.80
0.60
0.40
8°
0°
0.23
0.08
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 20. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
2.90 BSC
6
5
4
1
2
3
2.80 BSC
1.60 BSC
PIN 1
INDICATOR
0.95 BSC
1.30
1.15
0.90
1.90
BSC
1.45 MAX
0.15 MAX
0.50
0.30
0.22
0.08
SEATING
PLANE
10°
4°
0°
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178-AB
Figure 21. 6-Lead Small Outline Transistor Package [SOT-23]
(RT-6)
Dimensions shown in millimeters
Rev. C | Page 11 of 12
ADG701/ADG702
2.90 BSC
5
4
2.80 BSC
1.60 BSC
1
2
3
PIN 1
0.95 BSC
1.90
BSC
1.30
1.15
0.90
1.45 MAX
0.15 MAX
0.50
0.30
0.22
0.08
SEATING
PLANE
10°
5°
0°
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 22. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADG701BRJ-500RL7
ADG701BRJ-REEL
ADG701BRJ-REEL7
ADG701BRM
ADG701BRM-REEL
ADG701BRM-REEL7
ADG701BRT-REEL
ADG701BRT-REEL7
ADG701BRJZ-500RL71
ADG701BRJZ-REEL1
ADG701BRJZ-REEL71
ADG701BRMZ 1
ADG701BRMZ-REEL71
ADG701BRTZ-REEL1
ADG701BRTZ-REEL71
ADG702BRJ-500RL7
ADG702BRJ-REEL
ADG702BRJ-REEL7
ADG702BRM
ADG702BRM-REEL
ADG702BRM-REEL7
ADG702BRT-REEL
ADG702BRT-REEL7
ADG702BRJZ-500RL71
ADG702BRJZ-REEL1
ADG702BRJZ-REEL71
ADG702BRMZ1
ADG702BRMZ-REEL71
ADG702BRTZ-REEL1
ADG702BRTZ-REEL71
1
Package Description
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
5-Lead Small Outline Transistor Package [SOT-23]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
Z = Pb-free part, # denotes lead-free product, may be top or bottom marked.
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00039–0–7/06(C)
Rev. C | Page 12 of 12
Package Option
RJ-5
RJ-5
RJ-5
RM-8
RM-8
RM-8
RT-6
RT-6
RJ-5
RJ-5
RJ-5
RM-8
RM-8
RT-6
RT-6
RJ-5
RJ-5
RJ-5
RM-8
RM-8
RM-8
RT-6
RT-6
RJ-5
RJ-5
RJ-5
RM-8
RM-8
RT-6
RT-6
Branding
S3B
S3B
S3B
S3B
S3B
S3B
S3B
S3B
S3B#
S3B#
S3B#
S0S
S0S
S3B#
S3B#
S4B
S4B
S4B
S4B
S4B
S4B
S4B
S4B
S14
S14
S14
S14
S14
S4B#
S4B#