AD ADG901-EP Low power consumption Datasheet

FEATURES
FUNCTIONAL BLOCK DIAGRAM
Wideband switch: −3 dB at 4.5 GHz
Absorptive switch
High off isolation: 38 dB at 1 GHz
Low insertion loss: 0.8 dB at 1 GHz
Single 1.65 V to 2.75 V power supply
CMOS/LVTTL control logic
Tiny 3 mm × 3 mm LFCSP package
Low power consumption (<2.5 µA)
ADG901-EP
RF2
RF1
50Ω
50Ω
14327-001
CTRL
ENHANCED PRODUCT FEATURES
Figure 1.
Supports defense and aerospace applications (AQEC standard)
Military temperature range: −55°C to +125°C
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Enhanced product change notification
Qualification data available on request
PRODUCT HIGHLIGHTS
1.
2.
3.
−38 dB Off Isolation at 1 GHz
0.8 dB Insertion Loss at 1 GHz
Tiny 8-Lead LFCSP Package
0
TA = 25°C
APPLICATIONS
–10
Wireless communications
General-purpose radio frequency (RF) switching
Dual-band applications
High speed filter selection
Digital transceiver front-end switch
IF switching
Tuner modules
Antenna diversity switching list
–20
ISOLATION (dB)
–30
–40
–50
VDD = 2.5V
–60
–70
–80
GENERAL DESCRIPTION
VDD = 1.8V
–90
Additional application and technical information can be found
in the ADG901 data sheet.
–100
10k
100k
1M
10M
100M
1G
10G
1G
10G
FREQUENCY (Hz)
Figure 2. Off Isolation vs. Frequency
–0.4
–0.6
–0.8
–1.0
INSERTION LOSS (dB)
The ADG901-EP is a wideband switch that uses a CMOS
process to provide high isolation and low insertion loss to 1 GHz.
The ADG901-EP is an absorptive (matched) switch with 50 Ω
terminated shunt legs. This switch is designed such that the
isolation is high over the dc to 1 GHz frequency range. The
ADG901-EP has on-board CMOS control logic, thus eliminating
the need for external controlling circuitry. The control inputs
are both CMOS and LVTTL compatible. The low power consumption of this CMOS device makes it ideally suited to wireless
applications and general-purpose high frequency switching.
14327-002
Enhanced Product
Wideband, 38 dB Isolation at 1 GHz, CMOS
1.65 V to 2.75 V, SPST Switch
ADG901-EP
–1.2
–1.4
–1.6
–1.8
–2.0
–2.2
–2.4
–2.6
–3.0
VDD = 2.5V
TA = 25°C
–3.0
10k
100k
1M
10M
100M
FREQUENCY (Hz)
14327-003
–2.8
Figure 3. Insertion Loss vs. Frequency
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 78 1.32 9.47 00
©2016 Analog Devices, Inc. All rights reserved.
Technica l Support
www.analog.com
ADG901-EP
Enhanced Product
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Enhanced Product Features ............................................................ 1
Thermal Resistance .......................................................................5
Applications ....................................................................................... 1
ESD Caution...................................................................................5
General Description ......................................................................... 1
Pin Configurations and Function Descriptions ............................6
Functional Block Diagram .............................................................. 1
Typical Performance Characteristics ..............................................7
Product Highlights ........................................................................... 1
Terminology .......................................................................................9
Revision History ............................................................................... 2
Test Circuits ..................................................................................... 10
Specifications..................................................................................... 3
Outline Dimensions ....................................................................... 11
Continous Current Per Channel ................................................ 4
Ordering Guide .......................................................................... 11
REVISION HISTORY
12/2016—Rev. 0 to Rev. A
Change to Product Title ................................................................... 1
9/2016—Revision 0: Initial Version
Rev. A | Page 2 of 11
Enhanced Product
ADG901-EP
SPECIFICATIONS
VDD = 1.65 V to 2.75 V, GND = 0 V, input power = 0 dBm, temperature range = −55°C to +125°C, unless otherwise noted.
Table 1.
Parameter
AC ELECTRICAL CHARACTERISTICS
−3 dB Frequency 2
Insertion Loss
Symbol
Test Conditions/Comments
S21 , S12
DC to 100 MHz; VDD = 2.5 V ± 10%, see
Figure 19
500 MHz; VDD = 2.5 V ± 10%
1000 MHz; VDD = 2.5 V ± 10%
100 MHz
500 MHz
1000 MHz
DC to 100 MHz
500 MHz
1000 MHz
DC to 100 MHz
500 MHz
1000 MHz
50% CTRL to 90% RF, see Figure 16
50% CTRL to 10% RF, see Figure 16
10% to 90% RF, see Figure 17
90% to 10% RF, see Figure 17
900 MHz/901 MHz, 4 dBm, see Figure 21
See Figure 20
Isolation—RF1 to RF2
S21 , S12
Return Loss (On Channel)2
S11 , S22
Return Loss (Off Channel)2
S11 , S22
On Switching Time 2
Off Switching Time 2
Rise Time 2
Fall Time 2
Third-Order Intermodulation Intercept
Video Feedthrough 3
INPUT POWER
1 dB Input Compression 4
DC ELECTRICAL CHARACTERISTICS
Input High Voltage
Input Low Voltage
Input Leakage Current
CAPACITANCE2
RF1/RF2, RF Port On Capacitance
CTRL Input Capacitance
POWER REQUIREMENTS
VDD
Quiescent Power Supply Current
t ON
t OFF
t RISE
t FALL
IP3
Min
55
40
31
18
15
28.5
Typ 1
Max
Unit
4.5
0.4
0.7
GHz
dB
0.6
0.8
61
45
38
28
25
20
23
21
19
4
6.5
3.1
6.0
36
2.5
P1dB
1000 MHz; see Figure 22
VINH
VINH
VINL
VINL
VDD = 2.25 V to 2.75 V
VDD = 1.65 V to 1.95 V
VDD = 2.25 V to 2.75 V
VDD = 1.65 V to 1.95 V
II
0 ≤ VIN ≤ 2.75 V
±0.1
CRF on
CCTRL
f = 1 MHz
f = 1 MHz
1.2
2.1
I DD
Digital inputs = 0 V or VDD
6.5
10.5
5.5
9.5
17
0.1
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
ns
ns
ns
ns
dBm
mV p-p
dBm
1.7
0.65 VDD
1.65
1
1
1.25
0.7
0.35
VDD
±1
V
V
V
V
µA
pF
pF
2.75
2.5
V
µA
Typical values are at VDD = 2.5 V and 25°C, unless otherwise specified.
Guaranteed by design, not subject to production test.
Video feedthrough is the dc transience at the output of any port of the switch when the control voltage is switched from high to low or low to high in a 50 Ω test
setup, measured with 1 ns rise time pulses and 500 MHz bandwidth.
4 For less than 100 MHz, refer to the AN-952 Application Note for more information about power handling.
2
3
Rev. A | Page 3 of 11
ADG901-EP
Enhanced Product
CONTINOUS CURRENT PER CHANNEL
Table 2.
Parameter
CONTINUOUS CURRENT PER CHANNEL 1
VDD = 2.75 V, VSS = 0 V
VDD = 1.65 V, VSS = 0 V
1
25°C
85°C
105°C
125°C
Unit
70
56
7
7
3.85
3.85
2.8
2.8
mA maximum
mA maximum
Guaranteed by design, not subject to production test.
Rev. A | Page 4 of 11
Test Conditions/Comments
8-lead LFCSP, θJA = 48°C/W, dc bias = 0.5 V
Enhanced Product
ADG901-EP
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise specified.
THERMAL RESISTANCE
Table 3.
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Parameter
VDD to GND1
Inputs to GND1, 2
Continuous Current
Input Power 4
Operating Temperature Range (Industrial)
Storage Temperature Range
Junction Temperature
Lead Temperature, Soldering (10 sec)
IR Reflow, Peak Temperature (<20 sec)
ESD
Rating
−0.5 V to +4 V
−0.5 V to VDD + 0.3 V
Data3 + 15%
18 dBm
−55°C to +125°C
−65°C to +150°C
150°C
300°C
235°C
1 kV
Table 4. Thermal Resistance
Package Type
CP-8-13 1
1
θJA
48
θJC
1
Unit
°C/W
Test condition: thermal impedance simulated values are based on
JEDEC 2S2P thermal test board with four thermal vias. See JEDEC JESD51.
ESD CAUTION
1
Tested at 125°C.
When RF1 and RF2 are in the open position, the input to ground rating is
−0.5 V to VDD − 0.5 V.
3 See Table 2.
4 The switch is tested in both the open and closed positions. In the closed
condition, power is applied to RF1, and RF2 is terminated to a 50 Ω resistor
to GND. In the open condition, power is applied to RF1 and RF2.
2
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. A | Page 5 of 11
ADG901-EP
Enhanced Product
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VDD 1
GND 3
RF1 4
8 RF2
ADG901-EP
TOP VIEW
(Not to Scale)
7 GND
6 GND
5 GND
NOTES
1. THE LFCSP PACKAGE HAS AN EXPOSED
PAD. THE EXPOSED PAD MUST BE TIED
TO THE SUBSTRATE, GND.
14327-004
CTRL 2
Figure 4. 8-Lead LFCSP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
1
2
Mnemonic
VDD
CTRL
3, 5, 6, 7
4
8
GND
RF1
RF2
EPAD
Description
Power Supply Input. These devices can be operated from 1.65 V to 2.75 V; decouple VDD to GND.
CMOS or LVTTL Logic Level. CTRL input must not exceed VDD.
Logic 0: RF1 isolated from RF2.
Logic 1: RF1 to RF2.
Ground Reference Point for All Circuitry on the Device.
RF1 Port.
RF2 Port.
Exposed Pad. The LFCSP package has an exposed pad. The exposed pad must be tied to the substrate, GND.
Table 6. Truth Table
CTRL
0
1
Signal Path
RF1 isolated from RF2
RF1 to RF2
Rev. A | Page 6 of 11
Enhanced Product
ADG901-EP
TYPICAL PERFORMANCE CHARACTERISTICS
0
–0.4
TA = +25°C
–0.6
–0.5
VDD = 2.5V
VDD = 2.25V
–1.0
INSERTION LOSS (dB)
INSERTION LOSS (dB)
–0.8
TA = –55°C
–1.2
–1.4
–1.6
–1.8
–2.0
VDD = 2.75V
–2.2
TA = +125°C
–1.0
TA = +85°C
–1.5
–2.0
–2.4
–2.6
100k
1M
10M
100M
1G
10G
FREQUENCY (Hz)
VDD = 2.5V
–3.0
10k
100k
–0.40
–0.50
INSERTION LOSS (dB)
VDD = 2.25V
ISOLATION (dB)
–0.60
VDD = 2.75V
–0.65
–0.70
–0.75
–0.80
–0.85
–0.90
TA = 25°C
–1.00
10k
100k
1M
10M
100M
1G
10G
FREQUENCY (Hz)
14327-006
0
–5 TA = 25°C
–10
–15
–20
–25
–30
–35
–40
–45
–50
–55
–60
–65
–70
–75
–80
–85
–90
–95
–100
10k
100k
VDD = 2.5V
VDD = 1.8V
1M
10M
100M
1G
10G
Figure 9. Off Isolation vs. Frequency over Supplies (S12 and S21)
–0.4
0
–0.6
VDD = 2.5V
–10
–0.8
–20
VDD = 1.95V
VDD = 1.8V
–1.2
ISOLATION (dB)
–30
–1.4
–1.6
–1.8
–2.0
VDD = 1.65V
–2.2
–2.4
–3.0
10k
–50
–60
–80
–2.6
–2.8
–40
–90
TA = 25°C
100k
1M
10M
100M
1G
TA = +125°C
TA = +85°C
–70
10G
FREQUENCY (Hz)
14327-007
INSERTION LOSS (dB)
10G
FREQUENCY (Hz)
Figure 6. Insertion Loss vs. Frequency over Supplies (S12 and S21)
(Zoomed Figure 5 Plot)
–1.0
1G
Figure 7. Insertion Loss vs. Frequency over Supplies (S12 and S21)
–100
10k
TA = +25°C
TA = –55°C
100k
1M
10M
100M
1G
10G
FREQUENCY (Hz)
Figure 10. Off Isolation vs. Frequency over Temperature (S12 and S21)
Rev. A | Page 7 of 11
14327-010
–0.95
100M
Figure 8. Insertion Loss vs. Frequency over Temperature (S12 and S21)
–0.45
VDD = 2.5V
10M
FREQUENCY (Hz)
Figure 5. Insertion Loss vs. Frequency over Supplies (S12 and S21)
–0.55
1M
14327-009
–3.0
10k
14327-008
–0.5
TA = 25°C
14327-005
–2.8
ADG901-EP
0
40
TA = 25°C
VDD = 2.5V
35
30
–10
IP3 (dBm)
25
–15
OFF SWITCH
–20
20
15
–25
10
–35
10k
100k
1M
VDD = 2.5V
TA = 25°C
5
ON SWITCH
10M
100M
1G
10G
0
250
FREQUENCY (Hz)
350
450
550
650
750
850
FREQUENCY (MHz)
Figure 11. Return Loss vs. Frequency (S11)
14327-014
–30
14327-011
RETURN LOSS (dB)
–5
Enhanced Product
Figure 14. IP3 vs. Frequency
20
18
CH1
16
P–1dB (dBm)
14
CH2
12
10
8
6
4
0
14327-012
tRISE = 2.8ns
tFALL = 5.1ns
CH1 = CTRL = 1V/DIV
CH2 = RFx = 100mV/DIV
500
750
1000
1250
Figure 15. P1dB vs. Frequency (DC Bias Not Used)
1
CTRL
RFx
2
10.0ns
14327-013
CH2 pk-pk
2.016mV
CH2 1mV
250
FREQUENCY (MHz)
Figure 12. Switch Timing
CH1 500mV
0
Figure 13. Video Feedthrough
Rev. A | Page 8 of 11
1500
14327-015
VDD = 2.5V
TA = 25°C
2
Enhanced Product
ADG901-EP
TERMINOLOGY
tFALL
Fall time. Time for the RF signal to fall from 90% to 10% of the
on level.
V DD
Most positive power supply potential.
I DD
Positive supply current.
Off Isolation
The attenuation between input and output ports of the switch
when the switch control voltage is in the off condition.
GND
Ground (0 V) reference.
Insertion Loss
The attenuation between input and output ports of the switch
when the switch control voltage is in the on condition.
CTRL
Logic control input.
V INL
Maximum input voltage for Logic 0.
P1dB
1 dB compression point. The RF input power level at which the
switch insertion loss increases by 1 dB over its low level value. It
is a measure of how much power the on switch can handle
before the insertion loss increases by 1 dB.
V INH
Minimum input voltage for Logic 1.
I INL (I INH)
Input current of the digital input.
CIN
Digital input capacitance.
tON
Delay between applying the digital control input and the output
switching on.
tOFF
Delay between applying the digital control input and the output
switching off.
tRISE
Rise time. Time for the RF signal to rise from 10% to 90% of the
on level.
IP3
Third-order intermodulation intercept. This is a measure of the
power in false tones that occur when closely spaced tones are
passed through a switch, whereby the nonlinearity of the switch
causes these false tones to be generated.
Return Loss
The amount of reflected power relative to the incident power at
a port. Large return loss indicates good matching. By measuring
return loss the VSWR can be calculated from conversion charts.
voltage standing wave ratio (VSWR) indicates the degree of
matching present at a switch RF port.
Video Feedthrough
The spurious signals present at the RF ports of the switch when
the control voltage is switched from high to low or low to high
without an RF signal present.
Rev. A | Page 9 of 11
ADG901-EP
Enhanced Product
TEST CIRCUITS
VDD
VDD
0.1µF
0.1µF
VDD
VS
VDD
VOUT
RF2
RL
50Ω
CTRL
ADG901-EP
50%
50%
VCTRL
OSCILLOSCOPE
RF1
RF2
10%
90%
VOUT
tON
50Ω
14327-016
GND
tOFF
NC
50Ω
CTRL
GND
Figure 16. Switching Timing: tON, tOFF
VCTRL
14327-020
RF1
VDD
0.1µF
Figure 20. Video Feedthrough
VDD
RF1
50%
RL
50Ω
CTRL
0.1µF
50%
VCTRL
VOUT
90%
10%
90%
RF
SOURCE
10%
VDD
tFALL
tRISE
14327-017
GND
ADG901-EP
SPECTRUM
ANALYZER
COMBINER
RF1
Figure 17. Switch Timing: tRISE, tFALL
50Ω
VDD
50Ω
RF
SOURCE
CTRL
0.1µF
RL
50Ω
VDD
RF1
VCTRL
VOUT
Figure 21. IP3
VDD
50Ω
RF2
0.1µF
VS
50Ω
14327-021
GND
ADG901-EP
50Ω
NETWORK
ANALYZER
CTRL
VDD
VCTRL
OFF ISOLATION = 20 LOG
14327-018
GND
VOUT
VS
SPECTRUM
ANALYZER
ADG901-EP
RF2
RF1
50Ω
50Ω
VDD
CTRL
0.1µF
GND
RL
50Ω
VDD
VCTRL
VOUT
Figure 22. P1dB
ADG901-EP
RF1
50Ω
RF2
VS
50Ω
50Ω
RF
SOURCE
VS
Figure 18. Off Isolation
NETWORK
ANALYZER
CTRL
VOUT
INSERTION LOSS = 20 LOG
VS
14327-019
GND
VCTRL
RF2
Figure 19. Insertion Loss
Rev. A | Page 10 of 11
14327-022
VS
VDD
VOUT
RF2
Enhanced Product
ADG901-EP
OUTLINE DIMENSIONS
1.84
1.74
1.64
PIN 1 INDEX
AREA
1.55
1.45
1.35
EXPOSED
PAD
0.50
0.40
0.30
0.80
0.75
0.70
SIDE VIEW
0.30
0.25
0.20
1
4
BOTTOM VIEW
TOP VIEW
SEATING
PLANE
0.50 BSC
8
5
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.203 REF
PIN 1
INDICATOR
(R 0.15)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-229-WEED-4
05-11-2016-A
3.10
3.00 SQ
2.90
Figure 23. 8-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
(CP-8-13)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADG901SCPZ-EP
ADG901SCPZ-EP-RL7
1
Temperature Range
−55°C to +125°C
−55°C to +125°C
Package Description
8-Lead Lead Frame Chip Scale Package [LFCSP]
8-Lead Lead Frame Chip Scale Package [LFCSP]
Z = RoHS Compliant Part.
©2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D14327-0-12/16(A)
Rev. A | Page 11 of 11
Package Option
CP-8-13
CP-8-13
Branding
S4K
S4K
Similar pages