INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4052B MSI Dual 4-channel analogue multiplexer/demultiplexer Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification HEF4052B MSI Dual 4-channel analogue multiplexer/demultiplexer DESCRIPTION The HEF4052B is a dual 4-channel analogue multiplexer/demultiplexer with common channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs (Y0 to Y3) and a common input/output (Z). The common channel select logic includes two address inputs (A0 and A1) and an active LOW enable input (E). VDD and VSS are the supply voltage connections for the digital control inputs (A0, A1 and E). The VDD to VSS range is 3 to 15 V. The analogue inputs/outputs (Y0 to Y3, and Z) can swing between VDD as a positive limit and VEE as a negative limit. VDD − VEE may not exceed 15 V. Both multiplexers/demultiplexers contain four bidirectional analogue switches, each with one side connected to an independent input/output (Y0 to Y3) and the other side connected to a common input/output (Z). With E LOW, one of the four switches is selected (low impedance ON-state) by A0 and A1. With E HIGH, all switches are in the high impedance OFF-state, independent of A0 and A1. For operation as a digital multiplexer/demultiplexer, VEE is connected to VSS (typically ground). PINNING Y0A to Y3A independent inputs/outputs Y0B to Y3B independent inputs/outputs A0, A1 address inputs E enable input (active LOW) ZA, ZB common inputs/outputs FAMILY DATA, IDD LIMITS category MSI See Family Specifications Fig.2 Pinning diagram. HEF4052BP(N): 16-lead DIL; plastic (SOT38-1) HEF4052BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4052BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America Fig.1 Functional diagram. January 1995 2 Philips Semiconductors Product specification HEF4052B MSI Dual 4-channel analogue multiplexer/demultiplexer Fig.3 Schematic diagram (one switch). FUNCTION TABLE INPUTS A0 CHANNEL ON E A1 L L L Y0A−ZA; Y0B−ZB L L H Y1A−ZA; Y1B−ZB L H L Y2A−ZA; Y2B−ZB L H H Y3A−ZA; Y3B−ZB H X X none Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Supply voltage (with reference to VDD) VEE −18 to + 0,5 V Note 1. To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDD current will flow out of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDD or VEE. January 1995 3 Philips Semiconductors Product specification Dual 4-channel analogue multiplexer/demultiplexer Fig.4 Logic diagram. January 1995 4 HEF4052B MSI Philips Semiconductors Product specification HEF4052B MSI Dual 4-channel analogue multiplexer/demultiplexer DC CHARACTERISTICS Tamb = 25 °C VDD−VEE V SYMBOL TYP. MAX. 350 2500 Ω 80 245 Ω 15 60 175 Ω 5 115 340 Ω 50 160 Ω 15 40 115 Ω 5 120 365 Ω 65 200 Ω 15 50 155 Ω ‘∆’ ON resistance 5 25 − Ω between any two 10 10 − Ω channels 15 5 − Ω 5 − − nA 5 ON resistance ON resistance ON resistance OFF-state leakage 10 10 10 RON RON RON ∆RON CONDITIONS current, all 10 − − nA channels OFF 15 − 1000 nA 5 − − nA − − nA − 200 nA OFF-state leakage current, any 10 channel 15 IOZZ IOZY Vis = 0 to VDD−VEE see Fig.6 Vis = 0 see Fig.6 Vis = VDD−VEE see Fig.6 Vis = 0 to VDD−VEE see Fig.6 E at VDD E at VSS Fig.5 Operating area as a function of the supply voltages. January 1995 5 Philips Semiconductors Product specification Dual 4-channel analogue multiplexer/demultiplexer Fig.6 Test set-up for measuring RON. Iis = 200 µA VSS = VEE = 0 V Fig.7 Typical RON as a function of input voltage. January 1995 6 HEF4052B MSI Philips Semiconductors Product specification HEF4052B MSI Dual 4-channel analogue multiplexer/demultiplexer AC CHARACTERISTICS VEE = VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns VDD V TYPICAL FORMULA FOR P (µW) 5 1 300 fi + ∑(foCL) × VDD2 where dissipation per 10 6 100 fi + ∑(foCL) × VDD fi = input freq. (MHz) package (P) 15 15 600 fi + ∑(foCL) × VDD2 Dynamic power 2 fo = output freq. (MHz) CL = load capacitance (pF) ∑(foCL) = sum of outputs VDD = supply voltage (V) AC CHARACTERISTICS VEE = VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns VDD V SYMBOL TYP. MAX. 10 20 ns Propagation delays Vis → Vos HIGH to LOW LOW to HIGH An → Vos HIGH to LOW LOW to HIGH 5 10 tPHL 5 10 ns 15 5 10 ns 5 10 20 ns 10 tPLH 5 10 ns 15 5 10 ns 5 150 305 ns 10 tPHL 65 135 ns 15 50 100 ns 5 150 300 ns 75 150 ns 15 50 100 ns 5 95 190 ns 10 tPLH note 1 note 1 note 2 note 2 Output disable times E → Vos HIGH LOW 90 180 ns 15 90 180 ns 5 100 205 ns 90 180 ns 90 180 ns 130 260 ns 55 115 ns 45 85 ns 10 10 tPHZ tPLZ 15 note 3 note 3 Output enable times E → Vos 5 HIGH 10 tPZH 15 5 LOW 10 tPZL 15 January 1995 7 120 240 ns 50 100 ns 35 75 ns note 3 note 3 Philips Semiconductors Product specification HEF4052B MSI Dual 4-channel analogue multiplexer/demultiplexer VDD V Distortion, sine-wave response SYMBOL TYP. 5 MAX. 0,25 % 10 0,04 % 15 0,04 % 5 − MHz 10 1 MHz 15 − MHz 5 − mV or address input 10 50 mV to output 15 − mV 5 − MHz 10 1 MHz 15 − MHz 5 13 MHz 10 40 MHz 15 70 MHz Crosstalk between any two channels Crosstalk; enable OFF-state feed-through ON-state frequency response note 4 note 5 note 6 note 7 note 8 Notes Vis is the input voltage at a Y or Z terminal, whichever is assigned as input. Vos is the output voltage at a Y or Z terminal, whichever is assigned as output. 1. RL = 10 kΩ to VEE; CL = 50 pF to VEE; E = VSS; Vis = VDD (square-wave); see Fig.8. 2. RL = 10 kΩ; CL = 50 pF to VEE; E = VSS; An = VDD (square-wave); Vis = VDD and RL to VEE for tPLH; Vis = VEE and RL to VDD for tPHL; see Fig.8. 3. RL = 10 kΩ; CL = 50 pF to VEE; E = VDD (square-wave); Vis = VDD and RL to VEE for tPHZ and tPZH; Vis = VEE and RL to VDD for tPLZ and tPZL; see Fig.8. 4. RL = 10 kΩ; CL = 15 pF; channel ON; Vis = 1⁄2 VDD (p-p) (sine-wave, symmetrical about 1⁄2 VDD); fis = 1 kHz; see Fig.9. 5. RL = 1 kΩ; Vis = 1⁄2 VDD (p-p) (sine-wave, symmetrical about 1⁄2 VDD); V os 20 log --------- = – 50 dB; see Fig. 10. V is 6. RL = 10 kΩ to VEE; CL = 15 pF to VEE; E or An = VDD (square-wave); crosstalk is Vos (peak value); see Fig.8. 7. RL = 1 kΩ; CL = 5 pF; channel OFF; Vis = 1⁄2 VDD (p-p) (sine-wave, symmetrical about 1⁄2 VDD); V os 20 log --------- = – 50 dB; see Fig. 9. V is 8. RL = 1 kΩ; CL = 5 pF; channel ON; Vis = 1⁄2 VDD (p-p) (sine-wave, symmetrical about 1⁄2 VDD); V os 20 log --------- = – 3 dB; see Fig. 9. V is January 1995 8 Philips Semiconductors Product specification HEF4052B MSI Dual 4-channel analogue multiplexer/demultiplexer Fig.8 Fig.9 (a) (b) Fig.10 APPLICATION INFORMATION Some examples of applications for the HEF4052B are: • Analogue multiplexing and demultiplexing. • Digital multiplexing and demultiplexing. • Signal gating. NOTE If break before make is needed, then it is necessary to use the enable input. January 1995 9