FAN6862W Highly Integrated Green-Mode PWM Controller Features Description Low Standby Power: Under 0.1 W PWM Frequency Continuously Decreasing with Burst Mode at Light Loads VDD Over-Voltage Protection (OVP) A highly integrated PWM controller, FAN6862W provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary Green Mode provides offtime modulation to continuously decrease the switching frequency under light-load conditions. Under zero-load conditions, the power supply enters Burst Mode, which completely shuts off PWM output. Output restarts just before the supply voltage drops below the UVLO lower limit. Green Mode enables power supplies to meet international power conservation requirements. Feedback Open-Loop Protection: 60 ms Delay Low Startup Current: 8 µA Low Operating Current in Green Mode: 600 µA Peak-Current Mode Operation with Cycle-by-Cycle Current Limiting Constant Output Power Limit (Full AC Input Range) Internal Latch Circuit (FAN6862WL) for OVP, OTP Fixed PWM Frequency (65 KHz) with Frequency Hopping GATE Output Maximum Voltage Clamp: 13.5V Soft-Start Time: 5 ms The FAN6862W is designed for SMPS and integrates a frequency-hopping function that helps to reduce EMI emission of a power supply with minimum line filters. To compensate the power limit variation over universal input range, a bias current limit (VLIMIT) adaptively keeps the power limit substantially constant. The gate output is clamped at 13.5 V to protect the external MOSFET from over-voltage damage. Other protection functions include VDD Over-Voltage Protection (OVP), and Over-Temperature Protection (OTP). For OTP, an external NTC thermistor can be applied to sense the ambient temperature. When VDD OVP or OTP is activated, an internal latch circuit latches off the controller. Protection types are shown in Table 1. Soft Driving for EMI Improvement Full Range Frequency Hopping Internal OTP Sensor with Hysteresis Gate Driving Capability: 400 mA Table 1. Protection Type Applications General-purpose switched-mode power supplies and flyback power converters, including: Power Adapters Open-Frame SMPS Part Number OVP OLP OTP / OTP2 FAN6862W Latch A/R Latch FAN6862WL Latch Latch Latch FAN6862WR A/R A/R A/R SMPS with Surge-Current Output, such as for Printers, Scanners, Motor Drivers Ordering Information Part Number Operating Temperature Range Package Packing Method -40 to +105°C 6-Lead, SOT23, JEDEC MO-178 Variation AB, 1.6 mm Wide Tape & Reel FAN6862WTY FAN6862WLTY FAN6862WRTY © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com FAN6862W — Highly Integrated Green-Mode PWM Controller September 2012 Figure 1. Typical Application Block Diagram FAN6862W — Highly Integrated Green-Mode PWM Controller Typical Application Figure 2. Block Diagram © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 2 FAN6862W — Highly Integrated Green-Mode PWM Controller Marking Information Axx: ABY: FAN6862WTY ABZ: FAN6862WRTY ACA: FAN6862WLTY TT: Wafer Lot Code : Year Code _ _ _: Week Code Figure 3. Top Mark Pin Configuration Figure 4. Pin Configuration Pin Definitions Pin # Name Function 1 GND Ground Description Ground 2 FB Feedback The FB pin provides the output voltage regulation signal. It provides feedback to the internal PWM comparator, so the PWM comparator can control the duty cycle. This pin also provides over-current protection. IF VFB is higher than the trigger level and persists at that level, the controller stops and restarts. 3 RT Temperature Detection An external NTC thermistor is connected from this pin to the GND pin. The impedance of the NTC decreases at high temperatures. If the voltage of the RT pin drops below the threshold, PWM output is disabled. 4 This pin senses the voltage across a resistor. When the voltage reaches the internal threshold, PWM output is disabled and this activates over-current SENSE Current Sense protection. This pin also provides current amplitude information for Current Mode control. 5 VDD 6 GATE Power Supply Power supply Driver Output The totem-pole output driver for driving the power MOSFET © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are given with respect to GND pin. Symbol VDD Parameter Supply Voltage VL Input Voltage to FB, SENSE, and RT Pins ΘJA Thermal Resistance (Junction-to-Ambient) TJ TSTG TL ESD Min. -0.3 Max. Unit 30 V 7.0 V 244 °C/W Operating Junction Temperature -40 +125 °C Storage Temperature Range -55 +150 °C +260 °C Lead Temperature, Wave Soldering, 10 Seconds Human Body Model, JESD22-A114 5.5 Charge Device Model, JESD22-C101 2.0 kV Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Operating Ambient Temperature © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 Min. Max. Unit -40 +105 °C FAN6862W — Highly Integrated Green-Mode PWM Controller Absolute Maximum Ratings www.fairchildsemi.com 4 VDD = 15 V and TA = 25°C, unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit 20 V VDD Section VDD-OP Continuously Operating Voltage VDD-ON Turn-On Threshold Voltage 15 16 17 V VDD-OFF Turn-Off Voltage 6.5 7.0 7.5 V VDD-LH Threshold Voltage for Latch-Off Release FAN6862W, FAN6862WL Only 4 IDD-ST Startup Current VDD-ON – 0.16 V 8 IDD-OP1 Operating Supply Current in PWM Operation VDD = 20 V, VFB = 3 V Gate Open IDD-OP2 Operating Supply Current when VFB < VFB-ZDC VDD = 15 V, VFB < VFB-ZDC VDD-OVP VDD Over-Voltage Protection FAN6862WL-Latch, FAN6862WR-Auto Restart tD-VDDOVP VDD OVP Debounce Time IDD-LH V 15 µA 2 mA 600 21.0 22.2 µA 23.5 50 VDD = 5 V; FAN6862W, FAN6862WL Only Latch-Off Holding Current V µs 70 80 µA 1/3.5 1/3.0 V/V Feedback Input Section AV Input-Voltage to Current-Sense Attenuation ZFB Input Impedance 1/4.0 17 kΩ VFB-OPEN FB Pin Open Voltage 5.2 5.4 5.6 V VFB-OLP Threshold Voltage for Open-Loop Protection 4.3 4.6 4.9 V tD-OLP Open-Loop Protection Delay VFB > VFB-OLP, tON > 2.5 µs, TA = -40 to +105°C 54 60 66 ms tD-SCP Secondary Short-Circuit Protection Delay FB > VFB-OLP, tON < 2.5 µs, TA = -40 to +105°C 6 7 8 ms tON-SCP Short-Circuit Protection On-Time Detection VFB>VFB-OLP, TA = -40 to +105°C 2.5 FAN6862W — Highly Integrated Green-Mode PWM Controller Electrical Characteristics µs Current Sense Section tPD Delay to Output tLEB Leading-Edge Blanking Time 100 200 250 250 ns ns VLIMIT-H High Threshold Voltage for Current Limit Duty>55% 0.57 0.60 0.63 V VLIMIT-L Low Threshold Voltage for Current Limit Duty = 0% 0.36 0.39 0.42 V Startup Time 4.75 5.00 10.00 ms tSOFT-START Period During Startup Time Continued on the following page… © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 5 VDD = 15 V and TA = 25°C, unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. 60 65 68 Unit Oscillator Section Center Frequency VFB > VFB-N fOSC Normal PWM Frequency VFB ≥ VFB-N Hopping Range VFB = VFB-G ±4.0 (1) kHz ±2.9 thop-1 Hopping Period 1(1) VFB ≥ VFB-N 4.4 ms thop-3 (1) Hopping Period 3 VFB = VFB-G 11.5 ms fOSC-G Green Mode Minimum Frequency VFB-N VFB-G VFB-ZDC VFB-ZDCR VFB-ZDC 18 22 26 kHz FB Threshold Voltage for Frequency Reduction 2.35 2.50 2.65 V FB Voltage at fOSC-G 2.05 2.20 2.30 V FB Threshold Voltage for Zero-Duty 1.6 V ZDC Hysteresis 0.15 V fDV Frequency Variation vs. VDD Deviation VDD = 7.5 V to 21 V fDT Frequency Variation vs. Temperature Deviation(1) TA = -40 to +105°C 0.5 2.0 % 2 % Continued on following page… FAN6862W — Highly Integrated Green-Mode PWM Controller Electrical Characteristics (Continued) PWM Frequency fOSC fOSC-G VFB-ZDC VFB-ZDCR VFB-G VFB-N VFB Figure 5. PWM Frequency © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 6 VDD = 15 V and TA = 25°C, unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit 60 70 75 % 1.5 V PWM Output Section DCYMAX Maximum Duty Cycle VOL Output Voltage LOW VDD = 15 V, IO = 50 mA VOH Output Voltage HIGH VDD = 8 V, IO = 50 mA tR Rising Time (with Soft Driving) GATE = 1 nF 150 ns tF Falling Time GATE = 1 nF 35 ns VCLAMP IO-SOURCE IO-SINK 6 12.0 V Gate Output Clamping Voltage VDD = 20 V Gate Source Driving Capability(1) VDD = 15 V 13.5 400 15.0 mA V Gate Sink Driving Capability(1) VDD = 15 V 400 mA Over-Temperature Protection (OTP) Section RRT Maximum External Resistance of RT Pin to Trigger Protection VOTP Threshold Voltage for Over-Temperature Protection IRT FAN6862W, FAN6862WL-Latch, FAN6862WR-Auto Restart, at 25°C Output Current of RT Pin tDOTP Over-Temperature Debounce Time VFB=VFB-N VOTP2 Second Threshold Voltage for OverTemperature Protection FAN6862W, FAN6862WL-Latch, FAN6862WR-Auto Restart, at 25°C tDOTP2 Second Over-Temperature Debounce Time TOTP Protection Junction Temperature(1,2) TRestart Restart Junction Temperature (1,3) 9 10 11 kΩ 0.94 1.00 1.06 V 92 100 108 μA 14 17 19 ms 0.65 0.70 0.75 V 80 135 200 µs +135 °C TOTP25 °C FAN6862W — Highly Integrated Green-Mode PWM Controller Electrical Characteristics (Continued) Notes: 1. Guarantee by design. 2. When activated, the output is disabled and the latch is turned off. 3. The threshold temperature for enabling the output again and resetting the latch after OTP has been activated. © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 7 Figure 6. Turn-On Threshold Voltage (VDD-ON) vs. Temperature Figure 7. Turn-Off Threshold Voltage (VDD-OFF) vs. Temperature Figure 8. Operating Current (IDD-OP2) vs. Temperature Figure 9. VDD Over-Voltage Protection (VDD-OVP) vs. Temperature Figure 10. Center Frequency (fOSC) vs. Temperature Figure 11. FB Threshold Voltage for Frequency Reduction (VFB-N) vs. Temperature © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 FAN6862W — Highly Integrated Green-Mode PWM Controller Typical Performance Characteristics www.fairchildsemi.com 8 Figure 12. FB Voltage at fOSC-G (VFB-G) vs. Temperature Figure 13. Threshold Voltage for Open-Loop Protection (VFB-OLP) vs. Temperature Figure 14. Open-Loop Protection Delay (tD-OLP) vs. Temperature Figure 15. Flat Threshold Voltage for Current Limit (VLIMIT-H) vs. Temperature Figure 16. Valley Threshold Voltage for Current Limit (VLIMIT-L) vs. Temperature Figure 17. GATE Output Clamping Voltage (VCLAMP) vs. Temperature © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 FAN6862W — Highly Integrated Green-Mode PWM Controller Typical Performance Characteristics (Continued) www.fairchildsemi.com 9 Figure 18. Maximum Duty Cycle (DCYMAX) vs. Temperature Figure 19. Leading-Edge Blanking Time (tLEB) vs. Temperature Figure 20. Rising Time (tR) vs. Temperature Figure 21. Falling Time (tF) vs. Temperature Figure 22. Output Current of RT Pin (IRT) vs. Temperature Figure 23. Maximum External Resistance of RT Pin to Trigger Protection (RRT) vs. Temperature © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 FAN6862W — Highly Integrated Green-Mode PWM Controller Typical Performance Characteristics (Continued) www.fairchildsemi.com 10 FAN6862W — Highly Integrated Green-Mode PWM Controller Operation Description Startup Operation Figure 24 shows a typical startup circuit and transformer auxiliary winding for a typical application. Before switching operation begins, FAN6862W consumes only startup current (typically 8 µA) and the current supplied through the startup resistor charges the VDD capacitor (CDD). When VDD reaches turn-on voltage of 16 V (VDDON), switching begins and the current consumed increases to 2 mA. Power is then supplied from the transformer auxiliary winding. The large hysteresis of VDD (7 V) provides more holdup time, which allows using a small capacitor for VDD. The startup resistor is typically connected to AC line for a fast reset of latch protection. Figure 25. PWM Frequency Figure 24. Startup Circuit Green-Mode Operation Figure 26. Burst-Mode Operation The FAN6862W uses feedback voltage (VFB) as an indicator of the output load and modulates the PWM frequency, as shown in Figure 25, such that the switching frequency decreases as load decreases. In heavy-load conditions, the switching frequency is 65 kHz. Once VFB decreases below VFB-N (2.5 V), the PWM frequency starts to linearly decrease from 65 kHz to 22.5 kHz to reduce the switching losses. As VFB decreases below VFB-G (2.2 V), the switching frequency is fixed at 22.5 kHz and FAN6862W enters “deep” Green Mode, where the operating current decreases to 600 µA (maximum), further reducing the standby power consumption. As VFB decreases below VFB-ZDC (1.6V), FAN6862W enters Burst-Mode operation. When VFB drops below VFB-ZDC, switching stops and the output voltage starts to drop, which causes the feedback voltage to rise. Once VFB rises above VFB-ZDC, switching resumes. Burst Mode alternately enables and disables switching, thereby reducing switching loss in Standby Mode, as shown in Figure 26. Frequency Hopping EMI reduction is accomplished by frequency hopping, which spreads the energy over a wider frequency range than the bandwidth measured by the EMI test equipment. An internal frequency-hopping circuit changes the switching frequency between 61.0 kHz and 69.0 kHz with a period of 4.4 ms, as shown in Figure 27. This covers the whole frequency range and shrinks the period with operation frequency proportionally. Figure 27. Frequency Hopping © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 11 Open-Loop / Overload Protection (OLP) When the upper branch of the voltage divider for the shunt regulator (KA431 shown in Figure 29) is broken, no current flows through the photo-coupler transistor, which pulls up the feedback voltage to 5.4 V. Self-protective functions include VDD Over-Voltage Protection (OVP), Open-Loop / Overload Protection (OLP), Over-Current Protection (OCP), Short-Circuit Protection (SCP) and Over-Temperature Protection (OTP). OLP, OCP and SCP are Auto-Restart Mode protections; OVP and OTP are Latch-Mode protections. When feedback voltage is above 4.6 V for longer than 60 ms, OLP is triggered. This protection is also triggered when the SMPS output drops below the nominal value for longer than 60 ms due to the overload condition. Auto-Restart Mode Protection Once a fault condition is detected, switching is terminated and the MOSFET remains off. This causes VDD to fall because no more power is delivered from auxiliary winding. When VDD falls to VDD-OFF (7 V), the protection is reset and the operating current reduces to startup current, which causes VDD to rise. FAN6862W resumes normal operation when VDD reaches VDD-ON (16 V). In this manner, the auto-restart can alternately enable and disable the switching of the MOSFET until the fault condition is eliminated (see Figure 28). If the secondary output-short situation occurs when the feedback voltage is above 4.6 V, protection time is 7 ms for shorter debounce time. FAN6862W — Highly Integrated Green-Mode PWM Controller Protections Figure 29. OLP Operation VDD Over-Voltage Protection (OVP) VDD over-voltage protection prevents IC damage caused by over voltage on the VDD pin. The OVP is triggered when VDD reaches 22.2 V. A debounce time (typically 50 µs) prevents false triggering by switching noise. Figure 28. Auto Restart Operation Latch-Mode Protection Once this protection is triggered, switching is terminated and the MOSFET remains off. The latch is reset only when VDD is discharged below 4 V by unplugging the AC power line. Over-Temperature Protection (OTP) The OTP circuit is composed of current source and voltage comparators. Typically, an NTC thermistor is connected between the RT and GND pins. If the voltage of this pin drops below a threshold of 1.0 V, PWM output is disabled after tDOTP debounce time. If this pin voltage drops below 0.7 V, it triggers the latch-off protection immediately after tDOTP2 debounce time. Over-Current Protection (OCP) FAN6862W over-current protection is a pulse-by-pulse bias current limit threshold (VLIMIT) that turns off the MOSFET once the sensing voltage of MOSFET drain current reaches the threshold. The VLIMIT compensates the power-limit variation over the universal input range and adaptively keeps the power limit constant. © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 12 Typical Application Circuit (Netbook Adapter by Flyback) Application Fairchild Devices Input Voltage Range Output Netbook Adapter FAN6862W 90~265 VAC 19 V / 2.1A (40 W) Features High efficiency (>85.3% at full-load condition) meeting EPS regulation with enough margin Low standby (pin<0.1 W at no-load condition) Soft-start time: 5 ms 230VAC 50Hz (89.92% Avg.) 115VAC 60Hz (88.75% Avg.) 85.29% (Energy Star V2.0) Figure 30. Measured Efficiency and Power Saving Figure 31. Schematic of Typical Application Circuit © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 13 Core: RM 8 Bobbin: RM 8 Figure 32. Transformer NO Terminal Wire Ts Insulation S F N1 11 10 0.25 • 1 9 3 N2 3 2 0.25 • 1 33 1 COPPER SHIELD 1.2 3 11 N3 Fly- N4 0.5 • 2 12 1 COPPER SHIELD 1.2 3 0.25 • 1 33 4 Fly+ 11 2 Ts 1 CORE ROUNDING TAPE Pin Specification Primary-Side Inductance 3－1 920 µH ±5% Primary-Side Effective Leakage 3－1 15 µH Maximum © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 FAN6862W — Highly Integrated Green-Mode PWM Controller Transformer Specification 3 Remark 100 kHz, 1 V Short One of the Secondary Windings www.fairchildsemi.com 14 FAN6862W — Highly Integrated Green-Mode PWM Controller Physical Dimensions D C 0.15 C A-B 2X SYMM C L 2.9 (0.95) 1.9 (0.95) D A (1.00MIN) 1.4 C D 1.6 2.8 (2.60) (0.70MIN) 0.15 C D 2X 0.15 C PIN 1 INDEX AREA 2X 3 TIPS 0.95 B (1.90) 2X 0.3-0.5 0.20 C A-B D LAND PATTERN RECOMMENDATION SEE DETAIL A 1.45 MAX 1.30 0.90 0.08 0.22 C 0.15 0.05 6X 0.10 C R0.10MIN NOTES: GAGE PLANE A. THIS PACKAGE CONFORMS TO JEDEC MO-178, VARIATION AB. B. ALL DIMENSIONS ARE IN MILLIMETERS. C. DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. D. DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. E. DIMENSIONS AND TOLERANCING AS PER ASME Y14.5M-1994 F. DRAWING FILE NAME: MA06EREV2 R0.10MIN 0.25 8¢X 0¢X 0.60 0.30 SEATING PLANE 0.60 REF DETAIL A SCALE: 2:1 Figure 33. 6-Lead, SOT23, JEDEC MO-178 Variation AB, 1.6 mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 15 FAN6862W — Highly Integrated Green-Mode PWM Controller © 2012 Fairchild Semiconductor Corporation FAN6862W • Rev. 1.0.0 www.fairchildsemi.com 16