Anpec APA2603AJI-TUG 2.8w stereo class-d audio power amplifier and class ab headphone driver Datasheet

APA2603A
2.8W Stereo Class-D Audio Power Amplifier and Class AB Headphone
Driver (DC Volume Control, UVP, AGC Function)
Features
General Description
•
•
Operating Voltage: 3.3V-5.5V
High Efficiency 85% at PO=2.8W, 4Ω Speaker,
The APA2603A is a stereo, high efficiency, filter-free ClassD audio amplifier available in a SOP-24 package.
VDD=5V
Filter-Free Class-D Amplifier
The APA2603A provide the precise DC volume control,
the gain range is from +20dB (V VOLUME =0V) to -80dB
Low Shutdown Current
- IDD=1µA at VDD=5V
(VVOLUME=5V) with 64 steps precise control. It’s easy to get
the suitable amplifier’s gain with the 64 steps gain setting.
64 Steps Volume Adjustable from -80dB to
+20dB by DC Voltage with Hysteresis
The filter-free architecture eliminates the output filters
compared to the traditional Class-D audio amplifier, and
•
•
•
•
•
•
•
•
•
•
•
•
AGC (Non-Clip) Function
- Disable : 0.45VDD~VDD, Floating
reduces the external component counts and the components high, it could save the PCB space, system cost,
- Max, Power : GND
UVP Function
simplifies the design and the power loss at filter.
APA2603A provides an AGC (Non-Clip) function, and this
- Disable : Floating
Output Power at THD+N=1%
BTL Mode
- 2.25W at VDD=5V, RL=4Ω
- 1.3W at VDD=5V, RL=8Ω
SE Mode
- 68mW at VDD=5V, RL=32Ω
Output Power at THD+N=10%
- 2.8W at VDD=5V, RL=4Ω
function can low down the dynamic range for large input
signal. APA2603A can provide from 20dB to -80dB with 64
steps gain decrease for non-clipping function, and this
function can avoid output signal clipping.
The APA2603A also integrates the de-pop circuitry that
reduces the pops and click noises during power on/off or
shutdown enable process.
The APA2603A has build-in over-current and thermal protection that prevent the chip being destroyed by short circuit or over temperature situation.
- 1.6W at VDD=5V, RL=8Ω
Less External Components Required
APA2603A combines a stereo bridge-tied loads (BTL)
mode for speaker drive and a stereo single-end (SE)
Two Output Modes Allowable with BTL and SE
Modes Selected by SE/BTL Pin
mode for headphone drive into a single chip, where both
modes are easily switched by the SE/BTL input control
Input Signal and Headphone Output Signal in
Phase
pin signal.
APA2603A is capable of driving 2.8W at 5V into 4Ω
Thermal and Over-Current Protections with
Auto-Recovery
speaker. The efficiency can archived 85% at RL=4Ω when
PO=2.8W at VDD=5V.
Power Enhanced Packages SOP-24(300mil), Dip24(300mil)
APA2603A is capable of driving 60mW at 5V into 32Ω
Headphone
Lead Free and Green Devices Available
(RoHS Compliant)
Applications
•
•
•
LCD TVs
DVD Player
Active Speakers
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
1
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APA2603A
Simplified Application Circuit
ROUTP
RIN
ROUTN
Stereo Input
Signals
LOUTN
LIN
LOUTP
APA2603A
DC Volume
Control
VOLUME
HP_ROUT
SE/BTL
Signal
SE/BTL
Signal
SE/BTL
HP_LOUT
16 VDD
17 LOUTN
14 HP_LOUT
13 VDD
APA2603A
12 UVP
11 AGC
SE/BTL 10
SOP-24
DIP-24
18 GND
15 LOUTP
Mute 9
SE/BTL 9
AGC 10
UVP 11
VDD 12
ROUTP
VDD
ROUTP 1
ROUTN
GND
HP_ROUT 2
GND
LOUTN
SD 3
VDD
LOUTP
Bypass 4
16 NC
RIN 5
15 HP_ROUT
14 NC
13 HP_LOUT
Volume 8
APA2603A
Top View
24
23
22
21
20
19
18
17
LIN 7
1
2
3
4
5
6
7
8
GND 6
SD
BYPASS
RIN
GND
GND
LIN
VOLUME
MUTE
19 ROUTN
20 VDD
Pin Configuration
QFN4x4-20A
(Top View)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
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APA2603A
Ordering and Marking Information
Package Code
K : SOP-24 J : DIP-24 QA : QFN4x4-20A
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
TU : Tube
Lead Free Code
APA2603A
Lead Free Code
Handling Code
Temperature Range
Package Code
G : Halogen and Lead Free Device
APA2603A K :
APA2603A
XXXXX
XXXXX - Date Code
APA2603A J :
APA2603A
XXXXX
XXXXX - Date Code
APA2603A QA :
A
APA2603
XXXXX
XXXXX - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings (Note 1)
Parameter
Symbol
VDD
TJ
Rating
Supply Voltage (VDD, PVDD, VDC to GND)
-0.3 to 6
Input Voltage (LIN, RIN to GND)
-0.3 to VDD+0.3
Input Voltage (SD, MUTE, AGC, VDC, VOLUME and SE/BTL, BYPASS
to GND)
-0.3 to VDD+0.3
Maximum Junction Temperature
V
150
TSTG
Storage Temperature Range
TSDR
Maximum Soldering Temperature Range, 10 Seconds
PD
Unit
ο
-65 to +150
C
260
Power Dissipation
Internally Limited
W
Note1: Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under
“recommended
operating conditions”is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Thermal Characteristics
Symbol
Parameter
Typical Value
Unit
Thermal Resistance -Junction to Ambient (Note 2)
SOP-24
DIP-24
QFN4x4-20A
θJA
96
50
45
ο
C/W
Thermal Resistance -Junction to Case (Note 3)
SOP-24
18
ο
C/W
50
DIP-24
QFN4x4-20A
7
Note 2: Please refer to “ Layout Recommendation”, the GND PIN on the central of the IC should connect to the ground plan, and the PCB
is a 2-layer, 5-inch square area with 2oz copper thickness.
Note 3: The case temperature is measured at the center of the GND PIN on the underside of the SOP-24 package.
θJC
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
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APA2603A
Recommended Operating Conditions
Symbol
VDD
Parameter
Range
Supply Voltage
3.3 ~ 5.5
SD, MUTE
VIH
High Level Threshold Voltage
Unit
2 ~ VDD
SE/ BTL
V
0.8 VDD ~ VDD
SD, MUTE
0~0.8
SE/BTL
0~1.0
VIL
Low Level Threshold Voltage
VICM
Common Mode Input Voltage
TA
Ambient Temperature Range
-40 ~ 85
TJ
Junction Temperature Range
-40 ~ 125
RL
Speaker Resistance
1 ~ VDD-1
V
ο
C
Ω
3.5 ~
Electrical Characteristics
VDD=5V, VGND=0V, TA= 25οC, Gain=20dB (unless otherwise noted)
Symbol
Parameter
Test Conditions
APA2603A
Min.
Typ.
Max.
Unit
IDD
Supply Current (BTL)
VMUTE=0V, V/SD=5V, No Load
-
6.5
15
mA
IDD
Supply Current (SE)
VMUTE=0V, V/SD=5V, No Load
-
2.5
5
mA
IMUTE
Supply Current (BTL)(MUTE)
VMUTE=5V, V/SD=5V, No Load
-
6.5
15
mA
IMUTE
Supply Current (SE)(MUTE)
VMUTE=5V, V/SD=5V, No Load
-
2.5
5
mA
Supply Current
VMUTE=0V, V/SD=0V, No Load
-
-
1
Input Current
SD, MUTE, VOLUME
-
-
1
400
500
600
kHz
31
36
42
kΩ
51
59
68
kΩ
-
270
-
-
260
-
-
285
-
-
270
-
-
300
-
-
280
-
-
1.2
2
ISD
Ii
FOSC
Oscillator Frequency
Ri
Input Resistance (BTL)
Gain=20dB
Ri
Input Resistance (SE)
Gain=3.5dB
P-channel Power
MOSFET
N-channel Power
MOSFET
P-channel Power
MOSFET
N-channel Power
MOSFET
P-channel Power
MOSFET
N-channel Power
MOSFET
VDD=5.5V,
IL=0.8A
RDSON
Static Drain-Source On-State
Resistance
VDD=4.5V,
IL=0.6A
VDD=3.6V,
IL=0.4A
TSTART-UP
Start-Up Time from Shutdown
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
Bypass Capacitor, CB=2.2µF.
4
µA
mΩ
s
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APA2603A
Electrical Characteristics (Cont.)
VDD=5V, VGND=0V, TA= 25οC, Gain=20dB (unless otherwise noted)
Operating Characteristics, BTL Mode
Symbol
Parameter
Test Conditions
APA2603A
Min.
Typ.
Max.
Unit
VDD=5V, TA=25°
C, GAIN=6dB
PO
η
THD+N
Crosstalk
PSRR
THD+N=1%
fin=1kHz
RL=4Ω
2.1
2.2
-
RL=8Ω
1.0
1.3
-
THD+N=10%
fin=1kHz
RL=4Ω
-
2.8
-
RL=8Ω
-
1.7
-
Output Power
Efficiency
80
85
-
RL=4Ω, PO=1.6W
-
0.1
0.3
RL=8Ω, PO=0.8W
-
0.08
0.2
RL=4Ω, PO=2.8W
Total Harmonic Distortion Plus
Noise
fin=1kHz
Channel Separation
PO=0.2W, RL=4Ω, fin=1kHz
-
-100
-60
fin=100Hz
-
-60
-50
fin=1kHz
-
-70
-60
-82.5
-
Power Supply Rejection Ratio
RL=4Ω, Input
AC-Ground
W
%
dB
Signal to Noise Ratio
With A-weighting Filter
VO=1Vrms, RL=8Ω
-
Mute Attenuation
fin=1kHz, RL=8Ω, Vin=1Vrms
-
-90
-80
Shutdown Attenuation
fin=1kHz, RL=8Ω, Vin=1Vrms
-
-120
-90
Vn
Output Noise
With A-weighting Filter
(Gain=20dB)
-
75
100
µVrms
VOS
Output Offset Voltage
RL=4Ω (Gain=20dB)
-
5
30
mV
-
SNR (Note 5)
AttMute
Attshutdown
VDD=3.6V, TA=25°
C, GAIN=6dB
PO
η
THD+N
THD+N=1%
fin=1kHz
RL=4Ω
1.0
1.3
RL=8Ω
0.6
0.65
-
THD+N=10%
fin=1kHz
RL=4Ω
-
1.7
-
RL=8Ω
-
0.85
-
Output Power
Efficiency
Total Harmonic Distortion Plus
Noise
78
83
-
RL=4Ω, PO=0.8W
-
0.2
0.4
RL=8Ω, PO=0.5W
-
0.1
0.3
-60
RL=4Ω, PO=1.4W
fin=1kHz
W
%
Channel Separation
PO=0.1W, RL=4Ω, fin=1kHz
-
-100
Power Supply Rejection Ratio
RL=4Ω, Input
AC-Ground
fin=100Hz
-
-60
-50
fin=1kHz
-
-70
-60
SNR
Signal to Noise Ratio
With A-weighting Filter
VO=1Vrms, RL=8Ω
-
-82.5
-
AttMute
Mute Attenuation
fin=1kHz, RL=8Ω, Vin=1Vrms
-
-85
-70
Shutdown Attenuation
fin=1kHz, RL=8Ω, Vin=1Vrms
-
-110
-90
Vn
Output Noise
With A-weighting Filter
(Gain=20dB)
-
75
100
µVrms
VOS
Output Offset Voltage
RL=4Ω, (Gain=20dB)
-
5
30
mV
Crosstalk
PSRR
Attshutdown
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
5
dB
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APA2603A
Electrical Characteristics (Cont.)
VDD=5V, VGND=0V, TA= 25οC, Gain=20dB (unless otherwise noted)
Operating Characteristics, SE mode
Symbol
Parameter
APA2603A
Test Conditions
Unit
Min.
Typ.
Max.
RL=32Ω
50
60
-
RL=32Ω
-
75
-
RL=32Ω
PO=42.5mW
-
0.02
-
-
-100
-80
fin=100Hz
-
-60
-50
fin=1kHz
-
-75
-60
-
-94
-
-
20
40
µVrms
-
5
12
mV
VDD=5V, TA=25°
C, GAIN=3.5dB
PO
THD+N
Crosstalk
PSRR
SNR
THD+N=1%
fin=1kHz
THD+N=10%
fin=1kHz
Output Power
mW
Total Harmonic Distortion Plus
Noise
fin=1kHz
Channel separation
PO=6mW, RL=32Ω, fin=1kHz
Power Supply Rejection Ratio
RL=32Ω, Input
AC-Ground
Signal to Noise Ratio
Vn
Output Noise
VOS
Output Offset Voltage
With A-weighting Filter
VO=1Vrms, RL=32Ω.
With A-weighting Filter
(Gain=3.5dB)
RL=32Ω, (Gain=3.5dB)
%
dB
Pin Description
PIN
NO.
FUNCTION
NAME
SOP-24
QFN-20
1
3
SD
2
4
BYPASS
3
5
RIN
4,5
6
AGND
6
7
LIN
7
8
VOLUME
8
9
MUTE
Mute control signal input, hold low for normal operation, hold high to mute.
10
SE/BTL
Output mode control input, high for SE output mode and low for BTL mode.
9
Shutdown mode control input. Pulling low the voltage on this pin shuts off the IC.
Bias voltage for power amplifiers.
Input of right channel power amplifier.
Analog signal ground.
Input of left channel power amplifier.
Internal gain setting input. Connect to GND to set max gain=20dB
14,16
-
NC
10
11
AGC
No connection.
VDD~0.45VDD or AGC Floating, disable this function.
11
12
UVP
Under voltage protection input. Floating or pull “H” disable this function.
12,18,23
13,16,20
VDD
Power
13
14
HP_LOUT
Headphone output of left channel power amplifier.
15
2
HP_ROUT
Headphone output of right channel power amplifier.
17
15
LOUTP
Positive output of left channel power amplifier.
19
17
LOUTN
Negative output of left channel power amplifier.
20,21
18
PGND
Power ground for the H-bridges.
22
19
ROUTN
Negative output of right channel power amplifier.
24
1
ROUTP
Positive output of right channel power amplifier.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
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APA2603A
Typical Operating Characteristics
Efficiency vs. Output Power (4Ω)
Efficiency vs. Output Power (8Ω)
100
100
VDD=3.3V
90
VDD=5V
80
Efficiency (%)
Efficiency (%)
60
50
40
R L=4Ω+33µH
fin =1kHz
THD+N≦ 10%
AV=20dB
AUX-0025
AES -17(20 kHz)
30
20
10
70
60
50
40
20
10
0
1.0 1.5 2.0 2.5
Output Power (W)
3.0
R L=8Ω+33µH
f in =1kHz
THD+N≦10%
A V=20dB
AUX- 0025
AES -17( 20kHz)
30
0
0.5
V DD=5V
80
70
0
VDD=3.3V
90
3.5
1.5
0.5
1.0
Output Power (W)
0
THD+N vs. Output Power
2.0
THD+N vs. Output Powe
10
10
VDD=3.3V
VDD=3.3V
VDD=5V
VDD=5V
1
VDD=5.5V
0.1
0.01
0
THD+N (%)
THD+N (%)
1
fin=1kHz
RL=4Ω
AV=20dB
AUX-0025
AES-17(20kHz)
BTL mode
1
2
3
Output Power (W)
VDD=5.5V
0.01
0
4.5
4
fin=1kHz
RL=8Ω
AV=20dB
AUX-0025
AES-17(20kHz)
BTL mode
0.1
500m
THD+N vs. Output Power
10
VDD=3.3V
1
THD+N (%)
THD+N (%)
VDD=5.5V
VDD=5V
0.1
fin=1kHz
RL=32Ω
AV=3.5dB
AES-17(20kHz)
SE mode
50m
100m
2
2.5
7
AV=20dB
0.1
0.001
20
150m
Output Power (W)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
VDD=5V
PO=1.8W
RL=4Ω
AUX-0025
AES-17(20kHz)
0.0
1
0.01
0
1.5
THD+N vs. Frequency
10
1
1
Output Power (W)
AV=10dB
100
1k
Frequency (Hz)
10k 20k
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APA2603A
Typical Operating Characteristics
THD+N vs. Frequency
THD+N vs. Frequency
10
VDD=5.0V
PO=42.5mW
RL=4Ω
AUX-0025
AES-17(20kHz)
1
THD+N (%)
1
THD+N (%)
10
VDD=5V
PO=0.8W
RL=4Ω
AUX-0025
AES-17(20kHz)
AV=20dB
0.1
AV=20dB
0.01
0.1
AV=3.5dB
0.01
0.001
20
100
1k
0.001
10k 20k
20
Frequency (Hz)
Crosstalk vs. Frequency
1k
Frequency (Hz)
10k 20k
Crosstalk vs. Frequency
-60
-60
VDD=3.6V
PO=0.1W
RL=4Ω
AUX-0025
AES-17(20kHz)
R-Channel to L-Channel
-80
VDD=5V
PO=0.2W
RL=4Ω
AUX-0025
AES-17(20kHz)
-70
Crosstalk (dB)
-70
Crosstalk (dB)
100
-90
L-Channel to R-Channel
-80
R-Channel to L-Channel
-90
L-Channel to R-Channel
-100
-100
20
100
1k
10k 20k
20
Frequency (Hz)
Crosstalk vs. Frequency
-60
VDD=5V
PO=0.2W
RL=8Ω
AUX-0025
AES-17(20kHz)
-70
Crosstalk (dB)
Crosstalk (dB)
10k 20k
Crosstalk vs. Frequency
VDD=3.6V
PO=0.1W
RL=8Ω
AUX-0025
AES-17(20kHz)
R-Channel to L-Channel
-80
-90
1k
Frequency (Hz)
-60
-70
100
-80
R-Channel to L-Channel
-90
L-Channel to R-Channel
L-Channel to R-Channel
-100
20
100
1k
-100
10k 20k
20
Frequency (Hz)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
8
100
1k
Frequency (Hz)
10k 20k
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APA2603A
Typical Operating Characteristics
Output Noise Voltage vs. Frequency
Output Noise Voltage vs. Frequency
120µ
100µ
AV=20dB
80µ
AV=14dB
60µ
AV=6dB
40µ VDD=3.6V
RL=4Ω
Input AC Ground
20µ AUX-0025
AES-17(20kHz)
20
100µ
Output Noise Voltage(Vrms)
Output Noise Voltage(Vrms)
120µ
AV=20dB
AV=14dB
80µ
AV=6dB
60µ
VDD=5V
RL=4Ω
Input AC Ground
AUX-0025
AES-17(20kHz)
40µ
20µ
100
1k
Frequency (Hz)
20
10k 20k
100
Frequency Response
+360
Amplitude,AV=20dB
+22
+360
Amplitude,AV=20dB
+20
+20
+18
+18
+270
+16
+180
Phase,AV=20dB
Phase,AV=14dB
Phase,AV=8dB
+10
+8
+6
+4
+2
20
VDD=3.6V
RL=4Ω
Po=70mW
AUX-0025
Amplitude,AV=8dB
Gain (dB)
+12
+14
+12
+6
+4
100
1k
10k
+2
+0
100k
VDD=5V
RL=8Ω
Po=70mW
AUX-0025
20
100
1k
10k
Frequency (Hz)
-60
-60
VDD=5.0V
RL=8Ω
AV=20dB
VO=1Vrms
AUX-0025
AES-17(20kHz)
-70
Gain (dB)
Gain (dB)
-90
+0
100k
Mute Attenuation vs. Frequency
Shutdown Attenuation vs. Frequency
-80
+90
Amplitude,AV=8dB
Frequency (Hz)
-70
+180
Phase,AV=20dB
Phase,AV=14dB
Phase,AV=8dB
+10
+8
+90
Amplitude,AV=14dB
Phase (Deg)
+14
+270
+16
Amplitude,AV=14dB
Phase (Deg)
Gain (dB)
10k 20k
Frequency (Hz)
Frequency Response
+22
1k
-100
-110
VDD=5.0V
RL=8Ω
AV=20dB
VO=1Vrms
AUX-0025
AES-17(20kHz)
-80
-90
-120
-130
-140
20
100
1k
-100
20
10k 20k
Frequency (Hz)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
100
10k 20k
1k
Frequency (Hz)
9
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APA2603A
Typical Operating Characteristics
Gain vs. Volume Voltage
PSRR vs. Frequency
+0
20
VDD=5.0V
RL=4Ω
AV=20dB
Vrr=0.2Vpp
AUX-0025
AES-17(20kHz)
PSRR (dB)
-20
-30
-40
Gain Down
0
Gain Up
-20
Gain (dB)
-10
Input floating
-50
-40
-60
-70
Input to GND
-80
20
100
1k
Frequency (Hz)
-80
10k 20k
0
1.0
3.0
4.0
5.0
Supply Current vs. Supply Voltage (SE)
Supply Current vs. Supply Voltage (BTL)
3.0
No Load
No Load
6.0
2.5
Supply Current (mA)
5.0
4.0
3.0
2.0
2.0
1.5
1.0
0.5
1.0
0.0
0.0
1.0
2.0
3.0
4.0
5.0
0.0
0.0
6.0
1.0
3.0
4.0
5.0
6.0
Mute Current vs. Supply Voltage(BTL)
Shutdown Current vs. Supply Voltage
0.7
7.0
No Load
No Load
6.0
Supply Current (mA)
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0.0
2.0
Supply Voltage (V)
Supply Voltage (V)
Shutdown Current (÷A)
2.0
DC Volume Voltage (V)
7.0
Supply Current (mA)
VDD=5.0V
No Load
AUX-0025
AES-17(20kHz)
-60
5.0
4.0
3.0
2.0
1.0
1.0
2.0
3.0
4.0
5.0
0.0
0.0
6.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage (V)
Supply Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
1.0
10
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APA2603A
Typical Operating Characteristics
AGC Function
Mute Current vs. Supply Voltage(SE)
Output Power vs. Input AC
3.5
3.0
No Load
3.0
Output Voltage (V)
Supply Current (mA)
2.5
2.0
1.5
1.0
0.5
0.0
0.0
2.5
2.0
VDD=5.0V
RL=4Ω
AV=20dB
VAGC to GND
AUX-0025
AES-17(20kHz)
1.5
1.0
0.5
1.0
2.0
3.0
4.0
5.0
0.0
6.0
Supply Voltage (V)
0.5
1.0
1.5
2.0
Input Voltage (V)
AGC Function
Output Power vs. Input AC
3.0
Output Voltage (V)
2.5
2.0
1.5
VDD=5.0V
RL=4Ω
AV=20dB
VAGC =1.7V
AUX-0025
AES-17(20kHz)
1.0
0.5
0.0
0.5
1.0
1.5
2.0
Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
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APA2603A
Block Diagram
HP_ROUT
GND
Gate
Drive
RIN
ROUTP
VDD
Gate
Drive
BYPASS
AGC
BYPASS
Under Voltage
Detection
Circuit
AGC
Control
Biases &
Reference
MUTE
VOLUME
ROUTN
Protection
Function
GND
Volume
Control
Oscillator
Shutdown
Control
SD
UVP
VDD
Gate
Drive
LIN
LOUTP
VDD
Gate
Drive
LOUTN
GND
SE/BTL
SE/BTL
HP_LOUT
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
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APA2603A
Typical Application Circuit
Shutdown
Control
ROUTP 24
1 SD
100kΩ *recommend
2 BYPASS
CB
Right Channel Ci1 1µF
Input Signal
VDD 23
2.2µF
CS2
3 RIN
0.1µF
4Ω
ROUTN 22
VDD
Left Channel Ci2 1µF
Input Signal
VDD
5 AGND
PGND 20
APA2603A
(Top View)
50kΩ
Mute
Control
100kΩ *recommend
R3
R1
CS5
10µF
LOUTN 19
CS3
0.1µF
4Ω
LOUTP 17
8 MUTE
NC 16
9 SE/BTL
100kΩ
R4
CS1
VDD 18
7 VOLUME
100kΩ
R5
PGND 21
6 LIN
CS7 1µF
SE/BTL
Signal
4 AGND
10 AGC
HP_ROUT 15
11 UVP
NC 14
12 VDD
HP_LOUT 13
Cc
220µF
1µF
Vsys
1kΩ
SE/STL
Signal
VDD
CS6 1µF
R2
CS4 0.1µF
Cc
220µF
Headphone Jack
1kΩ
AGC function
Shutdown
Control
ROUTP 24
1 SD
100kΩ *recommend
2 BYPASS
CB
Right Channel Ci1 1µF
Input Signal
VDD 23
2.2µF
CS2
3 RIN
0.1µF
4Ω
ROUTN 22
VDD
Left Channel Ci2 1µF
Input Signal
PGND 20
APA2603A LOUTN 19
(Top View)
SE/BTL
Signal
100kΩ
CS1
CS3
CS6 1µF
0.1µF
4Ω
LOUTP 17
8 MUTE
NC 16
9 SE/BTL
10 AGC
HP_ROUT 15
11 UVP
NC 14
12 VDD
HP_LOUT 13
Cc
R3
R1
Vsys
10µF
VDD 18
7 VOLUME
100kΩ *recommend
R2
5 AGND
50kΩ
100kΩ
Mute
Control
PGND 21
6 LIN
CS7 1µF
VDD
4 AGND
220µF
1kΩ
SE/STL
Signal
VDD
CS4 0.1µF
Cc
220µF
Headphone Jack
1kΩ
AGC always disable
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
13
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APA2603A
DC Volume Control Table
Step
BTL Gain (dB) SE Gain (dB)
Low (%)
High (%)
Recom(%)
Low (V)
High(V)
Recom(V)
1
20.0
3.5
0.00
1.84
0.00
0.000
0.092
0.00
2
19.6
3.2
2.33
3.39
2.86
0.116
0.170
0.14
3
19.2
2.9
3.82
4.97
4.40
0.191
0.249
0.22
4
18.8
2.6
5.40
6.53
5.97
0.270
0.326
0.30
5
18.4
2.3
6.96
8.06
7.51
0.348
0.403
0.38
6
17.6
1.7
8.49
9.62
9.06
0.425
0.481
0.45
7
17.2
1.4
10.05
11.18
10.61
0.502
0.559
0.53
8
16.8
1.1
11.61
12.73
12.17
0.580
0.637
0.61
9
16.4
0.8
13.19
14.29
13.74
0.659
0.714
0.69
10
16.0
0.5
14.74
15.83
15.29
0.737
0.791
0.76
11
15.6
0.2
16.30
17.38
16.84
0.815
0.869
0.84
12
15.2
-0.2
17.83
18.92
18.38
0.892
0.946
0.92
13
14.8
-0.5
19.37
20.49
19.93
0.969
1.025
1.00
14
14.4
-0.8
20.91
22.04
21.47
1.045
1.102
1.07
15
14.0
-1.2
22.48
23.59
23.04
1.124
1.180
1.15
16
13.6
-1.5
24.04
25.13
24.59
1.202
1.256
1.23
17
13.6
-1.5
25.58
26.67
26.12
1.279
1.333
1.31
18
13.2
-1.8
27.12
28.20
27.66
1.356
1.410
1.38
19
12.8
-2.2
28.63
29.76
29.19
1.432
1.488
1.46
20
12.4
-2.5
30.21
31.29
30.75
1.510
1.565
1.54
21
12.0
-2.9
31.75
32.83
32.29
1.587
1.641
1.61
22
11.6
-3.2
33.28
34.39
33.83
1.664
1.719
1.69
23
11.2
-3.6
34.82
35.92
35.37
1.741
1.796
1.77
24
10.8
-3.9
36.37
37.50
36.94
1.819
1.875
1.85
25
10.4
-4.3
37.93
39.04
38.48
1.897
1.952
1.92
26
10.0
-4.6
39.49
40.59
40.04
1.974
2.030
2.00
27
9.6
-5.0
41.02
42.15
41.58
2.051
2.107
2.08
28
9.2
-5.4
42.58
43.69
43.13
2.129
2.184
2.16
29
8.8
-5.7
44.14
45.23
44.68
2.207
2.261
2.23
30
8.4
-6.1
45.68
46.76
46.22
2.284
2.338
2.31
31
8.0
-6.4
47.21
48.32
47.76
2.361
2.416
2.39
32
7.6
-6.8
48.75
49.85
49.30
2.438
2.493
2.47
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
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APA2603A
DC Volume Control Table (Cont.)
Step
BTL Gain (dB) SE Gain (dB)
Low (%)
High (%)
Recom(%)
Low (V)
High(V)
Recom(V)
33
7.2
-7.2
50.31
51.41
50.86
2.515
2.571
2.54
34
6.8
-7.5
51.86
52.96
52.41
2.593
2.648
2.62
35
6.4
-7.9
53.38
54.52
53.95
2.669
2.726
2.70
36
6.0
-8.3
54.95
56.06
55.51
2.748
2.803
2.78
37
5.6
-8.6
56.49
57.60
57.04
2.825
2.880
2.85
38
5.2
-9.0
58.03
59.17
58.60
2.901
2.959
2.93
39
4.8
-9.4
59.60
60.71
60.16
2.980
3.036
3.01
40
4.4
-9.8
61.14
62.24
61.69
3.057
3.112
3.08
41
4.0
-10.1
62.65
63.78
63.22
3.133
3.189
3.16
42
3.6
-10.5
64.21
65.32
64.77
3.211
3.266
3.24
43
3.2
-10.9
65.75
66.83
66.29
3.287
3.342
3.31
44
2.8
-11.3
67.27
68.39
67.83
3.363
3.420
3.39
45
2.4
-11.6
68.82
69.95
69.39
3.441
3.497
3.47
46
2.0
-12.0
70.38
71.51
70.94
3.519
3.575
3.55
47
1.6
-12.4
71.94
73.06
72.50
3.597
3.653
3.62
48
1.2
-12.8
73.49
74.62
74.06
3.675
3.731
3.70
49
0.8
-13.1
75.05
76.17
75.61
3.753
3.809
3.78
50
0.4
-13.5
76.59
77.71
77.15
3.829
3.886
3.86
51
0.0
-13.9
78.12
79.23
78.68
3.906
3.962
3.93
52
-1.0
-14.9
79.66
80.78
80.22
3.983
4.039
4.01
53
-2.0
-15.8
81.20
82.32
81.76
4.060
4.116
4.09
54
-3.0
-16.8
82.75
83.88
83.32
4.138
4.194
4.17
55
-5.0
-18.8
84.29
85.43
84.86
4.214
4.272
4.24
56
-7.0
-20.7
85.82
86.99
86.41
4.291
4.350
4.32
57
-9.0
-22.7
87.38
88.53
87.95
4.369
4.426
4.40
58
-11.0
-24.7
88.92
90.06
89.49
4.446
4.503
4.47
59
-17.0
-30.7
90.46
91.62
91.04
4.523
4.581
4.55
60
-23.0
-36.9
92.01
93.20
92.61
4.601
4.660
4.63
61
-29.0
-43.0
93.57
94.71
94.14
4.678
4.736
4.71
62
-35.0
-49.3
95.10
96.25
95.68
4.755
4.813
4.78
63
-41.0
-55.3
96.64
97.81
97.22
4.832
4.890
4.86
64
-80.0
-80.0
98.20
100.00
100.00
4.910
5.000
5.00
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
15
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APA2603A
Function Description
Class-D Operation
Bypass Voltage
The bypass voltage is equal to VDD/2, this voltage is for
bias the internal preamplifier stages. The external ca-
Output = 0V
VOUTP
pacitor for this reference (CB) is a critical component and
serves several important functions.
VOUTN
DC Volume Control Function
VOUT
(VOUTP-VOUTN)
The APA2603A has an internal stereo volume control
whose setting is the function of the DC voltage applied to
IOUT
VOUTP
the VOLUME input pin. The APA2603A volume control consists of 64 steps that are individually selected by a vari-
VOUTN
able DC voltage level on the VOLUME control pin. The
range of the steps controlled by the DC voltage, are from
Output > 0V
+20dB to -80dB. Each gain step corresponds to a specific input voltage range, as shown in the table. To mini-
VOUT
(VOUTP-VOUTN)
mize the effect of noise on the volume control pin, which
can affect the selected gain level, hysteresis and clock
IOUT
Output < 0V
delay are implemented. The amount of hysteresis corresponds to half of the step width, as shown in the “DC
VOUTP
Volume Control Graph”.
For the highest accuracy, the voltage shown in the “rec-
VOUTN
ommended voltage” column of the table is used to select
a desired gain. This recommended voltage is exactly half-
VOUT
(VOUTP-VOUTN)
way between the two nearest transitions. The gains level
have are 0.4dB/step from 20dB to 0dB; 1dB/step from
IOUT
0dB to -3dB; 2dB/step from -3dB to -11dB and 6dB/step
from -11dB to -41dB and the last step at -80dB as mute
Figure1. The APA2603A Output Waveform (Voltage&
Current)
mode.
The APA2603A power amplifier modulation scheme is
shown in figure 1; the outputs VOUTP and VOUTN are in phase
AGC (Non-Clipping) Function
with each other when no input signals. When output > 0V,
the duty cycle of VOUTP is greater than 50% and VOUTN is
The APA2603A provides the 64 steps non-clipping control,
and the range is from 20dB to -80dB. When the output
reaches the maximum power setting value, the internal
less than 50%; when Output <0V, the duty cycle of VOUTP is
less than 50% and VOUTN is greater than 50%. This method
Programmable Gain Amplifier (PGA) will decrease the gain
for prevent the output waveform clipping. This feature pre-
reduces the switching current across the load, and reduces the I 2R losses in the load that improve the
vents speaker damage from occurring clipping. Using
the AGC pin to set the non-clipping function and limit the
amplifier’s efficiency.
This modulation scheme has very short pulses across
output power.
the load, this making the small ripple current and very
little loss on the load, and the LC filter can be eliminate in
most applications. Added the LC filter can increase the
efficiency by filter the ripple current.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
16
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APA2603A
Function Description (Cont.)
Thermal Protection
Table 1: AGC Setting Threshold v.s Output Power
AGC Function
Output Power
VDD~0.45VDD or AGC
Floating
Disable AGC Function
Po =
0.45VDD~0.27VDD
0.27VDD~GND
The over-temperature circuit limits the junction temperature of the APA2603A. When the junction temperature exceeds TJ=+165oC, a thermal sensor turns off the output
buffer, allowing the devices to cool. The thermal sensor
8(½ VDD - VAGC )2
x0.95
RL
allows the amplifier to start-up after the junction temperature down about 140 oC. The thermal protection is de-
(Max Output Power 4Ω) Po=2.45W
(Max Output Power 8Ω) Po=1.225W
MUTE Operation
signed with a 25 oC hysteresis to lower the average TJ
during continuous thermal overload conditions, increas-
When place the logic high on MUTE pin, the APA2603A’s
ing lifetime of the IC.
outputs runs at a constant 50% duty cycle, and the
APA2603A is at mute state. Place the logic low on MUTE
Under-Voltage Protection
pin enables the outputs, and the output changes the duty
cycle with the input signal. This pin could be used as a
External under voltage detection can be used to Shutdown the APA2603A before an input device can generate
quick disable/enable of outputs when changing channels
on a television or transitioning between different audio
sources. The MUTE pin must not be floating.
a pop. The shutdown threshold at the UVP pin is 1.2V.
The user selects a resistor divider to obtain the shut-
Shutdown Operation
down threshold and hysteresis for the specific application.
The thresholds can be determined as below:
In order to reduce power consumption while not in use,
the APA2603A contains a shutdown function to externally
With the condition: R3 >> R1// R2
VUVP=[1.2-(5.7µAxR3)] x (R1+R2)/R2
turn off the amplifier bias circuitry. This shutdown feature
Hysteresis=4.6µA x R3 x (R1+R2)/R2
turns the amplifier off when logic low is placed on the SD
pin for APA2603A. The trigger point between a logic high
For example, to obtain VUVP=3.7V and 0.9V hysteresis,
R1=3kΩ, R2=1kΩ and R3=50kΩ. Only if external voltage
and logic low level is typically 0.65V. It is the best to switch
between ground and the supply voltage VDD to provide
Vsystem is lower than the shutdown thershold VUVP, the
APA2603A is in shutdown mode. On the other hand, Vsystem
maximum device performance. By switching the SD pin
to a low level, the amplifier enters a low-consumption-
could be pulled higher than VHys (VUVP + hysteresis=4.
6V) to keep the IC out of shutdown mode.
current state, IDD for APA2603A is in shutdown mode. On
normal operating, APA2603A’s SD pin should pull to a
Vsystem
high level to keep the IC out of the shutdown mode. The
SD pin should be tied to a definite voltage to avoid unwanted state changes.
R1
3kΩ
Over-Current Protection
R3
50kΩ
The APA2603A monitors the output current, and when the
current exceeds the current-limit threshold, the APA2603A
turn-off the output stage to prevent the output device from
damages in over-current or short-circuit condition. The IC
will turn-on the output buffer after 200ms, but if the over-
R2
1kΩ
UVP Pin
1.2V
5.7µA
current or short-circuits condition is still remain, it enters
the Over-Current protection again. The situation will circulate until the over-current or short-circuits has be
removed.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
Figure2. Under-Voltage Protection
17
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APA2603A
Application Information
Square Wave into the Speaker
The value of Ci must be considered carefully because it
Apply the square wave into the speaker may cause the
directly affects the low frequency performance of the circuit.
Where Ri is 36kΩ (minimum) and the specification calls
voice coil of speaker jumping out the air gap and defacing
the voice coil. However, this depends on the amplitude of
for a flat bass response down to 50Hz. The equation is
reconfigured as below:
square wave is high enough and the bandwidth of speaker
is higher than the square wave¡¦s frequency. For 500kHz
Ci =
switching frequency, this is not issued for the speaker
because the frequency is beyond the audio band and
(2)
When the input resistance variation is considered, the Ci
is 0.08µF, so a value in the range of 0.01µF to 0.022µF
can¡¦t significantly move the voice coil, as cone movement
is proportional to 1/f2 for frequency out of audio band.
would be chosen. A further consideration for this capacitor is the leakage path from the input source through the
Input Resistor, Ri
input network (Ri + Rf, Ci) to the load. This leakage current
creates a DC offset voltage at the input to the amplifier
Gain vs. Input Resistance
Input Resistance (kΩ)
1
2πRifc
140
130
120
110
100
90
80
70
60
50
40
30
20
-40-35 -30-25-20-15 -10 -5 0 5 10 15 20
that reduces useful headroom, especially in high gain
applications. For this reason, a low-leakage tantalum or
ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should
face the amplifiers’ input in most applications because
the DC level of the amplifiers’ inputs are held at VDD/2.
Please note that it is important to confirm the capacitor
polarity in the application.
Effective Bypass Capacitor, CB
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection.
Gain (dB)
The bypass capacitance sffects the startiup time. It is
determined in the following wquation:
For achieving the 64 steps gain setting, it varies the input
resistance network (R i & R f ) of amplifier. The input
resistor’s range form smallest to maximum is about 3.5
times. Therefore, the input high-pass filter’s low cutoff
TSTART-UP=0.5(sec/µF) x CB + 0.2(sec)
frequency will change 3.5 times from low to high. The
cutoff frequency can be calculated by equation 1.
The capacitor location on the bypass pin should be as
(3)
close to the device as possible. The effect of a larger half
bypass capacitor is improved PSRR due to increased
Input Capacitor, Ci
half-supply stability. The selection of bypass capacitors,
especially CB, is thus dependent upon desired PSRR
In the typical application, an input capacitor, Ci, is required
to allow the amplifier to bias the input signal to the proper
requirements, click and pop performance.To avoid the
start-up pop noise occurred, choose Ci which is not larger
DC level for optimum operation. In this case, Ci and the
input impedance Ri form a high-pass filter with the corner
than CB.
frequency determined in the following equation:
f C(highpass ) =
1
2πRiCi
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
(1)
18
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APA2603A
Application Information (Cont.)
Ferrite Bead Selection
If the traces form APA2603A to speaker are short, the ferrite bead filters can reduce the high frequency radiated to
meet the FCC & CE required.
A ferrite that has very low impedance at low frequencies
OUTP 36µH
and high impedance at high frequencies (above 1 MHz)
is recommended.
1µF
OUTN
Output Low-Pass Filter
36µH
8Ω
1µF
If the traces form APA2603A to speaker are short, it doesn’t
require output filter for FCC & CE standard.
A ferrite bead may be needed if it’s failing the test for FCC
or CE tested without the LC filter. The figure 2 is the sample
Figure 3. LC output filter for 8Ω speaker
for added ferrite bead; the ferrite shows choosing high
impedance in high frequency.
OUTP 18µH
VON
Ferrite
Bead
2.2µF
1nF
Ferrite
Bead
VOP
OUTN
18µH
4Ω
2.2µF
4Ω
1nF
Figure 4. LC output filter for 4Ω speaker
Figure 3 and 4’s low pass filter cut-off frequency are 25kHz
(FC).
Figure 2. Ferrite bead output filter
fC(lowpass) =
Figure 3 and 4 are examples for added the LC filter
(Butterworth), it’s recommended for the situation that the
trace form amplifier to speaker is too long and needs to
1
(5)
2π LC
Power-Supply Decoupling Capacitor, CS
eliminate the radiated emission or EMI.
The APA2603A is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure the output total harmonic distortion (THD) is as
low as possible. Power supply decoupling also prevents
the oscillations being caused by long lead length between the amplifier and the speaker.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
19
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APA2603A
Application Information (Cont.)
Power-Supply Decoupling Capacitor, CS (Cont.)
2. The output traces should be short, wide ( >50mil) and
The optimum decoupling is achieved by using two differ-
symmetric.
3. The input trace should be short and symmetric.
ent types of capacitors that target on different types of
noise on the power supply leads. For higher frequency
4. The power trace width should greater than 50mil.
5. The SOP-16P Thermal PAD should be soldered on
transients, spikes, or digital hash on the line, a good low
equivalent-series-resistance (ESR) ceramic capacitor,
PCB
6. APA2603 and APA2603A share the first 8 pins to avoid
typically 0.1µF placed as close as possible to the device
VDD pin for works best. For filtering lower frequency noise
soldering short. APA2603’s right half pads are connected to APA2603A by lines.
signals, a large aluminum electrolytic capacitor of 10µF
or greater placed near the audio power amplifier is
recommended.
ThermalVia
diameter
0.3mm X 5
1mm
Layout Recommendation
0.28mm
2.54mm
2.0mm
1.27mm
3.2mm
0.7mm
2.5mm
0.5mm
Via diameter
= 0.3mm X 8
4.0 mm
Solder Mask
to Prevent
Short-Circuit
2.2mm
Ground
plane for
Thermal
PAD
Figure 6. QFN4x4-20A Land Pattern Recommendation
1. All components should be placed close to the
APA2603A. For example, the input capacitor (Ci) should
be close to APA2603A’s input pins to avoid causing
5.5mm
noise coupling to APA2603A’s high impedance inputs;
the decoupling capacitor (Cs) should be placed by the
0.27mm
APA2603A’s power pin to decouple the power rail
noise.
2. The output traces should be short, wide ( >50mil), and
symmetric.
11.05mm
3. The input trace should be short and symmetric.
4. The power trace width should greater than 50mil.
Figure 5. APA2603 SOP-16P & APA2603A SOP-24colayout Land Pattern Recommendation
5. The QFN4X4-20A Thermal PAD should be soldered on
PCB, and the ground plane needs soldered mask (to
1. All components should be placed close to the
APA2603A. For example, the input capacitor (Ci) should
avoid short-circuit) except the Thermal PAD area.
be close to APA2603A’s input pins to avoid causing
noise coupling to APA2603A’s high impedance inputs;
the decoupling capacitor (CS) should be placed by the
APA2603A’s power pin to decouple the power rail
noise.
Copyright  ANPEC Electronics Corp.
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APA2603A
Package Information
SOP-24
D
h x 45o
E
E1
SEE VIEW
A
0.25
b
A2
e
c
A1
A
GAUGE PLANE
SEATING PLANE
θ
L
VIEW A
S
Y
M
B
O
L
SOP-24
M ILLIM E T E R S
M IN.
MAX.
A
A1
INCHES
M IN.
MAX.
2.65
0.104
0.004
0.30
0.10
0.012
0.081
A2
2.05
b
0.31
0.51
0.012
0.020
c
0.20
0.33
0.008
0.013
D
15.20
15.60
0.598
0.614
E
10.10
10.50
0.398
0.413
E1
7.40
7.60
0.291
0.299
e
1.27 BSC
0.050 BSC
L
0.25
0.75
0.010
0.030
h
0.40
1.27
0.016
0.050
θ
0o
0o
8o
8o
Note: 1. Follow JEDEC MS-013 AD.
2. Dimension “D ” does not include mold flash, protrusions or gate burrs.
M o ld flash, protrusion or gate burrs shall not exceed 6 mil per side.
3. Dimension “E ” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright  ANPEC Electronics Corp.
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APA2603A
Package Information
DIP-24
E1
D
D1
b2
b
S
Y
M
B
O
L
e
A
L
0.38
A2
A1
E
c
eA
eB
DIP-24
MILLIMETERS
MIN.
A
INCHES
MAX.
MIN.
MAX.
5.33
0.210
0.015
A1
0.38
A2
2.92
4.95
0.115
0.195
b
0.36
0.56
0.014
0.022
0.070
b2
1.14
1.78
0.045
c
0.20
0.35
0.008
0.014
D
29.46
30.35
1.160
1.195
0.005
D1
0.13
E
7.62
8.26
0.300
0.325
E1
6.10
7.11
0.240
0.280
e
2.54 BSC
0.100 BSC
eA
7.62 BSC
0.300 BSC
L
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
0.430
10.92
eB
2.92
3.81
22
0.115
0.150
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APA2603A
Package Information
QFN4x4-20A
D
b
E
A
Pin 1
A1
D2
A3
L K
E2
Pin 1 Corner
e
S
Y
M
B
O
L
QFN4x4-20A
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
0.80
1.00
0.031
0.039
A1
0.00
0.05
0.000
0.002
A3
0.20 REF
0.008 REF
b
0.18
0.30
0.008
0.012
D
3.90
4.10
0.154
0.161
D2
2.00
2.50
0.079
0.098
E
3.90
4.10
0.154
0.161
E2
2.00
2.50
0.079
0.098
0.45
0.014
e
0.50 BSC
L
0.35
K
0.20
0.020 BSC
0.018
0.008
Note : 1. Followed from JEDEC MO-220 VGGD-5.
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APA2603A
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
A
Application
H
330.0±2.00
50 MIN.
P0
P1
SOP-24
T1
C
24.40+2.00 13.0+0.50
-0.00
-0.20
d
D
W
E1
F
1.5 MIN.
20.2 MIN.
24.0±0.30
1.75±0.10
11.5±0.10
P2
D0
D1
T
A0
B0
K0
1.5 MIN.
0.6+0.00
-0.40
10.9±0.20
15.80±0.20
3.10±0.20
4.0±0.10
12.0±0.10
2.0±0.10
1.5+0.10
-0.00
A
H
T1
C
d
D
W
E1
F
330.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±0.30
1.75±0.10
5.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
4.30±0.20
4.30±0.20
1.30±0.20
Application
QFN4x4-20A
4.0±0.10
8.0±0.10
(mm)
Devices Per Unit
Application
Unit
Quantity
SOP-24
Tape & Real
1000
QFN4x4-20A
Tape & Real
3000
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APA2603A
Taping Direction Information
SOP-24
USER DIRECTION OF FEED
QFN4x4-20A
USER DIRECTION OF FEED
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Rev. A.6 - Mar., 2013
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APA2603A
Classification Profile
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APA2603A
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
3
Package
Thickness
<2.5 mm
Volume mm
<350
235 °C
Volume mm
≥350
220 °C
≥2.5 mm
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
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Rev. A.6 - Mar., 2013
27
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
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APA2603A
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
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