Anpec APW7004KC-TU Synchronous-rectifier pwm controller for pentium ii microprocessor Datasheet

APW7004
Synchronous-Rectifier PWM Controller for PentiumTM II Microprocessor
Features
•
6´ 86TM is a trademark of Cyrix Corporation
AlphaTM is a trademark of Digital Equipment
Corporation
K6 TM is a trademark of Advanced Micro Devices,
Inc.
Pentium TM is a trademark of Intel Corporation
PowerPC TM is a trademark of IBM
Simple Single-Loop Control Design-VoltageMode PWM Control
•
Fast Transient Response
• High-Bandwidth Error Amplifier
•
5-Bit Digital-to-Analog Output Voltage Selection
• Wide Range from1.3VDC to 3.5VDC
General Description
• 0.1V Binary Steps from 2.1VDC to 3.5VDC
.05V Binary Steps from 1.3VDC to 2.05 VDC
•
The APW7004 provides a complete control and multiple protection for a DC-DC converter optimized for
high performance microprocessor applications. It is
designed to drive two N-Channel MOSFETs in a synchronous-rectified buck topology. The APW7004 integrates output voltage control, output voltage
programming, monitoring and protection functions into
a single chip IC.
The APW7004 includes a 5-bit digital-to-analog converter (DAC) that provides a easily adjustable and
precisely output voltage from 2.1VDC to 3.5VDC in 0.
1 increments and from 1.3 VDC to 2.05 VDC in
0.
05V increments. Any selected output voltage can be
maintained within ±1% accuracy over temperature
and line voltage variations.
With a 200kHz free-running triangle-wave oscillator
and a error amplifier featuring a 15MHz unity-gain
bandwidth and 6V/us slew rate inside the chip,
APW7004 can implement a simple, single feedback
loop, voltage-mode control topology with high transient performance.
The APW7004 also features with multiple protections
against over-current and over-voltage conditions by
inhibiting PWM operation. The APW7004 uses the
RDS(ON) of the upper MOSFET as the current sensing
element which eliminates the demend for an extra
component. The APW7004 also monitors the output
voltage using a comparator with hysteresis that tracks
the DAC output and issues a Power Good signal once
the output is within ±10%.
VID0-4 Input Pins with Pull High Resistors Built
in
•
Power-Good Output Voltage Monitor, PGOOD
Pin with an Open Collector Configuration
•
Over-Voltage and Over-Current Fault Monitors
• Uses MOSFET’s RDS(ON) as Current Sensing,
No Extra Element Required
•
Programmable Switching Frequency Setting
• 200kHz Free-Running Oscillator
Applications
•
Power Supply for Pentium TM, Pentium ProTM,
Pentium TM II,PowerPC TM, K6 TM , 6´86TM and
AlphaTM Microprocessors
•
High-Power 5V to 3.xV (or below) DC-DC Regulators
•
Low-Voltage Distributed Power Supplies
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
1
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APW7004
Pin Description
VSEN
OCSET
SS
VID0
VID1
VID2
VID3
VID4
COMP
FB
RT
OVP
Vcc
LGATE
PGND
BOOT
UGATE
PHASE
PGOOD
GND
20
19
18
17
16
15
14
13
12
1
2
3
4
5
6
7
8
9
10
11
Ordering Information
APW7004
Package Code
K : SOP - 20
Temp. Range
C : 0 to 70 °C
Handling Code
TU : Tube
Handling Code
Temp. Range
Package Code
TR : Tape & Reel
Block Diagram
OVP
VCC
19
VSEN
18
1
Power on
Reset
+ CP2
-
110%
DETN
(Power on Reset)
+ CP2
12
PGOOD
2
OCSET
90%
UGATE
+ CP2
OVP
SS
CP1
OC
-
3
200µA
SOFT
START
DETN
(Power on Reset)
FB
+
115%
OC
VID0
VID1
VID2
VID3
VID4
PHASE
4
5
6
7
8
TTL D/A
CONVERER
(DAC)
15
BOOT
14
UGATE
13
PHASE
17
LGATE
16
PGND
11
GND
DETN, OC
DAC OUT
+
ERRAMP
-
+
+
-
CP4
DRIVER
10
OSC
DETN
(Power on Reset)
9
COMP
20
RT
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
2
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APW7004
Absolute Maximum Ratings
Symbol
VCC
VBOOT –VPHASE
VI , VO
TA
TJ
T STG
TS
Parameter
Supply Voltage
Boot Voltage
Input , Output or I/O Voltage
Operating Ambient Temperature Range
Junction Temperature Range
Storage Temperature Range
Soldering Temperature
Rating
15
15
GND - 0.3 V to VCC + 0.3
0 to 70
0 to 150
-65 to +150
300,10 seconds
Unit
V
V
V
°C
°C
°C
°C
Thermal Characteristics
Symbol
R θJA
Parameter
Value
Unit
110
°C/W
Thermal Resistance in Free Air
SOP
2
SOP (with 3in of Copper)
86
Electrical Characteristics
Recommended operating conditions , unless otherwise noted
Symbol
Parameter
VCC Supply Current
ICC
Nominal Supply
Power-on Reset
Rising VCC Threshold
Falling VCC Threshold
Oscillator
Free Running Frequency
∆VOSC Ramp Amplitude
Reference and DAC
DAC(VID0-VID4) Input Low Voltage
DAC(VID0-VID4) Input High Voltage
DACOUT Voltage accuracy
Error Amplifier
DC Gain
GBW Gain-Bandwidth Product
SR
Slew Rate
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
Test Conditions
APW7004
Min. Typ. Max.
Unit
UGATE and LGATE open
3
mA
9.0
8.8
V
V
Vocset=4.5V
Vocset=4.5V
RT= Open
RT= Open
185
200
2
215
kHz
VP-P
0.8
V
V
%
3.0
-1.0
COMP=20pF
3
+1.0
88
15
6
dB
MHz
V/µs
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APW7004
Electrical Characteristics CONT.
Symbol
Parameter
Test Conditions
APW7004
Min.
Typ.
Max.
Unit
Gate Drivers
RUG, SOURCE Upper Gate Source
RUG, SINK Upper Gate Sink
RLG, SOURCE Lower Gate Source
RLG, SINK Lower Gate Sink
VBOOT-VPHASE =12V
8.3
Ω
VBOOT-VPHASE =12V
5
Ω
VCC=12V
8.3
Ω
VCC=12V
5
Ω
Protection
Over-Voltage Trip (VSEN /DACOUT)
IOCSET
OCSET Current Source
VOCSET=4.5VDC
IOVP
OVP Souring Current
VSEN =5.5V ,VOVP=0V
ISS
Soft Start Current
170
115
120
%
200
230
30
µA
mA
10
µA
110
%
90
%
2
%
0.5
V
Power Good
Upper Threshold (VSEN /DACOUT)
VPGOOD
VSEN Rising
Lower Threshold (VSEN /DACOUT) VSEN Rising
Upper and Lower
Hysteresis (VSEN /DACOUT)
Threshold
PGOOD Voltage Low
IPGOOD= -5mA
Pin Function Description
VSEN (pin 1)
sets the soft-start interval of the converter.
Connect this pin to the converter’s voltage output.
The PGOOD and OVP comparator circuits monitor
output voltage status and act over voltage protection
by using this signal.
VID0-4 (Pins 4-8)
VID0-4 are the input pins to the 5-bit DAC. The states
of these five pins decide the internal voltage reference (DACOUT). The level of DACOUT sets the converter output voltage and also sets the PGOOD and
OVP thresholds. Table 1 specifies DACOUT for the
32 combinations of DAC inputs.
OCSET(pin 2)
Connect a resistor(ROCSET) from this pin to the drain
of the upper MOSFET. An internal 200mA current
source (IOCS), ROCSET, and the upper MOSFET’s onresistance (RDS(ON)) set the converter over-current
(OC) trip point according to the following equation:
IPEAK= IOCS´ ROCSET /RDS(ON)
An over-current trip resets the soft-start function.
COMP (pin 9) and FB (pin 10)
COMP and FB are the accessiable pins of the error
amplifier. FB pin is the inverting input of the error
amplifier and COMP pin is output of the error amplifier.
These pins provide the compensation for the voltage-control feedback loop of the converter.
SS (Pin 3)
GND (Pin 11)
GND is signal ground of the IC. All voltage levels are
measured with respect to this pin.
Connect a capacitor from this pin to ground. This
capacitor, along with an internal 10mA current source,
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
4
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APW7004
Electrical Characteristics Cont.
PGOOD (PIin 12)
OVP (pin 19)
PGOOD is an open collector output used to indicate
the status of the converter output voltage. This pin is
pulled low when the converter output is not within
±10% of the DACOUT reference voltage. The
PGOOD pin is floating when no CPU exists.
OVP pin reports the event of an over-voltage condition . Converter output rising 15% more than the DACset voltage triggers a high output on this pin with a
typical 30mA sourcing capability which can be used
to drive an external device and disables PWM gate
drive circuitry.
PHASE (pin 13)
RT (pin 20)
Connect the PHASE pin to the source of the upper
MOSFET. This pin is used to monitor the voltage
drop across the upper MOSFET for over-current
protection.
RT pin provides oscillator switching frequency
adujstment. By connecting a resistor (RT) from this
pin to GND, the nominal 200kHz switching frequency
is increased. Conversely. connecting a pull-up resistor (RT) from this pin to VCC reduces the switching
frequency.
UGATE (pin 14)
Connect UGATE to the upper MOSFET gate. This
pin enables the gate drive signal to drive the upper
MOSFET .
BOOT (pin 15)
BOOT pin provides bias voltage to the upper
MOSFET gate driver. A bootstrap circuit could be
used to pump a BOOT voltage for enforcing the driving capability of the gate driver and improving the
performance of the upper MOSFET.
PGND(pin 16)
PGND pin provides the power ground connection.
Connect this pin to the source of the lower MOSFET.
LGATE (pin 17)
Connect LGATE to the lower MOSFET gate. This pin
enables the gate drive signal to drive the lower
MOSFET.
VCC (pin 18)
Connect VCC to 12V voltage supply. This pin supplies the bias for the chip.
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
5
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APW7004
Table 1 Output Voltage Program
Pin Name
Pin Name
VID4
VID3
VID2
VID1
VID0
Nominal Output
Voltage Dacout
0
1
1
1
1
1.3
1
1
1
1
1
0
0
1
1
1
0
1.35
1
1
1
1
0
2.1
0
0
1
1
1
1
0
0
1
0
1.4
1.45
1
1
1
1
1
1
0
0
1
0
2.2
2.3
0
1
0
1
1
1.5
1
1
0
1
1
2.4
0
1
0
1
0
1.55
1
1
0
1
0
2.5
0
1
0
0
1
1.6
1
1
0
0
1
2.6
0
0
1
0
0
1
0
1
0
1
1.65
1.7
1
1
1
0
0
1
0
1
0
1
2.7
2.8
0
0
1
1
0
1.75
1
0
1
1
0
2.9
0
0
0
0
1
1
0
0
1
0
1.8
1.85
1
1
0
0
1
1
0
0
1
0
3.0
3.1
0
0
0
1
1
1.90
1
0
0
1
1
3.2
0
0
0
1
0
1.95
1
0
0
1
0
3.3
0
0
0
0
0
0
0
0
1
0
2.00
2.05
1
1
0
0
0
0
0
0
1
0
3.4
3.5
VID4
VID3
VID2
VID1
VID0
Nominal Output
Voltage Dacout
Application Schematic
VIN = +5V
+12V
VCC OVP
APW7004
OCSET
PGOOD
MONITOR AND
PROTECTION
SS
BOOT
UGATE
RT
OSC
PHASE
VID0
VID1
VID2
VID3
VID4
VOUT
D/A
LGATE
+
FB
-
+
PGND
-
COMP
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
VSEN
GND
6
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APW7004
Packaging Information
SO – 300mil ( Reference JEDEC Registration MS-013)
D
N
H
GAUGE
PLANE
E
1
2
3
A
Millimeters
1
A1
B
e
L
Variations- D
Dim
Min.
Max.
Variations
A
2.35
2.65
A1
0.10
B
0.33
Inches
Variations- D
Min.
Max. Dim
Min.
SO-16
10.10
10.50
A
0.093 0.1043
SO-16
0.398 0.413
0.30
SO-18
11.35
11.76
A1
0.004 0.0120
SO-18
0.447 0.463
0.51
SO-20
12.60
13
B
0.013
0.020
SO-20
0.496 0.512
D
See variations
SO-24
15.20
15.60
D
See variations
SO-24
0.599 0.614
E
7.40
SO-28
17.70
18.11
E
0.2914 0.2992
SO-28
0.697 0.713
SO-14
8.80
9.20
e
0.050BSC
SO-14
0.347 0.362
e
7.60
1.27BSC
Max.
H
10
10.65
H
0.394
0.419
L
0.40
1.27
L
0.016
0.050
N
See variations
N
See variations
φ1
0°
φ1
8°
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
7
0°
Variations
Min.
Max.
8°
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APW7004
Physical Specifications
Terminal Material
Lead Solderability
Packaging
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb)
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
1000 devices per reel
Reflow Condition
(IR/Convection or VPR Reflow)
temperature
Reference JEDEC Standard J-STD-020A APRIL 1999
Peak temperature
183°C
Pre-heat temperature
Time
Classification Reflow Profiles
Convection or IR/
Convection
Average ramp-up rate(183°C to Peak)
3°C/second max.
120 seconds max
Preheat temperature 125 ± 25°C)
60 – 150 seconds
Temperature maintained above 183°C
Time within 5°C of actual peak temperature 10 –20 seconds
Peak temperature range
220 +5/-0°C or 235 +5/-0°C
Ramp-down rate
6 °C /second max.
6 minutes max.
Time 25°C to peak temperature
VPR
10 °C /second max.
60 seconds
215-219°C or 235 +5/-0°C
10 °C /second max.
Package Reflow Conditions
pkg. thickness ≥ 2.5mm
and all bgas
Convection 220 +5/-0 °C
VPR 215-219 °C
IR/Convection 220 +5/-0 °C
pkg. thickness < 2.5mm and
pkg. volume ≥ 350 mm³
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
8
pkg. thickness < 2.5mm and pkg.
volume < 350mm³
Convection 235 +5/-0 °C
VPR 235 +5/-0 °C
IR/Convection 235 +5/-0 °C
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APW7004
Reliability test program
Test item
SOLDERABILITY
HOLT
PCT
TST
ESD
Latch-Up
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
Description
245°C , 5 SEC
1000 Hrs Bias @ 125 °C
168 Hrs, 100 % RH , 121°C
-65°C ~ 150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms , Itr > 100mA
Carrier Tape & Reel Dimensions
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Application
SOP-20
A
330±1
B
C
J
T1
62 ± 1.5 12.75 ±0.15 2 + 0.6 24.4 +0.2
F
D
Application
SOP-20
11.5 ± 0.1 1.5+0.1
T2
2± 0.2
D1
Po
P1
Ao
1.5+0.25 4.0 ± 0.1 2.0 ± 0.1 8.2 ± 0.1
W
24 + 0.3
- 0.1
P
12± 0.1
E
1.75± 0.1
Bo
13± 0.1
Ko
t
2.5± 0.1 0.35±0.013
(mm)
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
9
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APW7004
Cover Tape Dimensions
24
21.3
Carrier Width
Cover Tape Width
(mm)
Customer Service
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright  ANPEC Electronics Corp.
Rev. P.4 - Mar., 2001
10
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