ON MC10H116FNG Triple line receiver Datasheet

MC10H116
Triple Line Receiver
Description
The MC10H116 is a triple differential amplifier designed for use in
sensing differential signals over long lines and is a functional/pinout
duplication of the MC10116, with 100% improvement in propagation
delay and no increase in power supply current. For termination
information see AND8020.
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Features
• Propagation Delay, 1.0 ns Typical
• Power Dissipation 85 mW Typ/Pkg (same as MECL 10K™)
• Improved Noise Margin 150 mV (Over Operating Voltage and
1
•
•
•
4
2
5
3
9
6
10
7
12
14
13
15
11
VBB*
VCC1 = Pin 1
VCC2 = Pin 16
VEE = Pin 8
When input pin with
bubble goes positive
it’s respective output
pin with bubble goes
positive.
*VBB to be used to supply bias to the MC10H116 only and bypassed
(when used) with 0.01ĂmF to 0.1 mF capacitor to ground (0 V). VBB can
source < 1.0 mA.
The MC10H116 is designed to be used in sensing differential signals
over long lines. The bias supply (VBB) is made available to make the
device useful as a Schmitt trigger, or in other applications where a
stable reference voltage is necessary.
Active current sources provide these receivers with excellent
common−mode noise rejection. If any amplifier in a package is not
used, one input of that amplifier must be connected to VBB to prevent
unbalancing the current−source bias network.
The MC10H116 does not have internal−input pull− down resistors.
This provides high impedance to the amplifier input and facilitates
differential connections.
Applications:
• Low Level Receiver
• Voltage Level
• Schmitt Trigger
Interface
1
1
PDIP−16
P SUFFIX
CASE 648−08
Temperature Range)
Voltage Compensated
MECL 10K Compatible
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
16
20
16
PLCC−20
FN SUFFIX
CASE 775−02
SOIC−16
D SUFFIX
CASE 751B−05
MARKING DIAGRAMS*
120
16
1
MC10H116P
AWLYYWWG
A
WL
YY
WW
10H116G
AWLYYWW
16
10H116G
AWLYWW
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
*For additional marking information, refer to
Application Note AND8002/D.
Figure 1. Logic Diagram
ORDERING INFORMATION
VCC1
1
16
VCC2
AOUT
2
15
COUT
AOUT
3
14
COUT
AIN
4
13
CIN
AIN
5
12
CIN
BOUT
6
11
VBB
BOUT
7
10
BIN
VEE
8
9
BIN
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see TND309, the Pin Conversion Tables,
page 9.
Figure 2. Dip Pin Assignment
© Semiconductor Components Industries, LLC, 2016
August, 2016 − Rev. 11
1
Device
Package
Shipping†
MC10H116DG
SOIC−16
(Pb-Free)
48 Units/Tube
MC10H116DR2G
SOIC−16
(Pb-Free)
2500/Tape & Reel
MC10H116FNG
PLCC−20
(Pb-Free)
46 Units/Tube
MC10H116FNR2G
PLCC−20
(Pb-Free)
500/Tape & Reel
MC10H116PG
PDIP−16
(Pb-Free)
25 Units/Tube
†For information on tape and reel specifications, including part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
MC10H116/D
MC10H116
Table 1. MAXIMUM RATINGS
Symbol
Rating
Unit
VEE
Power Supply (VCC = 0)
Characteristic
−8.0 to 0
Vdc
VI
Input Voltage (VCC = 0)
0 to VEE
Vdc
Iout
Output Current
Continuous
Surge
TA
Operating Temperature Range
Tstg
Storage Temperature Range
Plastic
Ceramic
mA
50
100
0 to +75
°C
°C
−55 to +150
−55 to +165
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (VEE = −5.2 V ±5%) (Note 2)
0°
Symbol
75°
Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
−
23
−
21
−
23
mA
IinH
Input Current High
−
150
−
95
−
95
mA
ICBO
Input Leakage Current
−
1.5
−
1.0
−
1.0
mA
VBB
Reference Voltage
−1.38
−1.27
−1.35
−1.25
−1.31
−1.19
Vdc
VOH
High Output Voltage
−1.02
−0.84
−0.98
−0.81
−0.92
−0.735
Vdc
VOL
Low Output Voltage
−1.95
−1.63
−1.95
−1.63
−1.95
−1.60
Vdc
VIH
High Input Voltage (Note 1)
−1.17
−0.84
−1.13
−0.81
−1.07
−0.735
Vdc
VIL
Low Input Voltage (Note 1)
−1.95
−1.48
−1.95
−1.48
−1.95
−1.45
Vdc
−
−
−2.85 to −0.8
−
−
Vdc
−
−
150 typ
−
−
mVPP
IE
VCMR
VPP
Characteristic
25°
Common Mode
Range (Note 4)
Input Sensitivity (Note 3)
1. When VBB is used as the reference voltage.
2. Each MECL 10H™ series circuit has been designed to meet the specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained.
Outputs are terminated through a 50 ohm resistor to −2.0 V.
3. Differential input not to exceed 1.0 Vdc.
4. 150 mVp−p differential input required to obtain full logic swing on output.
Table 3. AC CHARACTERISTICS
0°
Symbol
75°
Min
Max
Min
Max
Min
Max
Unit
Propagation Delay
0.4
1.3
0.4
1.3
0.45
1.45
ns
tr
Rise Time
0.5
1.5
0.5
1.6
0.5
1.7
ns
tf
Fall Time
0.5
1.5
0.5
1.6
0.5
1.7
ns
tpd
Characteristic
25°
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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2
MC10H116
PACKAGE DIMENSIONS
20 LEAD PLLC
CASE 775−02
ISSUE F
B
0.007 (0.180)
Y BRK
−N−
M
T L-M
0.007 (0.180)
U
M
N
S
T L-M
S
G1
0.010 (0.250)
S
N
S
D
−L−
−M−
Z
W
20
D
1
X
V
S
T L-M
S
N
S
VIEW D−D
A
0.007 (0.180)
M
T L-M
S
N
S
R
0.007 (0.180)
M
T L-M
S
N
S
Z
C
H
−T−
VIEW S
G1
0.010 (0.250) S T L-M
SEATING
PLANE
F
0.007 (0.180)
VIEW S
S
N
T L-M
S
N
S
K
0.004 (0.100)
J
M
K1
E
G
0.007 (0.180)
S
NOTES:
1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M,
1982.
2. DIMENSIONS IN INCHES.
3. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP
OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD
PARTING LINE.
4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT
DATUM −T−, SEATING PLANE.
5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER
THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE
BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY
MISMATCH BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION
TO BE GREATER THAN 0.037 (0.940). THE DAMBAR
INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO
BE SMALLER THAN 0.025 (0.635).
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3
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
INCHES
MIN
MAX
0.385
0.395
0.385
0.395
0.165
0.180
0.090
0.110
0.013
0.021
0.050 BSC
0.026
0.032
0.020
−−−
0.025
−−−
0.350
0.356
0.350
0.356
0.042
0.048
0.042
0.048
0.042
0.056
−−−
0.020
2_
10 _
0.310
0.330
0.040
−−−
MILLIMETERS
MIN
MAX
9.78
10.03
9.78
10.03
4.20
4.57
2.29
2.79
0.33
0.53
1.27 BSC
0.66
0.81
0.51
−−−
0.64
−−−
8.89
9.04
8.89
9.04
1.07
1.21
1.07
1.21
1.07
1.42
−−−
0.50
2_
10 _
7.88
8.38
1.02
−−−
M
T L-M
S
N
S
MC10H116
PACKAGE DIMENSIONS
SOIC−16
CASE 751B−05
ISSUE K
−A−
16
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
9
−B−
1
P
8 PL
0.25 (0.010)
8
M
B
S
DIM
A
B
C
D
F
G
J
K
M
P
R
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
16 PL
0.25 (0.010)
M
T B
S
A
S
STYLE 1:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
COLLECTOR
BASE
EMITTER
NO CONNECTION
EMITTER
BASE
COLLECTOR
COLLECTOR
BASE
EMITTER
NO CONNECTION
EMITTER
BASE
COLLECTOR
EMITTER
COLLECTOR
STYLE 2:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
CATHODE
ANODE
NO CONNECTION
CATHODE
CATHODE
NO CONNECTION
ANODE
CATHODE
CATHODE
ANODE
NO CONNECTION
CATHODE
CATHODE
NO CONNECTION
ANODE
CATHODE
STYLE 3:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
COLLECTOR, DYE #1
BASE, #1
EMITTER, #1
COLLECTOR, #1
COLLECTOR, #2
BASE, #2
EMITTER, #2
COLLECTOR, #2
COLLECTOR, #3
BASE, #3
EMITTER, #3
COLLECTOR, #3
COLLECTOR, #4
BASE, #4
EMITTER, #4
COLLECTOR, #4
STYLE 5:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
DRAIN, DYE #1
DRAIN, #1
DRAIN, #2
DRAIN, #2
DRAIN, #3
DRAIN, #3
DRAIN, #4
DRAIN, #4
GATE, #4
SOURCE, #4
GATE, #3
SOURCE, #3
GATE, #2
SOURCE, #2
GATE, #1
SOURCE, #1
STYLE 6:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
STYLE 7:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
SOURCE N‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
GATE P‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
SOURCE P‐CH
SOURCE P‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
GATE N‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
SOURCE N‐CH
STYLE 4:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
SOLDERING FOOTPRINT
COLLECTOR, DYE #1
COLLECTOR, #1
COLLECTOR, #2
COLLECTOR, #2
COLLECTOR, #3
COLLECTOR, #3
COLLECTOR, #4
COLLECTOR, #4
BASE, #4
16X
EMITTER, #4
0.58
BASE, #3
EMITTER, #3
BASE, #2
EMITTER, #2
BASE, #1
EMITTER, #1
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4
8X
6.40
16X
1
1.12
16
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free
strategy and soldering details, please
download the ON Semiconductor Soldering
and Mounting Techniques Reference Manual, SOLDERRM/D.
MC10H116
PACKAGE DIMENSIONS
PDIP−16
CASE 648−08
ISSUE V
D
A
16
9
E
H
E1
1
NOTE 8
b2
8
c
B
TOP VIEW
END VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
e/2
NOTE 3
L
A1
C
D1
e
SEATING
PLANE
M
eB
END VIEW
16X b
SIDE VIEW
0.010
M
C A
M
B
M
STYLE 1:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
7. CATHODE
8. CATHODE
9. ANODE
10. ANODE
11. ANODE
12. ANODE
13. ANODE
14. ANODE
15. ANODE
16. ANODE
NOTE 6
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
DIM
A
A1
A2
b
b2
C
D
D1
E
E1
e
eB
L
M
INCHES
MIN
MAX
−−−−
0.210
0.015
−−−−
0.115 0.195
0.014 0.022
0.060 TYP
0.008 0.014
0.735 0.775
0.005
−−−−
0.300 0.325
0.240 0.280
0.100 BSC
−−−−
0.430
0.115 0.150
−−−−
10 °
MILLIMETERS
MIN
MAX
−−−
5.33
0.38
−−−
2.92
4.95
0.35
0.56
1.52 TYP
0.20
0.36
18.67 19.69
0.13
−−−
7.62
8.26
6.10
7.11
2.54 BSC
−−−
10.92
2.92
3.81
−−−
10 °
STYLE 2:
PIN 1. COMMON DRAIN
2. COMMON DRAIN
3. COMMON DRAIN
4. COMMON DRAIN
5. COMMON DRAIN
6. COMMON DRAIN
7. COMMON DRAIN
8. COMMON DRAIN
9. GATE
10. SOURCE
11. GATE
12. SOURCE
13. GATE
14. SOURCE
15. GATE
16. SOURCE
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