IRFR9120, IRFU9120, SiHFR9120, SiHFU9120 Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Dynamic dV/dt Rating - 100 RDS(on) (Ω) VGS = - 10 V Qg (Max.) (nC) 18 Qgs (nC) 3.0 Qgd (nC) 9.0 Configuration • Repetitive Avalanche Rated 0.60 RoHS* • Surface Mount (IRFR9120/SiHFR9120) COMPLIANT • Straight Lead (IRFU9120/SiHFU9120) • Available in Tape and Reel • P-Channel Single • Fast Switching S DPAK (TO-252) Available • Lead (Pb)-free Available DESCRIPTION IPAK (TO-251) G Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effictiveness. The DPAK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU/SiHFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 W are possible in typical surcace mount applications. D P-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free SnPb DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) IRFR9120PbF IRFR9120TRPbFa IRFR9120TRLPbFa SiHFR9120-E3 SiHFR9120T-E3a SiHFR9120TL-E3a IRFR9120 IRFR9120TRa IRFR9120TRLa SiHFU9120-E3 IRFU9120PbF SiHFR9120 SiHFR9120Ta SiHFR9120TLa SiHFU9120 IPAK (TO-251) IRFU9120PbF Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS - 100 Gate-Source Voltage VGS ± 20 Continuous Drain Current Pulsed Drain VGS at - 10 V TC = 25 °C TC = 100 °C Currenta ID IDM Linear Derating Factor (PCB Mount)e 0.020 Repetitive Avalanche Repetitive Avalanche Energya Maximum Power Dissipation TC = 25 °C Maximum Power Dissipation (PCB Mount)e TA = 25 °C Peak Diode Recovery dV/dtc A - 22 0.33 Currenta V - 5.6 - 3.6 Linear Derating Factor Single Pulse Avalanche Energyb UNIT W/°C EAS 210 mJ IAR - 5.6 A EAR 4.2 mJ PD dV/dt 42 2.5 - 5.5 W V/ns www.kerrsemi.com 1 IRFR9120, IRFU9120, SiHFR9120, SiHFU9120 ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) SYMBOL LIMIT UNIT TJ, Tstg - 55 to + 150 °C 260d for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = - 25 V, starting TJ = 25 °C, L = 10 mH, RG = 25 Ω, IAS = - 5.6 A (see fig. 12). c. ISD ≤ - 6.8 A, dI/dt ≤ 110 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). THERMAL RESISTANCE RATINGS PARAMETER SYMBOL MIN. TYP. MAX. Maximum Junction-to-Ambient RthJA - - 110 Maximum Junction-to-Ambient (PCB Mount)a RthJA - - 50 Maximum Junction-to-Case (Drain) RthJC - - 3.0 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = - 250 µA - 100 - - V ΔVDS/TJ Reference to 25 °C, ID = - 1 mA - - 0.098 - V/°C VGS(th) VDS = VGS, ID = - 250 µA - 2.0 - - 4.0 V nA Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance IGSS IDSS RDS(on) gfs VGS = ± 20 V - - ± 100 VDS = - 100 V, VGS = 0 V - - - 100 VDS = - 80 V, VGS = 0 V, TJ = 125 °C - - - 500 VGS = - 10 V ID = - 3.4 Ab VDS = - 50 V, ID = - 3.4 A µA - - 0.60 Ω 1.5 - - S - 390 - - 170 - - 45 - Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs VGS = 0 V, VDS = - 25 V, f = 1.0 MHz, see fig. 5 VGS = - 10 V ID = - 6.8 A, VDS = - 80 V, see fig. 6 and 13b - - 18 - - 3.0 Gate-Drain Charge Qgd - - 9.0 Turn-On Delay Time td(on) - 9.6 - - 29 - - 21 - - 25 - - 4.5 - - 7.5 - Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance tr td(off) VDD = - 50 V, ID = - 6.8 A, RG = 18 Ω, RD = 7.1 Ω, see fig. 10b tf LD LS Between lead, 6 mm (0.25") from package and center of die contact D nC ns nH G S www.kersemi.com 2 pF IRFR9120, IRFU9120, SiHFR9120, SiHFU9120 SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. - - - 5.6 - - - 22 - - - 6.3 UNIT Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = - 5.6 A, VGS = 0 Vb TJ = 25 °C, IF = - 6.8 A, dI/dt = 100 A/µsb V - 100 200 ns - 0.33 0.66 µC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 3 - Typical Transfer Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature www.kersemi.com 3 IRFR9120, IRFU9120, SiHFR9120, SiHFU9120 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.kersemi.com 4 Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area IRFR9120, IRFU9120, SiHFR9120, SiHFU9120 RD VDS VGS D.U.T. RG +VDD - 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit td(on) tr td(off) tf VGS 10 % 90 % VDS Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case www.kersemi.com 5 IRFR9120, IRFU9120, SiHFR9120, SiHFU9120 L Vary tp to obtain required IAS IAS VDS VDS D.U.T RG + V DD VDD IAS tp - 10 V 0.01 Ω tp Fig. 12a - Unclamped Inductive Test Circuit VDS Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG - 10 V 12 V 0.2 µF 0.3 µF QGS - QGD D.U.T. VG + VDS VGS - 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.kersemi.com 6 Fig. 13b - Gate Charge Test Circuit IRFR9120, IRFU9120, SiHFR9120, SiHFU9120 Peak Diode Recovery dV/dt Test Circuit D.U.T. + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - RG + • dV/dt controlled by RG • ISD controlled by duty factor "D" • D.U.T. - device under test + - VDD Compliment N-Channel of D.U.T. for driver Driver gate drive P.W. Period D= P.W. Period VGS = - 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage VDD Body diode forward drop Inductor current Ripple ≤ 5 % * ISD VGS = - 5 V for logic level and - 3 V drive devices Fig. 14 - For P-Channel www.kersemi.com 7