Micron MT9T001P12STC 1/2-inch 3-megapixel cmos digital image sensor Datasheet

MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Features
1/2-Inch 3-Megapixel CMOS Digital
Image Sensor
MT9T001P12STC
For the latest data sheet, refer to Micron’s Web site: www.micron.com/imaging
Features
Table 1:
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DigitalClarity™ Image sensor technology
High frame rate
Global reset release
Horizontal and vertical binning
Column and row skip modes
Superior low-light performance
Low dark current
Simple two-wire serial interface
Programmable controls: Gain, frame rate, frame
size, exposure
• Pin-for-pin compatible with Micron’s 1.3-megapixel
MT9M001 and 2-megapixel MT9D001
Parameter
Optical format
Active imager size
Active pixels
Pixel size
Color filter array
Shutter type
Maximum data rate/
master clock
QXGA
(2,048 x 1,536)
UXGA
Frame (1,600 x 1,200)
rate
SXGA
(1,280 x 1,024)
XGA
(1,024 x 768)
VGA (640 x 480)
ADC resolution
Responsivity
Dynamic range
SNRMAX
Supply voltage
Power consumption
Applications
• Digital still cameras
• Digital video cameras
• Converged DSCs/camcorders
General Description
The Micron® Imaging MT9T001 is a QXGA-format 1/2inch CMOS active-pixel digital image sensor with an
active imaging pixel array of 2,048H x 1,536V. It incorporates sophisticated camera functions on-chip such
as windowing, column and row skip mode, and snapshot mode. It is programmable through a simple twowire serial interface.
The 3-megapixel CMOS image sensor features DigitalClarity—Micron’s breakthrough low-noise CMOS
imaging technology that achieves CCD image quality
(based on signal-to-noise ratio and low-light sensitivity) while maintaining the inherent size, cost, and integration advantages of CMOS.
Operating temperature
Packaging
Typical Value
1/2-inch (4:3)
6.55mm(H) x 4.92mm(V)
8.19 (Diagonal)
2,048H x 1,536V
3.2μm x 3.2μm
RGB Bayer pattern
Global reset release (GRR),
electronic rolling shutter (ERS)
48 MPS/48 MHz
Programmable up to 12 fps
Programmable up to 20 fps
Programmable up to 27 fps
Programmable up to 43 fps
Programmable up to 93 fps
10-bit, on-chip
>1.0 V/lux-sec (550nm)
61dB
43dB
3.0V−3.6V (3.3V nominal)
240mW (nominal);
2µW (standby)
0°C to +60°C
48-pin PLCC
The MT9T001 produces extraordinarily clear, sharp
digital pictures, and its ability to capture both continuous video and single frames makes it the perfect choice
for a wide range of consumer and industrial applications, including digital still cameras, digital video cameras, and PC cameras.
The sensor can be operated in its default mode or programmed by the user for frame size, exposure, gain setting, and other parameters. The default mode outputs
a QXGA image at 12 frames per second (fps). An onchip analog-to-digital converter (ADC) provides 10 bits
per pixel. FRAME_VALID and LINE_VALID signals are
output on dedicated pins, along with a pixel clock that
is synchronous with valid data.
81004bad/80ffb422
MT9T001_3100_DS_1.fm - Rev. D 7/05 EN
Key Performance Parameters
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are for subject to change by Micron without notice.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Table of Contents
Table of Contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General Description (continued). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Pixel Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Pixel Array Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Output Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Output Data Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Frame Timing Formulas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Feature Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Window Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Window Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Electronic Panning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Blanking Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Frame Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
High Frame Rate Readout Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Pixel Integration Time Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Snapshot Mode and Flash Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Setting up for Snapshot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Triggering A Snapshot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Strobe Pulse Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Global Shutter Release Snapshot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Programmed Exposure Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Bulb Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Skip and Bin Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Smaller Format Resolution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Line_Valid Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Gain Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Black Level Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Manual Black Level Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Black Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Standby Control and Chip Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Serial Bus Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Bus Idle State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Start Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Stop Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Slave Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Data Bit Transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Acknowledge Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
No-Acknowledge Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Two-Wire Serial Interface Sample Write and Read Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
16-Bit Write Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
16-Bit Read Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Data Output and Propagation Delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
81004bad/80ffb422
MT9T001_3100_DSTOC.fm - Rev. D 7/05 EN
2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Table of Contents
Two-Wire Serial Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Rev D, 06/2005 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Rev C, Preliminary 09/2004 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Rev B, Preliminary 03/2004 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Rev A, Verion 1.0, Preliminary 12/2003 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
81004bad/80ffb422
MT9T001_3100_DSTOC.fm - Rev. D 7/05 EN
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
List of Figures
List of Figures
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Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Typical Configuration (Connection) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Pinout-48-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Pixel Array Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Pixel Color Pattern Detail (Top Right Corner) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Spatial Illustration of Image Readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Timing Example of Pixel Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Row Timing and FRAME_VALID/LINE_VALID Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Windowing Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Windowing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Column Skip 2x; Row Skip 2X Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Column Skip 3x; Row Skip 3X Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Column Skip 4x; Row Skip 4X Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Column Skip 8x; Row Skip 8X Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Bin 2-to-1: 2,048H x 1,536V (QXGA) to 1,024H x 768V (XGA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Bin 3-to-1: 2,048H x 1,536V (QXGA) to 640H x 480V (VGA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Different LINE_VALID Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Timing Diagram Showing a Write to Reg0x09 with the Value 0x0284 . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Timing Diagram Showing a Read from Reg0x09; Returned Value 0x0284 . . . . . . . . . . . . . . . . . . . . . . .34
Data Output Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Serial Host Interface Start Condition Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Serial Host Interface Stop Condition Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Serial Host Interface Data Timing for Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Serial Host Interface Data Timing for Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Acknowledge Signal Timing After an 8-Bit Write to the Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Acknowledge Signal Timing After an 8-Bit Read from the Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Quantum Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Image Center Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
48-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
81004bad/80ffb422
MT9T001_3100_DSLOF.fm - Rev. D 7/05 EN
4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
List of Tables
List of Tables
Table 1:
Table 2:
Table 3:
Table 4:
Table 5:
Table 6:
Table 7:
Table 8:
Table 9:
Table 10:
Table 11:
Table 12:
Table 13:
Table 14:
Table 15:
Table 16:
Key Performance Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Frame Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Register List and Default Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Reserved Register List and Default Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Standard Resolutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Wide Screen (16:9) Resolutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Auto Focus Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
STROBE Pulse Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Bin and Skip Mode Resolution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Skip and Bin Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Gain Increment Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
81004bad/80ffb422
MT9T001_3100_DSLOT.fm - Rev. D 7/05 EN
5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
General Description (continued)
General Description (continued)
Figure 1: Block Diagram
Two-Wire
Serial Interface
Control Register
Active-Pixel
Sensor (APS)
Array
Timing
and
Control
Analog Processing
Clock
Sync
Signals
10-bit
Data
ADC
Figure 2: Typical Configuration (Connection)
3.3V Analog
3.3V Digital
1.5KΩ
+
1.5KΩ
.1μF
2.2μF
Two-wire {
serial bus
6
5
4
3
2
1
48
47
46
45
44
43
1KΩ
NC
DGND
VDD
NC
NC
VAAPIX
AGND
AGND
SCLK
SDATA
NC
DGND
+
7
8
9
10
11
12
13
14
15
16
17
18
TRIGGER
GSHT_CTL
.01μF
MT9T001
NC
FRAME_VALID
LINE_VALID
STROBE
DGND
VDD
D9
D8
D7
D6
D5
PIXCLK
42
41
40
39
38
37
36
35
34
33
32
31
FRAME_VALID
LINE_VALID
STROBE
D9
D8
D7
D6
D5
PIXCLK
19
20
21
22
23
24
25
26
27
28
29
30
.1μF
STANDBY
TRIGGER
NC
RESET#
NC
GSHT_CTL
OE#
NC
AGND
VAA
AGND
AGND
NC
VAA
AGND
VDD
DGND
D0
D1
D2
D3
D4
CLKIN
NC
10μF
CLKIN
D4
D3
D2
D1
D0
Note:
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Resistor value 1.5KΩ is recommended, but may be greater for slower two-wire speed.
6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
General Description (continued)
NC
DGND
VDD
NC
NC
VAAPIX
AGND
AGND
SCLK
SDATA
NC
DGND
Figure 3: 48-Pin PLCC
6
5
4
3
2
1
48
47
46
45
44
43
39
STROBE
NC
11
38
DGND
GSHT_CTL
12
37
VDD
OE#
13
36
DOUT<9>
NC
14
35
DOUT<8>
AGND
15
34
DOUT<7>
VAA
16
33
DOUT<6>
AGND
17
32
DOUT<5>
AGND
18
31
PIXCLK
20
21
22
23
24
25
26
27
28
29
30
NC
19
CLKIN
10
DOUT<4>
RESET#
DOUT<3>
LINE_VALID
DOUT<2>
NC
DOUT<1>
FRAME_VALID
40
DOUT<0>
41
9
DGND
TRIGGER
VDD
NC
AGND
42
8
VAA
7
NC
STANDBY
.
Table 1:
Pin Descriptions
Pin
Numbers
Symbol
Type
7
STANDBY
Input
8
10
TRIGGER
RESET#
Input
Input
13
OE#
Input
29
46
12
45
24, 25, 26,
27, 28, 32,
33, 34, 35, 36
31
CLKIN
SCLK
GSHT_CTL
SDATA
DOUT<0–9>
Input
Input
Input
I/O
Output
PIXCLK
Output
39
STROBE
Output
40
LINE_VALID
Output
41
FRAME_VALID
Output
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Description
Standby: activates (HIGH) standby mode, disables analog bias circuitry for
power saving mode.
Trigger: activates (HIGH) snapshot sequence.
Reset: activates (LOW) asynchronous reset of sensor. All registers assume
factory defaults.
Output enable: OE# when HIGH, places outputs DOUT<0–9>, FRAME_VALID,
LINE_VALID, PIXCLK, and STROBE into a tri-state configuration.
Clock in: master clock into sensor (48 MHz maximum).
Serial clock: clock for serial interface.
Global shutter control.
Serial data: serial data bus, requires 1.5KΩ resistor to 3.3V for pull-up.
Data out: pixel data output bit 0, DOUT<9> (MSB), DOUT<0> (LSB).
Pixel clock: pixel data outputs are valid during falling edge of this clock.
Frequency = (master clock).
Strobe: output is pulsed HIGH to indicate sensor reset operation of pixel array
has completed.
Line valid: output is pulsed HIGH during line of selectable valid pixel data (see
Reg0x20 for options).
Frame valid: output is pulsed HIGH during frame of valid pixel data.
7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
General Description (continued)
Table 1:
Pin
Numbers
1
4, 22, 37
5, 23, 38, 43
16, 20
15, 17, 18,
21, 47, 48
2, 3, 6, 9,
11,14,19, 30
42, 44
Pin Descriptions (continued)
Symbol
Type
VAAPIX
VDD
DGND
VAA
AGND
Supply
Supply
Supply
Supply
Supply
NC
–
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Description
Analog pixel power: provide power supply for pixel array, 3.3V ±0.3V.
Digital power: provide power supply for digital block, 3.3V ±0.3V.
Digital ground: provide isolated ground for digital block.
Analog power: provide power supply for analog block, 3.3V ±0.3V.
Analog ground: provide isolated ground for analog block and pixel array.
No connect: these pins must be left unconnected.
8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Pixel Data Format
Pixel Data Format
Pixel Array Structure
The MT9T001 pixel array is configured as 2,112 columns by 1,568 rows, as shown in
Figure 4. Columns from 0 through 27 and from 2,085 through 2,111, and also rows from
0 through 15 and from 1,561 through 1,567 are optically black. These optical black columns and rows can be used to monitor the black level. The black row data is used internally for the automatic black level adjustment. However, the black rows and columns
can also be read out by setting Reg0x20 (11) and Reg0x1E (7), respectively. There are
2,057 columns by 1,545 rows of optically active pixels, which provides a four-pixel
boundary around the QXGA (2,048 x 1,536) image to avoid boundary effects during color
interpolation and correction.
The MT9T001 uses a Bayer color pattern, as shown in Figure 5. The even-numbered
rows contain green and red color pixels, and odd-numbered rows contain blue and
green color pixels. The even-numbered columns contain green and blue color pixels;
odd-numbered columns contain red and green color pixels.
Figure 4: Pixel Array Description
16 black rows
(0, 0)
4
27 black columns
QXGA (2,048 x 1,536)
+ 4 pixel boundary for
color correction
+ additional active column
+ additional active row
= 2,057 x 1,545 active pixels
5
4
28 black columns
5
(2111, 1567)
7 black rows
Figure 5: Pixel Color Pattern Detail (Top Right Corner)
column readout direction
..
.
black pixels
Pixel
(28, 16)
row
readout
direction
...
G
R
G
R
G
R
G
B
G
B
G
B
G
B
G
R
G
R
G
R
G
B
G
B
G
B
G
B
G
R
G
R
G
R
G
B
G
B
G
B
G
B
..
.
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
9
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Pixel Data Format
Output Data Format
The MT9T001 image data is read out in a progressive scan. Valid image data is surrounded by horizontal blanking and vertical blanking, as shown in Figure 6. The amount
of horizontal blanking and vertical blanking is programmable through Reg0x05 and
Reg0x06, respectively. LINE_VALID is HIGH during the shaded region of the figure.
FRAME_VALID timing is described in “Output Data Timing” on page 10.
Figure 6: Spatial Illustration of Image Readout
P0,0 P0,1 P0,2.....................................P0,n-1 P0,n
P1,0 P1,1 P1,2.....................................P1,n-1 P1,n
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
VALID IMAGE
HORIZONTAL
BLANKING
Pm-1,0 Pm-1,1.....................................Pm-1,n-1 Pm-1,n 00 00 00 .................. 00 00 00
Pm,0 Pm,1.....................................Pm,n-1 Pm,n
00 00 00 .................. 00 00 00
00 00 00 ..................................... 00 00 00
00 00 00 ..................................... 00 00 00
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
VERTICAL BLANKING
VERTICAL/HORIZONTAL
BLANKING
00 00 00 ..................................... 00 00 00
00 00 00 ..................................... 00 00 00
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
Output Data Timing
The data output of the MT9T001 is synchronized with the PIXCLK output. When
LINE_VALID is HIGH, one 10-bit pixel datum is output every PIXCLK period.
The PIXCLK can be used as a clock to latch the data. DOUT data is valid on the falling
edge of PIXCLK in default mode. The PIXCLK is HIGH while master clock is HIGH and
then LOW while master clock is LOW. It is continuously enabled, even during the blanking period. The parameters in P, A, and Q shown in Figure 8 are defined in Table 2.
Figure 7: Timing Example of Pixel Data
....
LINE_VALID
....
PIXCLK
Blanking
DOUT9-DOUT0
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
P0
(9:0)
P1
(9:0)
P2
(9:0)
10
P3
(9:0)
Blanking
....
Valid Image Data
P4
(9:0)
....
Pn-1
(9:0)
Pn
(9:0)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Pixel Data Format
Figure 8: Row Timing and FRAME_VALID/LINE_VALID Signals
...
FRAME_VALID
...
LINE_VALID
...
Number of master clocks P1+P2
A
Q
A
Q
A
P3
Frame Timing Formulas
Table 2:
Frame Timing
Parameter
Name
Equation (Pixel Clocks = Master Clock)
R
Active Rows
A
Active Columns
P1
Frame Start Blanking 1
P2
Frame Start Blanking 2
P3
Frame End Blanking 3
((Reg0x03 + 1)/((Reg0x22[2–0] + 1)))
(rounded up to next even number)
((Reg0x04 + 1)/((Reg0x23[2–0] + 1)))
(rounded up to next even number)
331 if Reg0x22[5–4] = 0, normal
673 if Reg0x22[5–4] = 1, Bin 2x
999 if Reg0x22[5–4] = 2, Bin 3x
38 if Reg0x23[5–4] = 0, normal
22if Reg0x23[5–4] = 1, Bin 2x
14 if Reg0x23[5–4] = 2, Bin 3x
Reg0x05 (minimum Reg0x05 value = 21)
Q
Horizontal Blanking
P1 + P2 + P3
P4
Shutter Overhead
Reg0x0C + 316 x (Reg0x23[5–4] +1)
t
RowTime
The greater of: (A + Q) or (P1+ P4)
V
Vertical Blanking
(Reg0x06 + 1) x tROW
tFV
Frame Valid Time
R x tROW
tFRAME
Total Frame Time
The greater of: ((65536 x Reg0x08 + Reg0x09) x tROW)
or (tFV + V)
ROW
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
11
Default Timing at
48 MHz
1,536 pixel clocks
= 32.0µs
2,048 pixel clocks
= 42.67µs
331pixel clocks
= 6.89µs
38 pixel clocks
= 0.79µs
142 pixel clocks
= 2.96µs
511 pixel clocks
= 10.65µs
316 pixel clocks
= 6.58µs
2,559 pixel clocks
= 53.31µs
66,534 pixel clocks
= 1.39ms
3,930,624 pixel clocks
= 81.89ms
3,997,158 pixel clocks
= 83.27ms
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Registers
Registers
Table 3:
Register List and Default Values
Register # (Hex)
Description
Data Format (Binary)
Default Value (Hex)
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x1E
0x20
0x21
0x22
0x23
0x2B
0x2C
0x2D
0x2E
0x32
0x35
0x49
0x4B
0x5D
0x5F
0x60
0x61
0x62
0x63
0x64
0xF8
0xFF
Chip Version
Row Start
Column Start
Row Size (Window Height)
Col Size (Window Width)
Horizontal Blanking
Vertical Blanking
Output Control
Shutter Width Upper
Shutter Width
Pixel Clock Control
Restart
Shutter Delay
Reset
Read Mode 1
Read Mode 2
Read Mode 3
Row Address Mode
Column Address Mode
Green1 Gain
Blue Gain
Red Gain
Green2 Gain
Test Data
Global Gain
Black Level
Row Black Default Offset
BLC Delta Thresholds
Cal Threshold
Green1 Offset
Green2 Offset
Black Level Calibration
Red Offset
Blue Offset
Chip Enable/Synchronize
Chip Version
1011 0001 0000 0001
0000 00dd dddd ddd0
0000 0ddd dddd ddd0
0000 00dd dddd ddd1
0000 0ddd dddd ddd1
0000 00dd dddd dddd
0000 00dd dddd dddd
0d00 0000 d0dd 00dd
0000 0000 0000 dddd
dddd dddd dddd dddd
dddd dddd dddd dddd
0000 0000 0000 000d
0000 00dd dddd dddd
0000 0000 0000 000d
1100 dddd 0100 0000*
ddd0 ddd0 0000 00dd
0000 0000 0000 00dd
0ddd 0ddd 0ddd 0ddd
0000 0ddd 00dd 0ddd
0ddd dddd 0d0d dddd
0ddd dddd 0d0d dddd
0ddd dddd 0d0d dddd
0ddd dddd 0d0d dddd
0000 0ddd dddd dd00
dddd dddd dddd dddd
0000 0ddd dddd dddd
0000 0ddd dddd dddd
0ddd dddd 0ddd dddd
dddd dddd dddd dddd
0000 000d dddd dddd
0000 000d dddd dddd
dddd d000 0000 00dd
0000 0ddd dddd dddd
0000 0ddd dddd dddd
0000 0000 0000 00dd
0001 0110 0010 0001
0x1621
0x0014
0x0020
0x05FF
0x07FF
0x008E
0x0019
0x0002
0x0000
0x0619
0x0000
0x0000
0x0000
0x0000
0xC040**
0x2000
0x0000
0x0000
0x0000
0x0008
0x0008
0x0008
0x0008
0x0000
0x0008
0x00A8
0x0028
0x2D13
0x231D
0x0020
0x0020
0x0000
0x0020
0x0020
0x0001
0x1621
Note:
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
1 = always 1
0 = always 0
d = programmable
? = read only
*It is recommended that bit 14 be cleared
**Value 0x8040 is recommended
12
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Registers
Table 4:
Reserved Register List and Default Values
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Register # (Hex)
Description
Default Value (Hex)
0x27
0x29
0x30
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x4A
0x4C
0x4D
0x4E
0x4F
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x5B
0x5C
0x5E
0x65
0x67
0x68
0x69
0x6A
0x6B
0x6C
0x6D
0x6E
0x70
0x71
0x72
0x73
0x74
0x75
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0x0001
0x0401
0x0000
0x0010
0x0005
0x0003
0x0002
0x0005
0x0003
0x0003
0x0003
0x0003
0x0010
0x0010
0x0010
0x0010
0x0010
0x0030
0x0020
0x0010*
0x0014
0x8004
0x0002
0x8004
0x0002
0x0010
0x0010
0x0020
0x0007
0x071C
0x5364
0x0000
0x3FFF
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x00A3
0xA204
0xA006
0x260A
0x280C
0x520D
13
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Registers
Table 4:
Reserved Register List and Default Values (continued)
Note:
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Register # (Hex)
Description
Default Value (Hex)
0x76
0x77
0x78
0x79
0x7A
0x7B
0x7C
0x7D
0x7E
0x7F
0x80
0x81
0x82
0x83
0x84
0x86
0x87
0x89
0x8A
0x8B
0x8C
0x90
0x91
0x92
0xF1
0xFA
0xFB
0xFC
0xFD
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0x7054
0x0000
0x9C57
0x9E02
0x9E04
0x9E06
0xA006
0x5308
0x3208
0x7C52
0x004E
0x4E00
0x4C02
0x480C
0x4A0E
0x2E0C
0x0000
0x4C02
0x0000
0x4F0A
0x3A0A
0x061F
0x0000
0x0001
0x0000
0x0000
0x0000
0x0000
0x0000
Even reading some of these registers causes this part to go into an unknown state.
*Value 0x0020 is recommended
14
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Registers
Register Description
Table 5:
Register Descriptions
Register
Chip ID
0x00
Row Start
0x01
Column Start
0x02
Bit
Description
15:0
This register is read-only and gives the chip identification number: 0x1621.
10:0
First row to be read out—default = 0x0014 (20), register value must be an even number.
11:0
First column to be read out—default = 0x0020 (32), register value must be an even number.
Note: If column bin is enabled, the value must be a multiple of Reg0x23 [5:4] + 1.
Row Size
0x03
10:0
Window height (number of rows - 1)—default = 0x5FF (1535), register value must be an odd
number. Minimum value for 0x03 = 0x0001.
Column Size
0x04
10:0
Window width (number of columns - 1)—default = 0x7FF (2047), register value must be an odd
number. Minimum value for 0x04 = 0x0001.
Horizontal Blank
10:0 Horizontal Blank—default = 0x008E (142 pixels). Minimum value = 0x0015 (21).
0x05
Vertical Blank
10:0 Vertical Blank—default = 0x0019 (25 rows). Minimum value = 0x0003 (3).
0x06
Output Control
This register controls various features of the output format for the sensor.
0
0x07
Synchronize changes.
0 = normal operation, update changes to registers that affect image brightness (integration time,
shutter delay, gain, horizontal and vertical blank, window size, row/column skip, or row mirror)
at the next frame boundary.
1 = do not update any changes to these settings until this bit is returned to “0.”
1
Chip Enable.
1 = normal operation.
0 = sensor readout is stopped and analog control signals are put in a state which draws minimal
power.
6
Override pixel data.
0 = normal operation.
1 = output programmed test data (see Reg0x32).
When set, a test pattern will be output instead of the sampled image from the sensor array. The
value sent to the DOUT<9:0> pins will alternate between the Test Data register (Reg0x32) in even
columns and the inverse of the Test Data register for odd columns. The output “image” will have
the same width, height, and frame rate as it would otherwise have. No digital processing (gain or
offset) is applied to the data. When clear (the default), sampled pixel values are output normally.
Shutter Width Upper
15:0 The most significant bits of the shutter width, which are combined with Shutter Width (Reg0x09).
0x08
The total shutter width is therefore: (((Shutter_Width_Upper) x 65536) + Shutter_Width). This
should allow a shutter width from about 50us to about 50s at default row time.
Shutter Width
15:0 Number of rows of integration, the exposure time; the time between when the rolling shutter
0x09
resets a row and that row is read out, in rows.
Default = 0x0619 (1561). Minimum value = 0x0001 (1).
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Registers
Table 5:
Register Descriptions (continued)
Register
Bit
Pixel Clock Control
15
0x0A
10:8
6:0
Frame Restart
0x0B
0
Shutter Delay
0x0C
10:0
Description
Invert Pixel Clock—default = 0x00 (0)
When set, line_valid, frame_valid, and data10_out are set up to the rising edge of PIXCLK. When
clear, they are set up to the falling edge. This is accomplished by inverting the PIXCLK output.
Shift Pixel Clock—default = 0x00 (0)
Two's complement value representing how far to shift the PIXCLK output pin relative to DOUT, in
CLKIN cycles. Positive values shift PIXCLK later in time relative to DOUT (and thus relative to the
internal array/datapath clock. No effect unless PIXCLK is divided by Divide Pixel Clock.
Divide Pixel Clock —default = 0x00 (0)
Produces a PIXCLK that is divided by the value times two. The value must be a power of 2. This
slows down the internal clock in the array control and datapath blocks, including pixel readout. It
does not affect the two-wire serial interface clock. A value of 0 corresponds to a PIXCLK with the
same frequency as CLK_IN. A value of 1 means f_PIXCLK = (f_CLK_IN / 2); 2 means f_PIXCLK =
(f_CLK_IN / 4); 64 means f_PIXCLK = (f_CLK_IN / 128); etc.
Setting bit 0 to “1” of Reg0x0B causes the sensor to abandon the readout of the current frame
and restart from the first row. This register automatically resets itself to 0x0000 after the frame
restart. The first frame after this event is considered to be a "bad frame" (see description for
Reg0x20, bit 0).
Shutter delay—default = 0x0000 (0). This is the number of pixel clocks that the timing and control
logic waits before asserting the reset for a given row.
Reset
0x0D
0
Setting this bit puts the sensor into reset mode, which sets the sensor to its default power-up
state. Clearing this bitresumes normal operation.
Read Mode 1
0x1E
8
Snapshot Mode—default is 0 (continuous mode).
1 = enable Snapshot trigger signal can come from outside signal (trigger pin 8 on the sensor) or
from serial interface register restart, i.e. programming a “1” to bit 0 of Reg0x0B.
Strobe Enable—default is 0 (no strobe signal).
1 = enable strobe (signal output from the sensor during the time all rows are integrating). See
strobe width for more information.
Strobe Width—default is 0 (strobe signal width at minimum length, one row of integration time,
prior to Line_Valid going high).
1 = extend strobe width (strobe signal width extends to entire time all rows are integrating;
shutter width must be >= row size + vertical blanking).
Strobe Override—default is 0 (strobe signal created by digital logic).
1 = override strobe signal (strobe signal is set high when this bit is set, low when this bit is set low.
It is assumed that strobe enable is set to “0” if strobe override is being used).
9
10
11
Read Mode 2
0x20
0
9
10
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No bad frames—1 = output all frames (including bad frames).
0 = default, only output good frames. A bad frame is defined as the first frame following a
change to: window size or position, horizontal blanking, row or column skip, or mirroring.
1 = "Continuous" LINE_VALID (continue producing Line_Valid during vertical blanking).
0 = Normal Line_Valid (default, no Line_Valid during vertical blank).
1 = LINE_VALID = "Continuous" LINE_VALID XOR FRAME_VALID.
0 = LINE_VALID determined by bit 9 (default).
16
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Registers
Table 5:
Register Descriptions (continued)
Register
Bit
Description
Read Mode 3
0x21
0
Global Reset—default = 0x0000—when set, snapshot mode makes use of the global reset—that
is, the entire array is released from reset simultaneously. Ineffective unless Snapshot (Reg0x1E[8])
is set.
Use GSHT_CTL—default = 0x0000.
When set, the leading edge of the GSHT_CTL pad signal is used to start the shutter sequence in
snapshot mode, and the trailing edge starts the read sequence. When clear, the leading edge of
the TRIGGER pad signal is used to initiate the shutter sequence, the trailing edge of GSHT_CTL
starts the exposure, and the trailing edge of the TRIGGER pad signal is used to start the strobe
and readout. Ineffective unless Snapshot (Reg0x1E[8]) and Global Reset are set.
1
Row Address Mode
2:0
0x22
Row Skip—the number of row-pairs to skip for every row read. For example, “0” means read
every row pair. “1” is skip 2x; 2 is skip 3x, etc. If Row Bin is non-zero, this should be set to the
interval between the first rows in each bin. For full binning, Row Skip equals Row Bin.
5:4
Row Bin—the number of rows to be read per row output minus one. For normal read out, this
should be “0.” For Bin 2x, it should be “1”; for Bin 3x, it should be “2.”
Column Address Mode
2:0
0x23
Column Skip—the number of column-pairs to skip for every pair read. Zero means read every
column. “1” means skip one pair for every pair read (Skip 2x); 2 means skip 2 pairs for every pair
read (Skip 3x) etc.
5:4
Column Bin—the number of columns to be addressed per column read out minus one. Zero
produces standard 1:1 read out. A value of “1” produces Bin 2x; “2” would be Bin 3x.
Note: Column start address value must be a multiple of Reg0x23 [5:4] + 1.
Green1 Gain
6:0
0x2B
Green1 analog gain—default = 0x08 (8) = 1x gain.
14:8 Green1 digital gain—default = 0x00 (0) = 1x gain.
Blue Gain
6:0
0x2C
Blue analog gain—default = 0x08 (8) = 1x gain.
14:8 Blue digital gain—default = 0x00 (0) = 1x gain.
Red Gain
6:0
0x2D
Red analog gain—default = 0x08 (8) = 1x gain.
14:8 Red digital gain—default = 0x00 (0) = 1x gain.
Green2 Gain
6:0
0x2E
Green2 analog gain—default = 0x08 (8) = 1x gain.
14:8 Green2 digital gain—default = 0x00 (0) = 1x gain.
Test Data
11:2 Test Data—the data inserted into the data path to produce test pattern when "Use Test Data"
0x32
(Reg0x07, bit 6) is set. Test Data will be inserted for even columns, and the inverse will be inserted
for odd columns.
Global Gain
6:0
0x35
Global analog gain—default = 0x08 (8) = 1x gain.
14:8 Global digital gain—default = 0x00 (0) = 1x gain. This register can be used to set all four gains at
once. When read, it returns the value stored in Reg0x2B.
Black Level
11:2 Desired black level in image.
0x49
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Registers
Table 5:
Register
Register Descriptions (continued)
Bit
Description
Black Level Calibration Coarse Thresholds
6:0
0x5D
Low Coarse Threshold—default = 0x13. This value should be less than Low Target Threshold. See
High Coarse Threshold below.
14:8 High Coarse Threshold—default = 0x2D. If the average black value for a color is higher than this
value or lower than Low Coarse Threshold, the coarse mode is activated (if enabled). Once the
black level is between the High Coarse Threshold and the Low Coarse Threshold, the fine method
is used. This value should be set no lower than High Target Threshold.
Black Level Calibration Target Thresholds
6:0
0x5F
Thres_lo: Lower threshold for black level in units of ADC LSBs—default = 29.
14:8 Thres_hi: Upper threshold for black level in units of ADC LSBs—default = 35. When the black
value for a color is within these thresholds, it is considered to be on target.
Green1 Offset
8:0
0x60
Cal Green1—Two's complement representation of analog offset correction value for Green1.
Green2 Offset
8:0
0x61
Cal Green2—Two's complement representation of analog offset correction value for Green2.
Black Level Calibration
0
0x62
Manual override of black level correction.
1 = override automatic black level correction with programmed values.
0 = normal operation (default).
1
Force/disable black level calibration.
0 = Enable Offset Correction (default).
1 = disable Offset Correction Voltage (Offset Correction Voltage = 0.0V).
12
Recalculate Black Level—1 = start a new running digitally filtered average for the black level (this
is internally reset to “0” immediately), and do a rapid sweep to find the new starting point.
0 = normal operation (default).
13
Lock Red/Blue Calibration—when set, only one calibration value is used for both red and blue
channels. Default is 0, set to “0” at all times.
Note: Gain for Red and Blue channels must be equal for setting to be effective.
14
Lock Green Calibration—when set, only one calibration value is used for both Green1 and Green2
channels. Default is 0, set to “0” at all times.
Note: Gain for Green1 and Green2 channels must be equal for setting to be effective.
Red Offset
8:0
0x63
Cal Red.
Two's complement representation of analog offset correction value for Red.
Blue Offset
8:0
0x64
Cal Blue.
Two's complement representation of analog offset correction value for Blue.
Chip Enable and Two-Wire Serial Interface Write Synchronize
0
0xF8
Mirrors the functionality of Reg0x07 bit 1, (Chip Enable).
1 = normal operation.
0 = stop sensor read out. When this is returned to “1,” sensor read out restarts at the starting row
in a new frame.
1
Mirrors the functionality of Reg0x07 bit 0 (Synchronize changes).
0 = normal operation, update changes to registers that affect image brightness (integration time,
integration delay, gain, horizontal and vertical blank, window size, row/column skip, or row/
column mirror) at the next frame boundary.
1 = do not update any changes to these settings until this bit is returned to”0.”
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Feature Description
Window Control
Reg0x01, Reg0x02, Reg0x03, and Reg0x04
These registers control the size of the window.
Window Size
The default programmed window size is 2,048 columns by 1,536 rows (2,048H x 1,536V).
The control logic allows the flexibility to change the window size by programming
Reg0x03 and Reg0x04. Reg0x03 controls the window height (number of rows) and
Reg0x04 controls the window width (number of columns). The value to be programmed
in Reg0x03 is the desired number of rows -1. The value to be programmed in Reg0x04 is
the desired number of columns -1.
The minimum value for Reg0x03 is 0x0001; for Reg0x04, 0x0001. Thus, the smallest window size is two columns by two rows (2H x 2V). The value of Reg0x03 and Reg0x04 must
be an odd number (there can only be even number of columns). The user can program
the window size to be any format desired. Table 6 shows examples of register settings to
achieve various resolutions and frame rates.
Table 6:
Standard Resolutions
Resolution
2,048 x 1,536 QXGA
1,600 x 1,200 UXGA
1,280 x 1,024 SXGA
1,024 x 768 XGA
800 x 600 SVGA
640 x 480 VGA
Table 7:
Frame Rate
Column_Size
(Reg0x04)
Row_Size
(Reg0x03)
Shutter Width
(Reg0x09)
12 fps
20 fps
27 fps
43 fps
65 fps
93 fps
2,047
1,599
1,279
1,023
799
639
1,535
1,199
1,023
767
599
479
<1,552
<1,216
<1,040
<784
<616
<496
Wide Screen (16:9) Resolutions
Resolution
1,920 x 1,080 HDTV
1,280 x 720 HDTV
Note:
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Frame Rate
Column_Size
(Reg0x04)
Row_Size
(Reg0x03)
Shutter Width
(Reg0x09)
18 fps
39 fps
1,919
1,279
1,079
719
<1,096
<736
For Table 6 and Table 7 above, the settings for Reg0x05 (horizontal blanking) and Reg0x06
(vertical blanking) are 21 and 15 respectively, while all of the registers are set to default.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Electronic Panning
In addition to changing the window size, the user has the flexibility to change the location of the readout window. Reg0x01 controls the first row to be read out and Reg0x02
controls the first column to be read out. The default values are 0x0014 (decimal 20) for
Reg0x01 and 0x0020 (decimal 32) for Reg0x02. The first column to be read out must be
an even number.
Reg0x01 and Reg0x02, together with Reg0x03 and Reg0x04, allow the user to choose any
segment of the imager array to be read out. This is especially beneficial when the user
needs to zoom in on a small portion of the image and perform analysis on the image
content.
Figure 9 shows some examples of the electronic panning/zoom-in and windowing capabilities of the sensor.
Blanking Control
Reg0x05 and Reg0x06
These registers control the blanking time in a row (called column fill-in or horizontal
blanking) and between frames (vertical blanking). Horizontal blanking is specified in
terms of pixel clocks. Vertical blanking is specified in terms of row readout times. The
actual imager timing can be calculated using the equations given in Table 2 on page 11.
Reg0x05 controls the horizontal blanking time in a row. The value is specified in terms of
pixel clocks. Default value of 0x008E for Reg0x05 results in a horizontal blanking time of
511 pixel clocks. The minimum value for Reg0x05 is 21. Thus, the minimum horizontal
blanking time is 390 pixel clocks.
Reg0x06 controls the vertical blanking time in a row. The value is specified in terms of
the number of rows. Default value of 0x0019 for Reg0x06 results in a vertical blanking
time of 26-row time.
Frame Time
Reg0x03, Reg0x04, Reg0x05, and Reg0x06
Total frame time in terms of pixel clocks can be obtained using the formula given in
Table 2 on page 11. The user can change the number of columns and rows read out, horizontal blanking and vertical blanking times to obtain different frame rates.
High Frame Rate Readout Modes
Reg0x01, Reg0x02, Reg0x03, Reg0x04, Reg0x05, and Reg0x06
In addition to having the flexibility to read out smaller standard formats, the sensor gives
the user the option of reading out nonstandard formats. This is particularly useful if the
user needs to zoom in on a particular segment of the image to perform high-speed
mathematical calculations (e.g., high-speed viewfinder or auto focus applications).
In applications such as the auto focus mode, the user may need more horizontal resolution than vertical. Thus, the user can window down to the mid-section of the imager
array by programming Reg0x01 and Reg0x03 to change the row start address and the
window height. Figure 10 is an example of how the user may want to window down to
2,048H x 512V from the default of 2,048H x 1,536V. See also Table 8 for other auto focus
mode resolutions.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Figure 9: Windowing Capabilities
(32, 20)
(1200, 180)
A
B
(1327, 307)
(568, 356)
C
(1079, 867)
(80, 912)
D
(1007, 479)
(2048, 1536)
Window Size
2,048 x 1,536
128 x 128
512 x 512
400 x 96
Window A
Window B
Window C
Window D
Table 8:
Reg0x01
0x0014
0x00B4
0x0164
0x0390
Reg0x02
0x0020
0x04B0
0x0238
0x0050
Reg0x03
0x05FF
0x007F
0x01FF
0x018F
Reg0x04
0x07FF
0x007F
0x01FF
0x005F
Auto Focus Modes
Resolution
Frame
Rate
Column_
Size
(reg0x04)
2,048 x 512
2,048 x 256
2,048 x 128
30 fps
60 fps
120 fps
2,047
2,047
2,047
Row_
Size
(reg
0x03)
1,535
1,535
1,023
Horizontal_B Vertical_Bl
lank
ank
(reg0x05)
(reg0x06)
22
22
34
1
0
14
Row
(reg
0x22)
Row_
Skip
(reg
0x22)
Column_
Bin
(reg0x23)
Column_
Skip
(reg0x23)
2
2
1
2
5
7
0
0
0
0
0
0
Figure 10: Windowing
2,048
Row Start = 20
(Reg0x01 = 0x0014)
Row Start = 356
(Reg0x01 = 0x0164)
512
1,536
The user can change Reg0x05 and Reg0x06 to obtain the desired frame rate. Also, the
user may want to perform row skip modes to obtain larger field of view if high-frequency
vertical resolution is not critical.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Pixel Integration Time Control
Reg0x09 and Reg0x0C
The integration time of the pixel is the amount of time the pixels are set to collect charge
generated from light. The user can change the integration time of the sensor by programming Reg0x09. The value of Reg0x09 sets the number of row time for integration.
The sensor also supports sub-row integration time for fine control of pixel integration
time.
The formula for calculating the pixel integration time is (reference Table 2 on page 11 for
P1 description):
INT = (65536 x Reg0x08 + Reg0x09) x tROW -Reg0x0C-P1+132
t
Typically, the value of Reg0x09 is limited to the number of rows per frame (which
includes vertical blanking rows), such that the frame rate is not affected by the integration time. However, if Reg0x09 is increased beyond the total number of rows per frame,
then additional blanking rows are added as needed.
While the user can adjust the integration time to the desired value according to the
aforementioned formula, not all integration times may be desired under certain lighting
conditions. If the light source has a flicker component, then the integration time needs
to be set properly to avoid banding in the image.
Under 60Hz flicker, the integration time must be a multiple of 1/120 of a second to avoid
flicker. Under 50Hz flicker, the integration time must be a multiple of 1/100 of a second
to avoid flicker.
Snapshot Mode and Flash Control
Reg0x1E, STROBE pin and TRIGGER pin
Setting up for Snapshot Mode
Snapshot mode must be enabled before use by setting bit 8 = “1” of Reg0x1E. There are
two important signals used for snapshot mode: TRIGGER and STROBE. The TRIGGER
signal initiates the start of a single frame capture and STROBE is an output pulse that
may be used to turn on a flash and/or activate a mechanical shutter.
Triggering A Snapshot
The TRIGGER signal required for starting a frame capture may be generated in the following two ways:
1. External TRIGGER Pulse
Pin 8 is a digital input that may be used to supply an external trigger signal input. The
snapshot operation begins after the TRIGGER pulse transitions from a HIGH to LOW
state.
2. TRIGGER from Register Setting
A second method for triggering a snapshot is by setting bit 0 = 1 of Reg0x0B (Restart).
This register automatically returns bit 0 to “0” after the TRIGGER is initiated. This bit
does not need to be reset by the user after use.
Strobe Pulse Output
The STROBE pulse must be enabled before use by setting Reg0x1E [bit 9] = 1. The
STROBE signal has two options for pulse length and may be selected using Reg0x1E [bit
10] as shown in Table 9.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Table 9:
STROBE Pulse Output
Reg0x1E, Bit 10
0
1
STROBE Pulse Width
1 row time (default)
((655326 x Reg0x08 + Reg0x09 – R) -16) x tROW - V
After the TRIGGER pulse has signaled a snapshot operation, each row of the imager
array is reset in sequence to clear out any accumulated signal. Once each row of the
imager is reset, the STROBE pulse is output from the imager with a length dependent
upon the characteristics described above. After the STROBE pulse goes low, the imager
waits 16 additional rows and then each row from the pixel array is read out. No STROBE
is generated unless the shutter width is greater than the output image height plus vertical blanking.
Global Shutter Release Snapshot Mode
Reg0x1E and Reg0x21
In addition to the standard snapshot mode, the MT9T001 has a global shutter release
mode which may be combined with a mechanical shutter to achieve simultaneous
exposure of all rows in the image.
Two global shutter modes are available: programmed exposure and bulb mode. In programmed exposure mode, the exposure time is dictated by {Reg0x08, Reg0x09} (Shutter
Width). In bulb mode, the TRIGGER and GSHT_CTL pins are used to achieve an arbitrary exposure time.
Programmed Exposure Mode
To use programmed exposure mode:
1. Set up snapshot mode as normal (including any STROBE preferences).
2. Set Reg0x21 (Read Mode 3) to 0x0003.
3. Assert (transition LOW to HIGH) the GSHT_CTL pin to reset the array. This pin must
remain HIGH for 18820 PIXCLKs.
4. Negate (transition HIGH to LOW) the GSHT_CTL pin to begin the exposure. The
exposure starts 1000 PIXCLKs after the falling edge of GSHT_CTL.
Note:
Unlike normal snapshot mode, Reg0x0B (Restart) may not be used to initiate the
exposure in global shutter modes.
5. Row readout begins automatically. The mechanical shutter should be closed before
row read out begins. The trailing edge of STROBE (if enabled) occurs ((65536 x
Reg0x08 + Reg0x09) x tROW + 2000) PIXCLKs after the falling edge of GSHT_CTL.
Readout of the active window starts the lesser of 16 x tROW or (Reg0x06 + 1) x tROW
later.
Bulb Mode
To use bulb mode:
1.
2.
3.
4.
Set up snapshot mode as normal (including any STROBE preferences).
Set Reg0x21 (Read Mode 3) to 0x0001.
Assert (transition LOW to HIGH) the GSHT_CTL pin.
Assert (transition LOW to HIGH) the TRIGGER pin to reset the array. This pin must
remain HIGH for at least 18,820 PIXCLKs.
5. Negate (transition HIGH to LOW) the GSHT_CTL pin to begin the exposure. The
exposure starts 1,000 PIXCLKs after the falling edge of GSHT_CTL.
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Note:
Unlike normal snapshot mode, Reg0x0B (Restart) may not be used to initiate the
exposure in global shutter modes.
6. Negate (transition HIGH to LOW) the TRIGGER pin to begin row read out. The
mechanical shutter should be closed before row read out begins. The trailing edge of
STROBE (if enabled) occurs ((65536 x Reg0x08 + Reg0x09) x tROW ) PIXCLKs after the
falling edge of TRIGGER. Read out of the active window starts the lesser of 16 x tROW
or (Reg0x06 + 1) x tROW later. In this mode, the shutter width (Reg0x08, Reg0x09)
would normally be set to a low number, allowing row readout to start immediately
after the trailing edge of TRIGGER.
Skip and Bin Modes
Row and column skip modes use subsampling to reduce the output resolution without
reducing field-of-view. The MT9T001 also has row and column binning modes, which
can reduce the impact of aliasing introduced by the use of skip modes. This is achieved
by the averaging of two or three adjacent rows and columns (adjacent same-color pixels). Both 2x and 3x binning modes are supported. Rows and columns can be binned
independently.
Table 10: Bin and Skip Mode Resolution
Row_
Size
(reg
0x03)
Horizontal_
Blank
(reg0x05)
Vertical_
Blank
(reg0x06)
Row_
Bin
(reg
0x22)
Row_
Skip
(reg
0x22)
Column_
Bin
(reg0x23)
Column_
Skip
(reg0x23)
Resolution
Frame
Rate
Column_
Size
(reg0x04)
1,024 x 768
XGA
800 x 600
SVGA
640 x 480
VGA
34 fps
2,047
1,535
22
40
1
1
1
1
50 fps
1,599
1,199
22
30
1
1
1
1
48 fps
1,919
1,439
21
31
2
2
2
2
Note:
Column start address value must be a multiple of Reg0x23 [5–4] + 1.
To use binning mode, set Reg0x22[5–4] (row bin) or Reg0x23[5–4] (column bin) to the
desired reduction minus 1, as would be done for skip mode. Additionally, Reg0x22[2–0]
(column skip) must be set no less than Reg0x22[5–4], and Reg0x23[2–0] (row skip) must
be set no less than Reg0x23[5–4]. Row and column skip modes may be set higher than
the corresponding binning modes to achieve greater reductions, but binning must be
done. The different skip modes supported are between 2x and 8x in both column and
row directions. The different binning modes supported are 2x and 3x. See Table 11 for
register bits controlling the different bin and skip modes.
Table 11: Skip and Bin Modes
Register Bit
Reg0x23
Bit[2–0]
Bit[5–4]
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MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Skip/Bin Modes
Readouts
No column skip
Column skip 2x
Column skip 3x
Column skip 4x
Column skip 8x
col0, col1, col2, col3, col4, col5, etc.
col0, col1, col4, col5, col8, col9, etc.
col0, col1, col16, col7, col12, col13 etc.
col0, col1, col8, col9, col16, col17, etc.
col0, col1, col16, col17, col32, col33, etc.
Column Bin 2x
Column Bin 3x
Binning of 2 adjacent same-color pixels in a 4x4 window
Binning of 3 pixel of each color plane in a 6x6 window
24
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©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Table 11: Skip and Bin Modes (continued)
Register Bit
Reg0x22
Bit[2–0]
Bit[5–4]
Skip/Bin Modes
Readouts
No row skip
Row skip 2x
Row skip 3x
Row skip 4x
Row skip 8x
row0, row1, row2, row3, row4, row5, etc.
row0, row1, row4, row5, row8, row9, etc.
row0, row1, row6, row7, row12, row13, etc.
row0, row1, row8, row9, row16, row17, etc.
row0, row1, row16, row17, row32, row33, etc.
Row bin 2x
Row bin 3x
Binning of 2 pixel of each color plane in a 4x4 window
Binning of 3 pixel of each color plane in a 6x6 window
Note:
Column and row skip modes 1x through 8x are available on the MT9T001. Also, the read
outs shown assume column start and row start addresses are both “0”.
Figure 11: Column Skip 2x; Row Skip 2X Enabled
Pixel
(Reg0x01, Reg0x02)
...
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
..
.
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Figure 12: Column Skip 3x; Row Skip 3X Enabled
Pixel
(Reg0x01, Reg0x02)
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Figure 13: Column Skip 4x; Row Skip 4X Enabled
...
G
R
G
B
R
G
G
B
G
R
G
B
R
G
G
B
G
R
G
B
R
G
G
B
R
G
R
G
B
R
G
G
B
B
R
G
G
B
G
B
B
B
B
G
G
G
G
B
G
G
G
G
R
B
R
B
R
B
R
G
G
G
G
R
R
R
R
G
G
G
G
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
Pixel
(Reg0x01, Reg0x02)
..
.
Figure 14: Column Skip 8x; Row Skip 8X Enabled
Pixel
(Reg0x01, Reg0x02)
...
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
..
.
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©2004 Micron Technology, Inc. All rights reserved.
MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Figure 15: Bin 2-to-1: 2,048H x 1,536V (QXGA) to 1,024H x 768V (XGA)
Note:
Gr
R
Gr
R
B
Gb
B
Gb
Grs
Rs
Gr
R
Gr
R
Bs
Gbs
B
Gb
B
Gb
Grs = binning of 4 Gr[s] in a 4 x 4 window; Gbs = binning of 4 Gb[s] in a 4 x 4 window.
Rs = binning of 4 R[s] in a 4 x 4 window; B[s] = binning of 4 B[s] in a 4 x 4 window.
Figure 16: Bin 3-to-1: 2,048H x 1,536V (QXGA) to 640H x 480V (VGA)
Note:
Gr
R
Gr
R
Gr
R
B
Gb
B
Gb
B
Gb
Gr
R
Gr
R
Gr
B
Gb
B
Gb
B
R
Gb
Gr
R
Gr
R
Gr
R
B
Gb
B
Gb
B
Gb
Grs
Rs
Bs
Gbs
Grs = binning of 9 Gr[s] in a 6 x 6 window; Gbs = binning of 9 Gb[s] in a 6 x 6 window.
Rs = binning of 9 R[s] in a 6 x 6 window; Bs = binning of B[s] in a 6 x 6 window.
Smaller Format Resolution
Reg0x01, Reg0x02, Reg0x03, Reg0x04, Reg0x05, Reg0x06, Reg0x22, and Reg0x23
With the aforementioned flexible windowing capability of the sensor, the user is able to
read out different resolution formats from default of QXGA to UXGA, SXGA, XGA, SVGA,
VGA, CIF, QVGA, QCIF, etc. Below are some examples of programmable register settings
to obtain the estimated frame rates for the desired formats.
The user can change the values of Reg0x05 and Reg0x06 to obtain different frame rates.
The field of view of the image is reduced since the programmed settings effectively
reduce the read out window to the specified settings without skipping any rows or columns.
If the user only changes the register settings mentioned above without changing the row
and column start address, the read out window would start from that coordinate. To
read out the center of the image or any portion that is desired, the user would need to
program Reg0x01 and Reg0x02, thus performing electronic panning.
To maintain the same field of view while reducing the read out resolution, the user
would need to perform row and column skip. For example, if the desired read out resolution needs to be XGA (1,024H x 7,68V) instead of QXGA (2,048H x 1,536V). To maintain
the same field of view, the user can select column skip 2x and row skip 2x modes. This
81004bad/80ffb422
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
effectively reduces the horizontal and vertical resolution by 2x for a factor of 4x reduction in overall number of pixels that are read out. To perform this read out mode, the
user would need to set the following:
Reg0x03 =
0x05FF
Reg0x04 =
0x07FF
Reg0x23
Bit[2:0]=1
1,536V rows
2,048H columns
Column skip 2x—> 1,024H
columns read out
Row skip 2x —> 768
Reg0x22 Bit[2:0]
=1
rows read out
If the user sets Reg0x03 = 0x02FF (768V rows), Reg0x04 = 0x03FF (1,024H columns), and
then enable column skip 2x and row skip 2x, the effective readout resolution is 512H x
384V.
Line_Valid Formats
Reg0x20 is used to control many aspects of the readout of the sensor. By setting Bit 9 and
10 of Reg0x20 the LINE_VALID signal can get three different output formats. The formats are shown in Figure 17 when reading out four rows and two vertical blanking rows.
In the last format the LINE_VALID signal is the XOR between the continuously
LINE_VALID signal and the FRAME_VALID signal.
Figure 17: Different LINE_VALID Formats
Default
FRAME_VALID
LINE_VALID
Continuously
FRAME_VALID
LINE_VALID
XOR
FRAME_VALID
LINE_VALID
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MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Signal Path
The MT9T001 sensor analog signal path consists of the pixel array, the column sample
and hold (S/H) circuitry, the programmable gain stage, the analog offset correction and
the analog-to-digital converter (ADC).
The reset and signal voltages from the pixel are sampled onto the column sample and
hold circuitry on a row-wise basis. After signal sampling is complete, the differential signal (reset – signal) is transferred to the programmable gain stage.
After the gain stage, the differential signal goes through the analog offset correction circuitry. The user can decide if a positive or negative offset or no offset needs to be added
to the differential signal. The signal is then sampled onto the sample and hold circuitry
of the ADC before being digitized.
Figure 18: Signal Path
Analog Gain
(color-wise)
Pixel Voltage
Digital Offset
(color-wise)
+
X
10-bit ADC
Analog Offset
(color-wise)
Black Level
Calibration
X
+
DOUT[9:0]
Digital Gain
(color-wise)
Gain Settings
Reg0x2B, Reg0x2C, Reg0x2D, Reg0x2E, and Reg0x35
The analog programmable gain stage consists of two stages of gain circuitry that operate
in a pipelined manner. The first stage of gain has programmable gain of 1 or 2 while the
second stage of gain has programmable gain of 1 to 4 with steps of 0.125 for a maximum
analog gain of 8. The gain settings can be independently adjusted for the colors of
Green1, Blue, Red, and Green2 and are programmed through Reg0x2B, Reg0x2C,
Reg0x2D, and Reg0x2E, respectively. The gain may also be adjusted globally through
Reg0x35. The first stage of gain is set by Bit(6), while the second stage gain is set by Bit(5–
0). The gain is individually controllable for each color in the Bayer pattern as follows:
Analog Gain < = 8:
Gain = (Bit[6] + 1) x (Bit[5:0] x 0.125)
Digital Gain = 1 + Bit[14:8]/8
Total Gain = Analog Gain x Digital Gain
Since Bit[6] of the gain registers are multiplicative factors for the gain settings, there are
alternative ways of achieving certain gains. Some settings offer superior noise performance to others, despite the same overall gain, as shown in Table 12.
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MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Feature Description
Table 12: Gain Increment Settings
Nominal Gain
Increments
Recommended Settings
1 to 4.000
4.25 to 8.00
9.0 to 128.0
0.125
0.25
1.0
0x0008 to 0x0020
0x0051 to 0x0060
0x0160 to 0x7860
Black Level Calibration
Reg0x5D, and Reg0x5F
The digitized black level of the MT9T001 sensor potentially varies with temperature or
gain setting changes. The MT9T001 sensor allows the user the flexibility of automatic
black level calibration or manual black level control.
Manual Black Level Calibration
Reg0x60, Reg0x61, Reg0x62, Reg0x63, and Reg0x64
The programmable analog offset stage corrects for analog offset that might be present in
the analog signal. The user would need to program Reg0x62 appropriately to enable the
analog offset correction. The analog offset settings can be independently adjusted for
the colors of Green1, Green2, Red and Blue and are programmed through Reg0x60,
Reg0x61, Reg0x63 and Reg0x64 respectively. Bit[8] of Reg0x60, Reg0x61, Reg0x63 and
Reg0x64 (these registers have two’s complement representation) determines the sign of
the analog offset. Bit[8] = 1 makes the analog correction negative instead of positive.
The lower 8 bits (Bit[7:0]) determine the absolute value of the analog offset to be corrected and Bit[8] determines the sign of the correction. When Bit[8] is “1”, the sign of the
correction is negative and vice versa. The analog value of the correction relative to the
analog gain stage can be determined from the following formula:
Analog offset = Bit[8:0] x 1 LSB
The 1 LSB value in the formula is an estimate amount. It deviates from 1 LSB with process variation.
Black Level
Reg0x49
Digital offset is applied such that the average black level of a frame in a resulting image
equals the value of this register. This adjustment happens after black level calibration.
Reset
This register is used to reset the sensor registers to their default, power-up state. To reset
the MT9T001, first write a “1” into bit 0 of this register to put the MT9T001 in reset mode,
then write a “0” into bit 0 to resume operation.
Another way to reset the sensor is through the RESET# (pin 10) – by pulling the RESET#
signal to 0V.
The reset operation is an asynchronous reset and the sensor remains in reset as long as
RESET# signal = 0V. In both methods of reset, the sensor register settings returns to their
default states.
81004bad/80ffb422
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Serial Bus Description
Standby Control and Chip Enable
There are two steps required to put the sensor in standby mode:
1. Through the two-wire serial interface program Reg0x07 Bit[1] = 0. This stops the sensor readout and powers down analog circuitry of the sensor. The sensor stays in
standby mode until the user reprograms Reg0x07 Bit[1] = 1.
2. Set STANDBY (pin 7) to HIGH.
Serial Bus Description
Registers are written to and read from the MT9T001 through the two-wire serial interface bus. The MT9T001 is a serial interface slave and is controlled by the serial clock
(SCLK), which is driven by the serial interface master. Data is transferred into and out of
the MT9T001 through the serial data (SDATA) line. The SDATA line is pulled up to 3.3V offchip by a 1.5KΩ resistor. Either the slave or master device can pull the SDATA line down—
the serial interface protocol determines which device is allowed to pull the SDATA line
down at any given time.
Protocol
The two-wire serial defines several different transmission codes, as follows:
•
•
•
•
•
a start bit
the slave device 8-bit address
a(n) (no) acknowledge bit
an 8-bit message
a stop bit
Sequence
A typical read or write sequence begins by the master sending a start bit. After the start
bit, the master sends the slave device's 8-bit address. The last bit of the address determines if the request is a read or a write, where a “0” indicates a write and a “1” indicates
a read. The slave device acknowledges its address by sending an acknowledge bit back to
the master.
If the request was a write, the master then transfers the 8-bit register address to which a
write should take place. The slave sends an acknowledge bit to indicate that the register
address has been received. The master then transfers the data eight bits at a time, with
the slave sending an acknowledge bit after each eight bits. The MT9T001 uses 16-bit data
for its internal registers, thus requiring two 8-bit transfers to write to one register. After
16 bits are transferred, the register address is automatically incremented, so that the
next 16 bits are written to the next register address. The master stops writing by sending
a start or stop bit.
A typical read sequence is executed as follows. First the master sends the write-mode
slave address and 8-bit register address, just as in the write request. The master then
sends a start bit and the read-mode slave address. The master then clocks out the register data eight bits at a time. The master sends an acknowledge bit after each 8-bit transfer. The register address is auto-incremented after every 16 bits is transferred. The data
transfer is stopped when the master sends a no-acknowledge bit.
Bus Idle State
The bus is idle when both the data and clock lines are HIGH. Control of the bus is initiated with a start bit, and the bus is released with a stop bit. Only the master can generate
the start and stop bits.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Serial Bus Description
Start Bit
The start bit is defined as a HIGH-to-LOW transition of the data line while the clock line
is HIGH.
Stop Bit
The stop bit is defined as a LOW-to-HIGH transition of the data line while the clock line
is HIGH.
Slave Address
The eight-bit address of a two-wire serial interface device consists of seven bits of
address and 1 bit of direction. A “0” (0xBA) in the LSB (least significant bit) of the address
indicates write mode, and a “1” (0xBB) indicates read mode.
Data Bit Transfer
One data bit is transferred during each clock pulse. The serial interface clock pulse is
provided by the master. The data must be stable during the HIGH period of the two-wire
serial interface clock—it can only change when the serial clock is LOW. Data is transferred eight bits at a time, followed by an acknowledge bit.
Acknowledge Bit
The master generates the acknowledge clock pulse. The transmitter (which is the master
when writing, or the slave when reading) releases the data line, and the receiver indicates an acknowledge bit by pulling the data line LOW during the acknowledge clock
pulse.
No-Acknowledge Bit
The no-acknowledge bit is generated when the data line is not pulled down by the
receiver during the acknowledge clock pulse. A no-acknowledge bit is used to terminate
a read sequence.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Two-Wire Serial Interface Sample Write and Read Sequences
Two-Wire Serial Interface Sample Write and Read Sequences
16-Bit Write Sequence
A typical write sequence for writing 16 bits to a register is shown in Figure 19. A start bit
given by the master, followed by the write address, starts the sequence. The image sensor then gives an acknowledge bit and expects the register address to come first, followed by the 16-bit data. After each eight-bit transfer, the image sensor gives an
acknowledge bit. All 16 bits must be written before the register is updated. After 16 bits
are transferred, the register address is automatically incremented so that the next 16 bits
are written to the next register. The master stops writing by sending a start or stop bit.
Figure 19: Timing Diagram Showing a Write to Reg0x09 with the Value 0x0284
SCLK
SDATA
Reg0x09
0xBA ADDR
START
0000 0010
ACK
ACK
1000 0100
ACK
STOP
ACK
16-Bit Read Sequence
A typical read sequence is shown in Figure 20. First the master has to write the register
address, as in a write sequence. Then a start bit and the read address specifies that a read
is about to happen from the register. The master then clocks out the register data eight
bits at a time. The master sends an acknowledge bit after each eight-bit transfer. The
register address should be incremented after every 16 bits is transferred. The data transfer is stopped when the master sends a no-acknowledge bit.
Figure 20: Timing Diagram Showing a Read from Reg0x09; Returned Value 0x0284
SCLK
SDATA
0xBA ADDR
START
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MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Reg0x09
ACK
0xBB ADDR
ACK START
ACK
34
1000 0100
0000 0010
ACK
STOP
NACK
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Electrical Specifications
Electrical Specifications
Data Output and Propagation Delays
By default, the MT9T001 launches pixel data, FRAME_VALID and LINE_VALID with the
rising edge of PIXCLK. The expectation is that the user captures DOUT[9:0],
FRAME_VALID and LINE_VALID using the rising edge of PIXCLK.
Figure 21: Data Output Timing Diagram
tR
tCLKIN
tF
CLK
tCP
PIXCLK
T
tPD
DOUT 0-DOUT9
XXX
XXX
P0
P1
XXX
P2
XXX
XXX
PN
XXX
tPFL
tPLL
Frame Valid/
Line Valid
Note: Frame_Valid leads Line_Valid as
described in Figure 8 and Table 3.
Note: Frame_Valid trails Line_Valid as
described in Figure 8 and Table 3.
tPFH
tPLH
Table 13: DC Electrical Characteristics
(DC Setup Conditions: fCLKIN = 48 MHz, VDD = 3.3V, VAA = 3.3V, VAAPIX = 3.3V, TA = 25°C)
Symbol
Definition
VDD
VAA
VAAPIX
VIH
VIL
IIN
Core digital voltage
Analog voltage
Pixel supply voltage
Input high voltage
Input low voltage
Input leakage current
VOH
VOL
IOH
IOL
IOZ
IDD
IAA
IAAPIX
ISTDBYD
ISTDBYA
ISTDBYDA
Output high voltage
Output low voltage
Output high current
Output low current
Tri-state output leakage current
Digital operating current
Analog operating current
Pixel supply current
Digital standby current
Analog standby current
Pixel standby current
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Condition
Typ
Max
Units
3
3
3
1.70
3.3
3.3
3.3
3.6
3.6
3.6
1.45
5
V
V
V
V
V
µA
0.3
11.5
12.5
5
23.0
54.0
5.0
2.0
2.0
1.0
V
V
mA
mA
µA
mA
mA
mA
µA
µA
µA
–5
No Pull-up Resistor;
VIN = VDD or DGND
At specified IOH
At specified IOL
At specified VOH
At specified VOL
3.3
0
0 lux, 48 MHz
0 lux, 48 MHz
0 lux, 48 MHz
Input clock disabled, 0 lux
Input clock disabled, 0 lux
Input clock disabled, 0 lux
35
Min
20
45.0
4.0
0.2
0.2
0.1
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Electrical Specifications
.
Table 14: AC Electrical Characteristics
(AC Setup Conditions: fCLKIN = 48 MHz, VDD = 3.3V, VAA = 3.3V, VAAPIX = 3.3V, VDDPLL, TA = 25°C))
Symbol
f
t
CLKIN
CLKIN
T
t
t
t
R
F
CP
tPD
tPFH
tPLH
tPFL
tPLL
CLOAD
Definition
Condition
Min
Typ
1
1000
1000
Input clock frequency
Input clock period
PIXCLK period
Input clock rise time
Input clock fall time
Clock duty cycle
CLKIN to PIXCLK propagation delay
PIXCLK to data valid
PIXCLK to FRAME_VALID HIGH
PIXCLK to LINE_VALID HIGH
PIXCLK to FRAME_VALID LOW
PIXCLK to LINE_VALID LOW
Load capacitance
Max
Unit
48
20.8
20.8
MHz
ns
ns
V/ns
V/ns
%
ns
ns
ns
ns
ns
ns
pF
4
4
45
5
Default
Default
Default
Default
55
2
2
2
2
2
2
30
Table 15: Absolute Maximum Ratings
Rating
Symbol
TOP
TST1
Note:
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Parameter
Operating temperature
Storage temperature
Min
Max
Unit
0
–40
60
125
°C
°C
1Stresses
greater than those listed may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Electrical Specifications
Two-Wire Serial Bus Timing
The two-wire serial bus operation requires certain minimum master clock cycles
between transitions. These are specified in the following diagrams in master clock
cycles.
Figure 22: Serial Host Interface Start Condition Timing
4
5
SCLK
SDATA
Figure 23: Serial Host Interface Stop Condition Timing
4
5
SCLK
SDATA
Note:
All timing are in units of master clock cycle.
Figure 24: Serial Host Interface Data Timing for Write
4
4
SCLK
SDATA
Note:
SDATA is driven by an off-chip transmitter.
Figure 25: Serial Host Interface Data Timing for Read
5
SCLK
SDATA
Note:
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
SDATA is pulled LOW by the sensor, or allowed to be pulled HIGH by a pull-up resistor offchip.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Electrical Specifications
Figure 26: Acknowledge Signal Timing After an 8-Bit Write to the Sensor
3
6
SCLK
Sensor pulls down
SDATA pin
SDATA
Figure 27: Acknowledge Signal Timing After an 8-Bit Read from the Sensor
6
7
SCLK
Sensor tri-states SDATA pin
(turns off pull down)
SDATA
Note:
After a read, the master receiver must pull down SDATA to acknowledge receipt of data
bits. When read sequence is complete, the master must generate a no acknowledge by
leaving SDATA to float HIGH. On the following cycle, a start or stop bit may be used.
Figure 28: Quantum Efficiency
Quantum Efficiency
40
Blue
Green
Red
Quantum Efficiency (%)
35
30
25
20
15
10
5
0
350
400
450
500
550
600
650
700
750
800
Wavelength (nm)
Note:
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Diagram not to scale.
38
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Electrical Specifications
Figure 29: Image Center Offset
Pixel Array
Pixel
(0, 0)
0.078mm
0.934mm
Optical
Center
7.721mm
Dark
Pixels
Die Center
7.802mm
Note:
81004bad/80ffb422
MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
Diagram not to scale.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Electrical Specifications
Figure 30: 48-Pin PLCC
2.25 FOR
REFERENCE
ONLY
D
SUBSTRATE: PLASTIC LAMINATE
MOLD COMPOUND: EPOXY NOVOLAC
LID MATERIAL: BOROSILICATE GLASS 0.55 THICKNESS
SEATING
PLANE
A
13.00
CTR
11.176
47X 0.90
7.188 ±0.075
1.016
TYP
1.90
48
C
B
1
0.78 FOR
REFERENCE
ONLY
48X 0.50
6.56
6.176 ±0.075
7.11 ±0.05
13.00
CTR
CL
11.176
14.22 ±0.75
1.016
TYP
5.588
0.934 FOR
REFERENCE ONLY
OPTICAL
CENTER
CL
1.050 ±0.075
5.588
6.56
7.11 ±0.05
14.22 ±0.75
LEAD FINISH:
GOLD PLATING,
0.50 MICRONS
MINIMUM THICKNESS
OPTICAL
AREA
DIE AND
PACKAGE
CENTER
0.500 FOR
REFERENCE ONLY
1.200 ±0.075
MAXIMUM ROTATION OF OPTICAL AREA RELATIVE TO PACKAGE EDGES B AND C : 1º
MAXIMUM TILT OF OPTICAL AREA RELATIVE TO SEATING PLANE A : 50 MICRONS
MAXIMUM TILT OF OPTICAL AREA RELATIVE TO TOP OF COVER GLASS D : 50 MICRONS
Note:
All dimensions in millimeters.
®
8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900
[email protected] www.micron.com Customer Comment Line: 800-932-4992
Micron, the M logo, and the Micron logo are trademarks of Micron Technology, Inc.
All other trademarks are the property of their respective owners.
This data sheet contains minimum and maximum limits specified over the complete power and temperature range for
production devices. Although considered final, these specifications are subject to change, as further product development
and data characterization sometimes occur.
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MT9T001 - 1/2-Inch 3-Megapixel Digital Image Sensor
Revision History
Revision History
Rev D, 07/2005
•
•
•
•
•
•
•
•
•
•
•
•
Remove Preliminary designation
Updated Table 1, Key Performance Parameters, on page 1
Updated Table 3, Register List and Default Values, on page 12
Updated Table 4, Reserved Register List and Default Values, on page 13
Updated Table 5, Register Descriptions, on page 15
Updated Table 13, DC Electrical Characteristics, on page 35
Updated Table 14, AC Electrical Characteristics, on page 36
Add Table 15, Absolute Maximum Ratings, on page 36, and NOTE
Updated page 33 (text, Figure 21 replaced, Figure 22 deleted)
Added Figure 28, Quantum Efficiency, on page 38
Removed Die Placement figure
Updated Figure 30, 48-Pin PLCC, on page 40
Rev C, Preliminary 09/2004
• Added Applications
• Updated Image Center Offset, Figure 30
Rev B, Preliminary 03/2004
• Updated Figure 29
• Added Table 1, Key Performance Parameters, on page 1
• Updated Tables 2, 4, 5 and 6
Rev A, Verion 1.0, Preliminary 12/2003
• Initial Release of document
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MT9T001_3100_DS_2.fm - Rev. D 7/05 EN
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