Freescale Semiconductor Technical Data Document Number: MRF7S21170H Rev. 3, 9/2006 RF Power Field Effect Transistors MRF7S21170HR3 MRF7S21170HSR3 N - Channel Enhancement - Mode Lateral MOSFETs Designed for CDMA base station applications with frequencies from 2110 to 2170 MHz. Suitable for CDMA and multicarrier amplifier applications. To be used in Class AB and Class C for PCN - PCS/cellular radio and WLL applications. • Typical Single- Carrier W - CDMA Performance: VDD = 28 Volts, IDQ = 1400 mA, Pout = 50 Watts Avg., Full Frequency Band, 3GPP Test Model 1, 64 DPCH with 50% Clipping, Channel Bandwidth = 3.84 MHz, Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF. Power Gain — 16 dB Drain Efficiency — 31% Device Output Signal PAR — 6.1 dB @ 0.01% Probability on CCDF ACPR @ 5 MHz Offset — - 37 dBc in 3.84 MHz Channel Bandwidth • Capable of Handling 5:1 VSWR, @ 32 Vdc, 2140 MHz, 170 Watts CW Peak Tuned Output Power • Pout @ 1 dB Compression Point w 170 Watts CW Features • 100% PAR Tested for Guaranteed Output Power Capability • Characterized with Series Equivalent Large - Signal Impedance Parameters • Internally Matched for Ease of Use • Integrated ESD Protection • Greater Negative Gate - Source Voltage Range for Improved Class C Operation • Designed for Digital Predistortion Error Correction Systems • RoHS Compliant • In Tape and Reel. R3 Suffix = 250 Units per 56 mm, 13 inch Reel. 2110 - 2170 MHz, 50 W AVG., 28 V SINGLE W - CDMA LATERAL N - CHANNEL RF POWER MOSFETs CASE 465B - 03, STYLE 1 NI - 880 MRF7S21170HR3 CASE 465C - 02, STYLE 1 NI - 880S MRF7S21170HSR3 Table 1. Maximum Ratings Rating Symbol Value Unit Drain- Source Voltage VDSS - 0.5, +65 Vdc Gate- Source Voltage VGS - 6.0, +10 Vdc Operating Voltage VDD 32, +0 Vdc Storage Temperature Range Tstg - 65 to +150 °C Case Operating Temperature TC 150 °C Operating Junction Temperature TJ 200 °C Symbol Value (1,2) Unit Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Case Temperature 80°C, 170 W CW Case Temperature 73°C, 25 W CW RθJC 0.31 0.36 °C/W 1. MTTF calculator available at http://www.freescale.com/rf. Select Tools/Software/Application Software/Calculators to access the MTTF calculators by product. 2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1955. © Freescale Semiconductor, Inc., 2006. All rights reserved. RF Device Data Freescale Semiconductor MRF7S21170HR3 MRF7S21170HSR3 1 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22 - A114) 1A (Minimum) Machine Model (per EIA/JESD22 - A115) B (Minimum) Charge Device Model (per JESD22 - C101) IV (Minimum) Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 μAdc Zero Gate Voltage Drain Leakage Current (VDS = 28 Vdc, VGS = 0 Vdc) IDSS — — 1 μAdc Gate- Source Leakage Current (VGS = 5 Vdc, VDS = 0 Vdc) IGSS — — 500 nAdc Gate Threshold Voltage (VDS = 10 Vdc, ID = 270 μAdc) VGS(th) 1 2 3 Vdc Gate Quiescent Voltage (1) (VDS = 28 Vdc, ID = 1400 mAdc, Measured in Functional Test) VGS(Q) 2 2.8 4 Vdc Drain- Source On - Voltage (VGS = 10 Vdc, ID = 2.7 Adc) VDS(on) 0.1 0.15 0.3 Vdc Reverse Transfer Capacitance (VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Crss — 0.9 — pF Output Capacitance (VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Coss — 703 — pF Characteristic Off Characteristics On Characteristics Dynamic Characteristics (2) Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1400 mA, Pout = 50 W Avg., f = 2112.5 MHz and f = 2167.5 MHz, Single - Carrier W - CDMA, 3GPP Test Model 1, 64 DPCH, 50% Clipping, PAR = 7.5 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. Power Gain Gps 15 16 18 dB Drain Efficiency ηD 29 31 — % PAR 5.7 6.1 — dB ACPR — - 37 - 35 dBc IRL — - 15 -9 dB Output Peak - to - Average Ratio @ 0.01% Probability on CCDF Adjacent Channel Power Ratio Input Return Loss Typical Performances (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1400 mA, 2110- 2170 MHz Bandwidth Video Bandwidth (Tone Spacing from 100 kHz to VBW) ΔIMD3 = IMD3 @ VBW frequency - IMD3 @ 100 kHz <1 dBc (both sidebands) VBW MHz — 25 — Gain Flatness in 60 MHz Bandwidth @ Pout = 170 W CW GF — 0.4 — dB Deviation from Linear Phase in 60 MHz Bandwidth @ Pout = 170 W CW Φ — 1.95 — ° Delay — 1.7 — ns ΔΦ — 18 — ° ΔG — 0.015 — dB/°C ΔP1dB — 0.01 — dBm/°C Group Delay @ Pout = 170 W CW, f = 2140 MHz Part - to - Part Insertion Phase Variation @ Pout = 170 W CW Gain Variation over Temperature Output Power Variation over Temperature 1. VGG = 2 x VGS(Q). Parameter measured on Freescale Test Fixture, due to resistive divider network on the board. Refer to Test Circuit schematic. 2. Part internally matched both on input and output. MRF7S21170HR3 MRF7S21170HSR3 2 RF Device Data Freescale Semiconductor Z17 R1 VBIAS VSUPPLY + R2 C1 C2 Z7 C8 R3 RF INPUT Z1 C10 C12 C13 Z9 C4 Z2 Z3 Z4 Z5 Z6 Z10 Z8 C3 Z11 Z12 Z13 Z14 Z15 C17 DUT C5 C14 C6 C15 RF Z16 OUTPUT C18 C16 Z18 C7 Z1 Z2* Z3* Z4* Z5* Z6 Z7 Z8 Z9 Z10 0.250″ x 0.083″ Microstrip 0.090″ x 0.083″ Microstrip 0.842″ x 0.083″ Microstrip 0.379″ x 0.083″ Microstrip 0.307″ x 0.083″ Microstrip 0.156″ x 0.787″ Microstrip 1.160″ x 0.080″ Microstrip 0.119″ x 0.787″ Microstrip 0.077″ x 0.880″ Microstrip 0.459″ x 1.000″ Microstrip Z11 Z12* Z13* Z14* Z15* Z16 Z17, Z18 PCB C9 C11 0.060″ x 0.760″ Microstrip 0.129″ x 0.083″ Microstrip 0.436″ x 0.083″ Microstrip 0.490″ x 0.083″ Microstrip 0.275″ x 0.083″ Microstrip 0.230″ x 0.083″ Microstrip 0.900″ x 0.080″ Microstrip Taconix TLX8 - 0300, 0.030″, εr =2.55 * Variable for tuning Figure 1. MRF7S21170HR3(HSR3) Test Circuit Schematic Table 5. MRF7S21170HR3(HSR3) Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1 100 pF 100B Chip Capacitor 100B101JW500XT ATC C2, C3, C7, C8, C17, C18 6.8 pF 600B Chip Capacitors 600B6R8BT500XT ATC C4, C15 0.3 pF 700B Chip Capacitors 700B0R3BW500XT ATC C5 0.8 pF 600B Chip Capacitor 600B0R8BT500XT ATC C6 0.2 pF 700B Chip Capacitor 700B0R2BW500XT ATC C9, C10, C11, C12 10 μF Chip Capacitors C5750X5R1H106MT TDK C13 470 μF, 63 V Electrolytic Capacitor, Radial 13661471 Philips C14 0.4 pF 700B Chip Capacitor 700B0R4BW500XT ATC C16 0.1 pF 700B Chip Capacitor 700B0R1BW500XT ATC R1, R2 10 kΩ, 1/4 W Chip Resistors CRCW12061001FKTA Vishay R3 10 Ω, 1/4 W Chip Resistor CRCW120610R0FKTA Vishay MRF7S21170HR3 MRF7S21170HSR3 RF Device Data Freescale Semiconductor 3 C13 R2 R1 C1 C8 C2 C10 C12 R3 C17 C3 C5 C6 CUT OUT AREA C4 C14 C15 C9 C16 C18 C11 C7 MRF7S21170H Rev 0 Figure 2. MRF7S21170HR3(HSR3) Test Circuit Component Layout MRF7S21170HR3 MRF7S21170HSR3 4 RF Device Data Freescale Semiconductor Gps 34 15 14 32 ηD 30 VDD = 28 Vdc, Pout = 50 W (Avg.), IDQ = 1400 mA Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth, PAR = 7.5 dB @ 0.01% Probability (CCDF) 13 IRL 12 11 10 28 −5 0 −10 −1 PARC 9 2060 −2 2100 2080 2120 2140 2160 2180 −20 −3 2220 2200 −15 −25 IRL, INPUT RETURN LOSS (dB) Gps, POWER GAIN (dB) 16 36 PARC (dB) 17 ηD, DRAIN EFFICIENCY (%) TYPICAL CHARACTERISTICS f, FREQUENCY (MHz) 16 42 Gps, POWER GAIN (dB) Gps 15 14 40 ηD 38 VDD = 28 Vdc, Pout = 84 W (Avg.), IDQ = 1400 mA Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth, PAR = 7.5 dB @ 0.01% Probability (CCDF) 13 12 IRL 11 36 −5 −2 −10 −3 10 −4 −20 PARC 9 2060 2080 2100 2120 2140 2160 2180 2200 −15 −5 2220 −25 IRL, INPUT RETURN LOSS (dB) 44 PARC (dB) 17 ηD, DRAIN EFFICIENCY (%) Figure 3. Output Peak - to - Average Ratio Compression (PARC) Broadband Performance @ Pout = 50 Watts Avg. f, FREQUENCY (MHz) Figure 4. Output Peak - to - Average Ratio Compression (PARC) Broadband Performance @ Pout = 84 Watts Avg. 18 −10 IMD, THIRD ORDER INTERMODULATION DISTORTION (dBc) IDQ = 2100 mA Gps, POWER GAIN (dB) 17 1750 mA 16 1400 mA 15 1050 mA 700 mA 14 VDD = 28 Vdc, f1 = 2135 MHz, f2 = 2145 MHz Two−Tone Measurements, 10 MHz Tone Spacing VDD = 28 Vdc, f1 = 2135 MHz, f2 = 2145 MHz Two−Tone Measurements, 10 MHz Tone Spacing −20 2100 mA −30 IDQ = 700 mA −40 1400 mA −50 1750 mA 1050 mA 13 −60 1 10 100 Pout, OUTPUT POWER (WATTS) PEP Figure 5. Two - Tone Power Gain versus Output Power 400 1 10 100 400 Pout, OUTPUT POWER (WATTS) PEP Figure 6. Third Order Intermodulation Distortion versus Output Power MRF7S21170HR3 MRF7S21170HSR3 RF Device Data Freescale Semiconductor 5 TYPICAL CHARACTERISTICS IMD, INTERMODULATION DISTORTION (dBc) VDD = 28 Vdc, IDQ = 1400 mA f1 = 2135 MHz, f2 = 2145 MHz Two−Tone Measurements, 10 MHz Tone Spacing −20 −30 −40 3rd Order −50 5th Order 7th Order −60 1 VDD = 28 Vdc, Pout = 170 W (PEP), IDQ = 1400 mA Two−Tone Measurements (f1 + f2)/2 = Center Frequency of 2140 MHz −10 −15 −20 −25 IM3−L −30 IM3−U −35 −40 IM5−U −45 IM5−L −50 −55 IM7−U IM7−L 10 1 400 100 10 0 −5 100 Pout, OUTPUT POWER (WATTS) PEP TWO−TONE SPACING (MHz) Figure 7. Intermodulation Distortion Products versus Output Power Figure 8. Intermodulation Distortion Products versus Tone Spacing OUTPUT COMPRESSION AT THE 0.01% PROBABILITY ON THE CCDF (dB) 1 54 Ideal 0 48 −1 −2 42 −1 dB = 43.335 W 36 −2 dB = 61.884 W −3 30 −3 dB = 83.111 W −4 Actual VDD = 28 Vdc, IDQ = 1400 mA f = 2140 MHz, Input PAR = 7.5 dB −5 20 40 60 100 80 ηD, DRAIN EFFICIENCY (%) IMD, INTERMODULATION DISTORTION (dBc) −10 24 18 120 Pout, OUTPUT POWER (WATTS) 19 −30 Uncorrected, Upper and Lower −40 60 −30_C VDD = 28 Vdc, IDQ = 1400 mA, f = 2140 MHz Single−Carrier W−CDMA, PAR = 7.5 dB, ACPR @ 5 MHz Offset in 3.84 MHz Integrated Bandwidth DPD Corrected No Memory Correction −50 −60 Gps 18 40 85_C 16 30 20 15 VDD = 28 Vdc IDQ = 1400 mA f = 2140 MHz ηD DPD Corrected, with Memory Correction 13 41 42 43 44 45 46 47 48 49 50 Pout, OUTPUT POWER (dBm) Figure 10. Digital Predistortion Correction versus ACPR and Output Power 50 85_C 25_C 17 14 −70 40 25_C TC = −30_C 1 10 100 10 ηD, DRAIN EFFICIENCY (%) −20 Gps, POWER GAIN (dB) ACPR, UPPER AND LOWER RESULTS (dBc) Figure 9. Output Peak - to - Average Ratio Compression (PARC) versus Output Power 0 400 Pout, OUTPUT POWER (WATTS) CW Figure 11. Power Gain and Drain Efficiency versus CW Output Power MRF7S21170HR3 MRF7S21170HSR3 6 RF Device Data Freescale Semiconductor TYPICAL CHARACTERISTICS 109 17 MTTF FACTOR (HOURS x AMPS2) Gps, POWER GAIN (dB) IDQ = 1400 mA f = 2140 MHz 16 15 14 VDD = 24 V 28 V 108 107 32 V 106 13 0 100 200 280 90 110 Pout, OUTPUT POWER (WATTS) CW 130 150 170 190 210 230 250 TJ, JUNCTION TEMPERATURE (°C) Figure 12. Power Gain versus Output Power This above graph displays calculated MTTF in hours x ampere2 drain current. Life tests at elevated temperatures have correlated to better than ±10% of the theoretical prediction for metal failure. Divide MTTF factor by ID2 for MTTF in a particular application. Figure 13. MTTF Factor versus Junction Temperature W - CDMA TEST SIGNAL 100 −10 3.84 MHz Channel BW −20 10 1 −40 Output Signal Input Signal −50 0.1 (dB) PROBABILITY (%) −30 0.01 −70 W−CDMA. ACPR Measured in 3.84 MHz Channel Bandwidth @ "5 MHz Offset. PAR = 7.5 dB @ 0.01% Probability on CCDF 0.001 0.0001 0 2 4 6 −60 −80 −ACPR in 3.84 MHz Integrated BW −90 8 10 PEAK−TO−AVERAGE (dB) Figure 14. CCDF W - CDMA 3GPP, Test Model 1, 64 DPCH, 50% Clipping, Single - Carrier Test Signal −ACPR in 3.84 MHz Integrated BW −100 −110 −9 −7.2 −5.4 −3.6 −1.8 0 1.8 3.6 5.4 7.2 9 f, FREQUENCY (MHz) Figure 15. Single - Carrier W - CDMA Spectrum MRF7S21170HR3 MRF7S21170HSR3 RF Device Data Freescale Semiconductor 7 Zo = 10 Ω f = 2220 MHz Zload Zsource f = 2060 MHz f = 2220 MHz f = 2060 MHz VDD = 28 Vdc, IDQ = 1400 mA, Pout = 50 W Avg. f MHz Zsource W Zload W 2060 4.57 - j10.70 1.02 - j3.54 2080 4.57 - j10.38 0.99 - j3.34 2100 4.57 - j10.06 0.96 - j3.14 2120 4.52 - j9.72 0.93 - j2.94 2140 4.40 - j9.42 0.92 - j2.76 2160 4.15 - j9.12 0.91 - j2.59 2180 4.44 - j8.82 0.89 - j2.42 2200 4.19 - j8.53 0.88 - j2.25 2220 4.12 - j8.23 0.88 - j2.09 Zsource = Test circuit impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground. Output Matching Network Device Under Test Input Matching Network Z source Z load Figure 16. Series Equivalent Source and Load Impedance MRF7S21170HR3 MRF7S21170HSR3 8 RF Device Data Freescale Semiconductor ALTERNATIVE PEAK TUNE LOAD PULL CHARACTERISTICS 62 61 P6dB = 53.89 dBm (244 W) 61 59 58 Pout, OUTPUT POWER (dBm) Pout, OUTPUT POWER (dBm) 60 Ideal P3dB = 53.56 dBm (226 W) 57 56 P1dB = 52.75 dBm (188 W) 55 54 Actual 53 VDD = 28 Vdc, IDQ = 1400 m, Pulsed CW 12 μsec(on), 10% Duty Cycle, f = 2140 MHz 52 51 32 33 34 35 36 37 38 39 40 41 42 43 60 59 58 P3dB = 54.65 dBm (290 W) 57 56 P1dB = 53.54 dBm (226 W) 55 Actual 54 VDD = 32 Vdc, IDQ = 1400 mA, Pulsed CW 12 μsec(on), 10% Duty Cycle, f = 2140 MHz 53 52 44 33 34 35 Pin, INPUT POWER (dBm) 36 37 38 39 40 41 42 43 44 45 Pin, INPUT POWER (dBm) NOTE: Measured in a Peak Tuned Load Pull Fixture NOTE: Measured in a Peak Tuned Load Pull Fixture Test Impedances per Compression Level P3dB Ideal P6dB = 54.88 dBm (307 W) Zsource Ω Zload Ω 4.43 - j11.85 0.81 - j2.87 Figure 17. Pulsed CW Output Power versus Input Power Test Impedances per Compression Level P3dB Zsource Ω Zload Ω 4.43 - j11.85 0.72 - j2.87 Figure 18. Pulsed CW Output Power versus Input Power MRF7S21170HR3 MRF7S21170HSR3 RF Device Data Freescale Semiconductor 9 PACKAGE DIMENSIONS B G 2X 1 Q bbb M T A B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M−1994. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION H IS MEASURED 0.030 (0.762) AWAY FROM PACKAGE BODY. 4. DELETED M B (FLANGE) 3 K 2 bbb bbb M ccc M M D T A B M M (INSULATOR) M T A M B M T A M B M N R ccc M T A M B S (LID) aaa M T A M (LID) M (INSULATOR) B M H C E T A (FLANGE) SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M−1994. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION H IS MEASURED 0.030 (0.762) AWAY FROM PACKAGE BODY. 1 B (FLANGE) 2 bbb M D T A MILLIMETERS MIN MAX 33.91 34.16 13.6 13.8 3.73 5.08 12.57 12.83 0.89 1.14 0.08 0.15 27.94 BSC 1.45 1.70 4.32 5.33 22.15 22.55 19.30 22.60 3.00 3.51 13.10 13.30 13.10 13.30 0.178 REF 0.254 REF 0.381 REF CASE 465B - 03 ISSUE D NI - 880 MRF7S21170HR3 B K INCHES MIN MAX 1.335 1.345 0.535 0.545 0.147 0.200 0.495 0.505 0.035 0.045 0.003 0.006 1.100 BSC 0.057 0.067 0.170 0.210 0.872 0.888 0.871 0.889 .118 .138 0.515 0.525 0.515 0.525 0.007 REF 0.010 REF 0.015 REF STYLE 1: PIN 1. DRAIN 2. GATE 3. SOURCE F A DIM A B C D E F G H K M N Q R S aaa bbb ccc M bbb M T A M B ccc M T A M B B M M (INSULATOR) M N R ccc M T A M aaa M T A M B S (LID) M (LID) M (INSULATOR) B M H DIM A B C D E F H K M N R S aaa bbb ccc INCHES MIN MAX 0.905 0.915 0.535 0.545 0.147 0.200 0.495 0.505 0.035 0.045 0.003 0.006 0.057 0.067 0.170 0.210 0.872 0.888 0.871 0.889 0.515 0.525 0.515 0.525 0.007 REF 0.010 REF 0.015 REF MILLIMETERS MIN MAX 22.99 23.24 13.60 13.80 3.73 5.08 12.57 12.83 0.89 1.14 0.08 0.15 1.45 1.70 4.32 5.33 22.15 22.55 19.30 22.60 13.10 13.30 13.10 13.30 0.178 REF 0.254 REF 0.381 REF STYLE 1: PIN 1. DRAIN 2. GATE 3. SOURCE C F E T A A (FLANGE) SEATING PLANE CASE 465C - 02 ISSUE D NI - 880S MRF7S21170HSR3R3 MRF7S21170HR3 MRF7S21170HSR3 10 RF Device Data Freescale Semiconductor PRODUCT DOCUMENTATION Refer to the following documents to aid your design process. Application Notes • AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins • EB212: Using Data Sheet Impedances for RF LDMOS Devices REVISION HISTORY The following table summarizes revisions to this document. Date Revision Number May 2006 0 • Initial Release of Data Sheet June 2006 1 • Added Class C to description of parts, pg. 1 • Changeded “≥” to “ - ” in the Device Output Signal Par bullet, pg. 1 • Changed typ value from ±9 to 18 in Part - to - Part Phase Variation characteristic description in Table 4, Typical Performances • Expanded the characterization range in the MTTF Factor graph from 200_C to 230_C, Fig. 12 Aug. 2006 2 • Added Greater Negative Source bullet to Features section • Corrected Fig. 14, Single - Carrier W - CDMA Spectrum, to 3.84 MHz Sept. 2006 3 • Changed “Capable of Handling” bullet from 10:1 VSWR @ 28 Vdc to 5:1 VSWR @ 32 Vdc, pg. 1 • Added “Insertion” to Part - to - Part Phase Variation characteristic description in Table 4, Typical Performances • Added Gain Flatness, Group Delay and Deviation from Linear Phase characteristics to Table 4, Typical Performances • Corrected Z6 value from “0.119” to “0.156”, corrected Z8 value from “0.156” to “0.119”, corrected Z9 value from “0.770” to “0.077”, corrected Z11 value from “0.076” to “0.760”, Fig. 1, Test Circuit Schematic • Added Part Number and Manufacturer for R1, R2 and R3 in Table 5, Test Circuit Component Designations and Values • Added Figure 10, Digital Predistortion Correction • Corrected Fig. 15, Single - Carrier W - CDMA Spectrum, to correctly reflect integrated bandwidth offsets • Added Figure 17, Pulsed CW Output Power versus Input Power @ 28 Vdc • Added Figure 18, Pulsed CW Output Power versus Input Power @ 32 Vdc Description MRF7S21170HR3 MRF7S21170HSR3 RF Device Data Freescale Semiconductor 11 How to Reach Us: Home Page: www.freescale.com E - mail: [email protected] USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. 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Freescalet and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006. All rights reserved. MRF7S21170HR3 MRF7S21170HSR3 Document Number: MRF7S21170H Rev. 3, 9/2006 12 RF Device Data Freescale Semiconductor