Ultralow Quiescent Current,
150 mA, CMOS Linear Regulator
ADP160/ADP161
TYPICAL APPLICATION CIRCUITS
ADP160
VIN = 2.3V
VIN
2
GND
3
EN
VOUT 5
1µF
VOUT = 1.8V
1µF
NC 4
08628-001
ON
OFF
NC = NO CONNECT
Figure 1. 5-Lead TSOT ADP160 with Fixed Output Voltage, 1.8 V
ADP161
VIN = 4.2V
1
VIN
2
GND
3
EN
VOUT 5
VOUT = 3.2V
1µF
1µF
R1
ON
ADJ 4
OFF
R2
Figure 2. 5-Lead TSOT ADP161 with Adjustable Output Voltage, 3.2 V
ADP160
1µF
APPLICATIONS
2
VIN
VOUT
TOP VIEW
(Not to Scale)
ON
OFF
1
VOUT = 2.8V
VIN = 3.3V
A
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
Post dc-to-dc regulation
Portable medical devices
1
08628-002
Ultralow quiescent current
IQ = 560 nA with 0 μA load
IQ = 860 nA with 1 μA load
Stable with 1 μF ceramic input and output capacitors
Maximum output current: 150 mA
Input voltage range: 2.2 V to 5.5 V
Low shutdown current: <50 nA typical
Low dropout voltage: 195 mV @ 150 mA load
Initial accuracy: ±1%
Accuracy over line, load, and temperature: ±3.5%
15 fixed output voltage options: 1.2 V to 4.2 V
Adjustable output available
PSRR performance of 72 dB @ 100 Hz
Current limit and thermal overload protection
Logic-control enable
Integrated output discharge resistor
5-lead TSOT package
4-ball, 0.5 mm pitch WLCSP
B
EN
GND
1µF
08628-003
FEATURES
Figure 3. 4-Ball WLCSP ADP160 with Fixed Output Voltage, 2.8 V
GENERAL DESCRIPTION
The ADP160/ADP161 are ultralow quiescent current, low
dropout, linear regulators that operate from 2.2 V to 5.5 V and
provide up to 150 mA of output current. The low 195 mV dropout
voltage at 150 mA load improves efficiency and allows operation
over a wide input voltage range.
The ADP160/ADP161 are specifically designed for stable operation
with tiny 1 μF ± 30% ceramic input and output capacitors to
meet the requirements of high performance, space-constrained
applications.
The ADP160 is available in 15 fixed output voltage options,
ranging from 1.2 V to 4.2 V. The ADP160/ADP161 also include
a switched resistor to discharge the output automatically when
the LDO is disabled.
The ADP161 is available as an adjustable output voltage regulator.
It is only available in a 5-lead TSOT package.
Short-circuit and thermal overload protection circuits prevent
damage in adverse conditions. The ADP160 is available in a tiny
5-lead TSOT and a 4-ball, 0.5 mm pitch WLCSP package for the
smallest footprint solution to meet a variety of portable power
applications.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
ADP160/ADP161
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................8
Applications ....................................................................................... 1
Theory of Operation ...................................................................... 12
Typical Application Circuits............................................................ 1
Applications Information .............................................................. 13
General Description ......................................................................... 1
Capacitor Selection .................................................................... 13
Revision History ............................................................................... 2
Enable Feature ............................................................................ 14
Specifications..................................................................................... 3
Current Limit and Thermal Overload Protection ................. 14
Input and Output Capacitor, Recommended Specifications .. 4
Thermal Considerations............................................................ 15
Absolute Maximum Ratings............................................................ 5
PCB Layout Considerations ...................................................... 17
Thermal Data ................................................................................ 5
Outline Dimensions ....................................................................... 19
Thermal Resistance ...................................................................... 5
Ordering Guide .......................................................................... 20
ESD Caution .................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
6/10—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADP160/ADP161
SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.2 V, whichever is greater; EN = VIN, IOUT = 10 mA, CIN = COUT = 1 μF, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
SHUTDOWN CURRENT
Symbol
VIN
IGND
IGND-SD
Conditions
TJ = −40°C to +125°C
IOUT = 0 μA
IOUT = 0 μA, TJ = −40°C to +125°C
IOUT = 1 μA
IOUT = 1 μA, TJ = −40°C to +125°C
IOUT = 100 μA
IOUT = 100 μA, TJ = −40°C to +125°C
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
EN = GND
EN = GND, TJ = −40°C to +125°C
Min
2.2
IOUT = 10 mA
0 μA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V
0 μA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V,
TJ = −40°C to +125°C
IOUT = 10 mA
−1
−2
−3.5
0 μA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V
0 μA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V,
TJ = −40°C to +125°C
0.98
0.97
VIN = (VOUT + 0.5 V) to 5.5 V, TJ = −40°C to +125°C
IOUT = 100 μA to 150 mA
IOUT = 100 μA to 150 mA, TJ = −40°C to +125°C
VOUT = 3.3 V
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
2.2 V ≤ VIN ≤ 5.5 V, ADJ connected to VOUT
VOUT = 2.8 V, RLOAD = ∞, ADP160 only
VOUT = 3.3 V
−0.1
Typ
560
860
2.6
Max
5.5
1250
2.3
1800
2.8
4.5
5.8
1
Unit
V
nA
μA
nA
μA
μA
μA
μA
μA
μA
μA
nA
μA
+1
+2
+3.5
%
%
%
1.01
V
1.02
1.03
V
V
+0.1
%/V
%/mA
%/mA
11
19
42
65
50
OUTPUT VOLTAGE ACCURACY
VOUT
ADJUSTABLE-OUTPUT VOLTAGE
ACCURACY (ADP161) 1
REGULATION
Line Regulation
Load Regulation 2
DROPOUT VOLTAGE 3
4-Ball WLCSP
VADJ
∆VOUT/∆VIN
∆VOUT/∆IOUT
VDROPOUT
5-Lead TSOT
ADJ INPUT BIAS CURRENT (ADP161)
ACTIVE PULL-DOWN RESISTANCE
START-UP TIME 4
CURRENT LIMIT THRESHOLD 5
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
ADJI-BIAS
TSHUTDOWN
TSTART-UP
ILIMIT
TSSD
TSSD-HYS
TJ rising
EN INPUT
En Input Logic High
EN Input Logic Low
EN Input Leakage Current
VIH
VIL
VI-LEAKAGE
2.2 V ≤ VIN ≤ 5.5 V
2.2 V ≤ VIN ≤ 5.5 V
EN = VIN or GND
EN = VIN or GND, TJ = −40°C to +125°C
0.99
0.004
0.01
7
13
105
195
8
15
120
225
220
Rev. 0 | Page 3 of 20
1.0
10
300
1100
320
600
500
mV
mV
mV
mV
mV
mV
mV
mV
nA
Ω
μs
mA
°C
°C
150
15
1.2
0.4
0.1
1
V
V
μA
μA
ADP160/ADP161
Parameter
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
OUTPUT NOISE
Symbol
UVLO
UVLORISE
UVLOFALL
UVLOHYS
OUTNOISE
POWER SUPPLY REJECTION RATIO
PSRR
Conditions
Min
Typ
Max
Unit
2.19
V
V
mV
μV rms
μV rms
μV rms
dB
dB
dB
dB
dB
dB
1.60
100
105
100
80
60
65
72
50
50
62
10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V
10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.5 V
10 Hz to 100 kHz, VIN = 5 V, VOUT = 1.2 V
100 Hz, VIN = 5 V, VOUT = 3.3 V
100 Hz, VIN = 5 V, VOUT = 2.5 V
100 Hz, VIN = 5 V, VOUT = 1.2 V
1 kHz, VIN = 5 V, VOUT = 3.3 V
1 kHz, VIN = 5 V, VOUT = 2.5 V
1 kHz, VIN = 5 V, VOUT = 1.2 V
1
Accuracy when VOUT is connected directly to ADJ. When the VOUT voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the
tolerances of resistors used.
2
Based on an end-point calculation using 0 μA and 150 mA loads.
3
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.2 V.
4
Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
5
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
MINIMUM INPUT AND OUTPUT CAPACITANCE 1
CAPACITOR ESR
1
Symbol
CMIN
RESR
Conditions
TA = −40°C to +125°C
TA = −40°C to +125°C
Min
0.7
0.001
Typ
Max
0.2
Unit
μF
Ω
The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
however, Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. 0 | Page 4 of 20
ADP160/ADP161
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
Storage Temperature Range
Operating Junction Temperature Range
Operating Ambient Temperature Range
Soldering Conditions
Rating
−0.3 V to +6.5 V
−0.3 V to VIN
−0.3 V to VIN
−65°C to +150°C
−40°C to +125°C
−40°C to +125°C
JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings only apply individually; they do not
apply in combination. The ADP160/ADP161 can be damaged
when the junction temperature limits are exceeded. Monitoring
ambient temperature does not guarantee that TJ is within the
specified temperature limits. In applications with high power
dissipation and poor thermal resistance, the maximum ambient
temperature may have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (TJ) of
the device is dependent on the ambient temperature (TA), the
power dissipation of the device (PD), and the junction to ambient
thermal resistance of the package (θJA).
Maximum junction temperature (TJ) is calculated from the ambient
temperature (TA) and power dissipation (PD) using the formula
TJ = TA + (PD × θJA)
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on the
application and board layout. In applications where high maximum
power dissipation exists, close attention to thermal board design
is required. The value of θJA may vary, depending on PCB material,
layout, and environmental conditions. The specified values of
θJA are based on a 4-layer, 4 inches × 3 inches, circuit board. Refer
to JESD 51-7 and JESD 51-9 for detailed information on the
board construction. For additional information, see Application
Note AN-617, MicroCSP™ Wafer Level Chip Scale Package.
ΨJB is the junction to board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation from
the package, factors that make ΨJB more useful in real-world
applications. Maximum junction temperature (TJ) is calculated
from the board temperature (TB) and power dissipation (PD)
using the formula
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
5-Lead TSOT
4-Ball, 0.4 mm Pitch WLCSP
ESD CAUTION
Rev. 0 | Page 5 of 20
θJA
170
260
ΨJB
43
58
Unit
°C/W
°C/W
ADP160/ADP161
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VIN 1
5
VOUT
4
NC
ADP160
GND 2
EN 3
NC = NO CONNECT
08628-004
TOP VIEW
(Not to Scale)
Figure 4. 5-Lead TSOT, Fixed Output Pin Configuration, ADP160
Table 5. 5-Lead TSOT Pin Function Descriptions, ADP160
Pin No.
1
2
3
Mnemonic
VIN
GND
EN
4
5
NC
VOUT
Description
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup,
connect EN to VIN.
No Connect. This pin is not connected internally.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
VIN 1
5 VOUT
GND 2
TOP VIEW
(Not to Scale)
4 ADJ
EN 3
08628-005
ADP161
Figure 5. 5-Lead TSOT, Adjustable Output Pin Configuration, ADP161
Table 6. 5-Lead TSOT Pin Function Descriptions, ADP161
Pin No.
1
2
3
Mnemonic
VIN
GND
EN
4
ADJ
5
VOUT
Description
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup,
connect EN to VIN.
Output Voltage Adjust Pin. Connect the midpoint of the voltage divider between VOUT and GND to this pin to set
the output voltage.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Rev. 0 | Page 6 of 20
ADP160/ADP161
A
1
2
VIN
VOUT
ADP160
EN
GND
TOP VIEW
(Not to Scale)
08628-006
B
Figure 6. 4-Ball WLCSP Pin Configuration, ADP160
Table 7. 4-Ball WLCSP Pin Function Descriptions, ADP160
Pin No.
A1
B1
Mnemonic
VIN
EN
A2
B2
VOUT
GND
Description
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic
startup, connect EN to VIN.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Ground.
Rev. 0 | Page 7 of 20
ADP160/ADP161
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.8 V, VOUT = 3.3 V, IOUT = 1 mA, CIN = COUT = 1 μF, TA = 25°C, unless otherwise noted.
3.35
100
3.34
VOUT (V)
3.32
3.31
3.30
3.29
3.28
3.26
3.25
–40
–5
25
85
125
JUNCTION TEMPERATURE (°C)
1
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
NO LOAD
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
0.1
08628-007
3.27
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
10
–40
–5
25
85
08628-010
GROUND CURRENT (µA)
3.33
125
JUNCTION TEMPERATURE (°C)
Figure 7. Output Voltage (VOUT) vs. Junction Temperature
Figure 10. Ground Current vs. Junction Temperature
100
3.35
3.34
GROUND CURRENT (µA)
3.33
VOUT (V)
3.32
3.31
3.30
3.29
3.28
10
1
3.27
0.01
0.1
1
10
100
1000
ILOAD (mA)
0.1
0.001
08628-008
3.25
0.001
0.01
0.1
1
10
100
1000
ILOAD (mA)
08628-011
3.26
Figure 11. Ground Current vs. Load Current (ILOAD)
Figure 8. Output Voltage (VOUT) vs. Load Current (ILOAD)
3.35
100
3.34
3.31
3.30
3.29
3.28
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
3.27
3.26
3.25
3.7
3.9
4.1
4.3
4.5
4.7
4.9
5.1
5.3
VIN (V)
5.5
08628-009
VOUT (V)
3.32
Figure 9. Output Voltage (VOUT) vs. Input Voltage
10
1
0.1
3.7
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
NO LOAD
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
3.9
4.1
4.3
4.5
4.7
4.9
5.1
5.3
VIN (V)
Figure 12. Ground Current vs. Input Voltage (VIN)
Rev. 0 | Page 8 of 20
5.5
08628-012
GROUND CURRENT (µA)
3.33
ADP160/ADP161
0.14
120
GROUND CURRENT (µA)
0.16
SHUTDOWN CURRENT (µA)
140
VIN = 2.9V
VIN = 3.2V
VIN = 3.8V
VIN = 4.1V
VIN = 4.7V
VIN = 5.5V
0.12
0.10
0.08
0.06
80
60
40
0.04
20
0.02
–40
–5
25
85
0
3.1
08628-013
0
125
TEMPERATURE (°C)
IGND = 1mA
IGND = 5mA
IGND = 10mA
IGND = 50mA
IGND = 100mA
IGND = 150mA
3.2
3.3
3.4
3.5
3.6
VIN (V)
Figure 16. Ground Current vs. Input Voltage(VIN) in Dropout
Figure 13. Shutdown Current vs. Temperature at Various Input Voltages
0
250
–10
VOUT = 2V
–20
200
LOAD = 200mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
–30
PSRR (dB)
DROPOUT VOLTAGE (mV)
100
08628-016
0.18
150
100
–40
–50
–60
–70
VOUT = 3.3V
50
–80
0
–100
10
10
100
1000
LOAD CURRENT (mA)
10k
100k
1M
10M
FREQUENCY (Hz)
0
3.35
–10
3.30
–20
LOAD = 200mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
–30
PSRR (dB)
3.25
3.20
3.15
3.05
3.2
3.3
3.4
3.5
3.6
Figure 15. Output Voltage (VOUT) vs. Input Voltage (in Dropout)
–50
–60
–70
= 1mA
= 5mA
= 10mA
= 50mA
= 100mA
= 250mA
VIN (V)
–40
–80
–90
–100
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
08628-018
VDROP
VDROP
VDROP
VDROP
VDROP
VDROP
3.10
08628-015
VOUT (V)
1k
Figure 17. Power Supply Rejection Ratio vs. Frequency, VOUT = 1.2 V, VIN = 2.2 V
Figure 14. Dropout Voltage vs. Load Current
3.00
3.1
100
08628-017
1
08628-014
–90
Figure 18. Power Supply Rejection Ratio vs. Frequency, VOUT = 2.5 V, VIN = 3.5 V
Rev. 0 | Page 9 of 20
ADP160/ADP161
0
–10
–20
1k
LOAD = 200mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
NOISE (µV rms)
PSRR (dB)
–30
–40
–50
–60
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.2V
ADJ 3.3V
100
10
–70
–80
1k
10k
100k
1M
10M
FREQUENCY (Hz)
1
0.001
08628-019
100
–20
PSRR (dB)
–30
1
10
100
10
LOAD = 3.3V/200mA
LOAD = 2.5V/200mA
LOAD = 1.2V/200mA
LOAD = 3.3V/1mA
LOAD = 2.5V/1mA
LOAD = 1.2V/1mA
–40
–50
–60
1000
Figure 22. Output Noise vs. Load Current and Output Voltage,
VIN = 5 V, COUT = 1 μF
NOISE (µV/ Hz)
0
0.1
LOAD CURRENT (mA)
Figure 19. Power Supply Rejection Ratio vs. Frequency, VOUT = 3.3 V, VIN = 4.3 V
–10
0.01
08628-022
–90
–100
10
VOUT = 1.2V
VOUT = 3.3V
VOUT = 2.5V
1
–70
–80
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 20. Power Supply Rejection Ratio vs. Frequency
Various Output Voltages and Load Currents, VIN − VOUT = 1 V
0
–10
–20
0.1
10
08628-020
100
100
1k
10k
100k
FREQUENCY (Hz)
08628-023
–90
–100
10
Figure 23. Output Noise Spectral Density, VIN = 5 V, ILOAD = 10 mA, COUT = 1 μF
T
LOAD = 200mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
LOAD CURRENT
1
PSRR (dB)
–30
–40
–50
–60
2
VOUT
–70
–80
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
CH1 100mA Ω CH2 200mV
08628-021
–100
10
Figure 21. Adjustable ADP161 Power Supply Rejection Ratio vs. Frequency,
VOUT = 3.3 V, VIN = 4.3 V
M200µs
T 10.40%
A CH1
62mA
08628-024
–90
Figure 24. Load Transient Response, CIN, COUT = 1 μF, ILOAD = 1 mA to 150 mA,
200 ns Rise Time, CH1 = Load Current, CH2 = VOUT
Rev. 0 | Page 10 of 20
ADP160/ADP161
T
T
LOAD CURRENT
VIN
1
VOUT
2
VOUT
2
CH2 5mV
M200µs
T 10.40%
A CH1
24mA
CH1 1V Ω
Figure 25. Load Transient Response, CIN, COUT = 1 μF, ILOAD = 1 mA to 50 mA,
200 ns Rise Time, CH1 = Load Current, CH2 = VOUT
VIN
VOUT
2
M200µs
T 10.20%
A CH1
4.34V
08628-026
1
CH2 20mV
M200µs
T 10.20%
A CH1
4.56V
Figure 27. Line Transient Response, VIN = 4 V to 5 V , CIN, - 1μF, COUT =10 μF,
ILOAD = 150 mA, CH1 = VIN, CH2 = VOUT
T
CH1 1V Ω
CH2 20mV
08628-027
CH1 20mA Ω
08628-025
1
Figure 26. Line Transient Response, VIN = 4 V to 5 V, CIN, COUT = 1 μF,
ILOAD = 150 mA, CH1 = VIN, CH2 = VOUT
Rev. 0 | Page 11 of 20
ADP160/ADP161
THEORY OF OPERATION
The ADP160/ADP161 are ultralow quiescent current, low dropout
linear regulators that operate from 2.2 V to 5.5 V and can provide
up to 150 mA of output current. Drawing only 560 nA (typical)
at no load and a low 42 μA of quiescent current (typical) at full
load makes the ADP160 ideal for battery-operated portable
equipment. Shutdown current consumption is typically 50 nA.
Using new innovative design techniques, the ADP160 provides
ultralow quiescent current and superior transient performance
for digital and RF applications. The ADP160 is also optimized
for use with small 1 μF ceramic capacitors.
VIN
VOUT
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
GND
EN
SHUTDOWN
The adjustable ADP161 has an output voltage range of 1.0 V to
4.2 V. The output voltage is set by the ratio of two external resistors,
as shown in Figure 2. The device servos the output to maintain
the voltage at the ADJ pin at 1.0 V referenced to ground. The
current in R1 is then equal to 1.0 V/R2, and the current in R1 is
the current in R2 plus the ADJ pin bias current. The ADJ pin
bias current, 10 nA at 25°C, flows through R1 into the ADJ pin.
R3
R2
08628-028
REFERENCE
R1
ADP160
Internally, the ADP160 consists of a reference, an error amplifier,
a feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device, which is controlled
by the error amplifier. The error amplifier compares the reference
voltage with the feedback voltage from the output and amplifies
the difference. If the feedback voltage is lower than the reference
voltage, the gate of the PMOS device is pulled lower, allowing
more current to pass and increasing the output voltage. If the
feedback voltage is higher than the reference voltage, the gate
of the PMOS device is pulled higher, allowing less current to pass
and decreasing the output voltage.
The output voltage can be calculated using the equation:
VOUT = 1.0 V(1 + R1/R2) + (ADJI-BIAS)(R1)
Figure 28. Internal Block Diagram, Fixed Output with Output Discharge Function
VOUT
VIN
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
GND
R1
Note that in shutdown, the output is turned off and the divider
current is zero.
ADJ
SHUTDOWN
REFERENCE
ADP161
Figure 29. Internal Block Diagram, Adjustable Output with
Output Discharge Function
08628-030
EN
The value of R1 should be less than 200 kΩ to minimize errors in
the output voltage caused by the ADJ pin bias current. For example,
when R1 and R2 each equal 200 kΩ, the output voltage is 2.0 V.
The output voltage error introduced by the ADJ pin bias current is
2 mV or 0.10%, assuming a typical ADJ pin bias current of
10 nA at 25°C.
The ADP160/ADP161 also include an output discharge resistor to
force the output voltage to zero when the LDO is disabled. This
ensures that the output of the LDO is always in a well-defined state,
whether it is enabled or not.
The ADP160 is available in 15 output voltage options, ranging from
1.2 V to 4.2 V. The ADP160/ADP161 use the EN pin to enable
and disable the VOUT pin under normal operating conditions.
When EN is high, VOUT turns on, and when EN is low, VOUT
turns off. For automatic startup, EN can be tied to VIN.
Rev. 0 | Page 12 of 20
ADP160/ADP161
APPLICATIONS INFORMATION
CAPACITOR SELECTION
Input and Output Capacitor Properties
Output Capacitor
Any good quality ceramic capacitors can be used with the ADP160/
ADP161, as long as they meet the minimum capacitance and
maximum ESR requirements. Ceramic capacitors are manufactured
with a variety of dielectrics, each with different behavior over
temperature and applied voltage. Capacitors must have a dielectric
adequate to ensure the minimum capacitance over the necessary
temperature range and dc bias conditions. X5R or X7R dielectrics
with a voltage rating of 6.3 V or 10 V are recommended. Y5V
and Z5U dielectrics are not recommended due to their poor
temperature and dc bias characteristics.
The ADP160/ADP161 are designed for operation with small,
space-saving ceramic capacitors, but functions with most
commonly used capacitors as long as care is with regard to the
effective series resistance (ESR) value. The ESR of the output
capacitor affects stability of the LDO control loop. A minimum
of 1 μF capacitance with an ESR of 1 Ω or less is recommended
to ensure stability of the ADP160/ADP161. Transient response
to changes in load current is also affected by output capacitance.
Using a larger value of output capacitance improves the transient
response of the ADP160/ADP161 to large changes in load current.
Figure 30 and Figure 31 show the transient responses for output
capacitance values of 1 μF and 10 μF, respectively.
T
LOAD CURRENT
1
Figure 32 depicts the capacitance vs. voltage bias characteristic
of a 0402, 1 μF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the X5R
dielectric is about ±15% over the −40°C to +85°C temperature
range and is not a function of package or voltage rating.
1.2
1.0
CAPACITANCE (µF)
2
M200µs
T 10.40%
A CH1
62mA
0.8
0.6
0.4
0.2
Figure 30. Output Transient Response, COUT = 1 μF,
CH1 = Load Current, CH2 = VOUT
0
T
0
LOAD CURRENT
2
4
6
8
VOLTAGE
10
08628-034
CH1 100mA Ω CH2 200mV
08628-032
VOUT
Figure 32. Capacitance vs. Voltage Characteristic
1
Use Equation 1 to determine the worst-case capacitance accounting
for capacitor variation over temperature, component tolerance,
and voltage.
(1)
CEFF = CBIAS × (1 − TEMPCO) × (1 − TOL)
where:
CBIAS is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
2
CH1 100mA Ω CH2 200mV
M200µs
T 10.00%
A CH1
74mA
08628-033
VOUT
In this example, the worst-case temperature coefficient (TEMPCO)
over −40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
CBIAS is 0.94 μF at 1.8 V, as shown in Figure 32.
Figure 31. Output Transient Response, COUT = 10 μF,
CH1 = Load Current, CH2 = VOUT
Input Bypass Capacitor
Substituting these values in Equation 1 yields
Connecting a 1 μF capacitor from VIN to GND reduces the circuit
sensitivity to the printed circuit board (PCB) layout, especially
when long input traces or high source impedance are encountered.
If greater than 1 μF of output capacitance is required, the input
capacitor should be increased to match it.
CEFF = 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 μF
Therefore, the capacitor chosen in this example meets
the minimum capacitance requirement of the LDO over
temperature and tolerance at the chosen output voltage.
Rev. 0 | Page 13 of 20
ADP160/ADP161
To guarantee the performance of the ADP160/ADP161, it is
imperative that the effects of dc bias, temperature, and tolerances
on the behavior of the capacitors are evaluated for each.
3.5
ENABLE FEATURE
2.5
EN VOLTAGE/VOUT (V)
The ADP160/ADP161 use the EN pin to enable and disable the
VOUT pin under normal operating conditions. As shown in
Figure 33, when a rising voltage on EN crosses the active threshold,
VOUT turns on. When a falling voltage on EN crosses the inactive
threshold, VOUT turns off.
3.3V
3.0
4.5
2.5V
2.0
EN
1.5
1.2V
1.0
0.5
0
0
3.5
500
1000
1500
2000
2500
3000
3500
4000
4500
TIME (µs)
Figure 35. Typical Start-Up Behavior
2.5
4.5
2.0
4.0
1.5
3.5
0
0.5
0.7
0.9
1.1
1.3
1.5
EN VOLTAGE (V)
08628-035
0.5
Figure 33. Typical EN Pin Operation
2.5
4.2V
EN
2.0
1.5
1.0
As shown in Figure 33, the EN pin has hysteresis built in. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
The EN pin active/inactive thresholds are derived from the VIN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 34 shows typical EN active/inactive thresholds
when the input voltage varies from 2.2 V to 5.5 V.
1.1
1.2V
0.5
0
0
200
400
600
800
TIME (µs)
1000
Figure 36. Typical Shutdown Behavior
CURRENT LIMIT AND THERMAL OVERLOAD
PROTECTION
The ADP160/ADP161 are protected against damage due to
excessive power dissipation by current and thermal overload
protection circuits. The ADP160/ADP161 are designed to
current limit when the output load reaches 320 mA (typical).
When the output load exceeds 320 mA, the output voltage is
reduced to maintain a constant current limit.
1.0
EN VOLTAGE (V)
3.0
08628-038
1.0
EN VOLTAGE/VOUT (V)
VOUT (V)
3.0
08628-037
4.0
0.9
EN RISE
0.8
EN FALL
0.7
0.5
2.0
2.5
3.0
3.5
4.0
4.5
INPUT VOLTAGE (V)
5.0
08628-036
0.6
Thermal overload protection is included, which limits the junction
temperature to a maximum of 150°C (typical). Under extreme
conditions (that is, high ambient temperature and power dissipation),
when the junction temperature starts to rise above 150°C, the
output is turned off, reducing the output current to zero. When
the junction temperature drops below 135°C, the output is turned
on again and the output current is restored to its nominal value.
Figure 34. Typical EN Pin Thresholds vs. Input Voltage
The start-up and shutdown behavior of the ADP160 is shown in
Figure 35 and Figure 36.
Rev. 0 | Page 14 of 20
ADP160/ADP161
THERMAL CONSIDERATIONS
In most applications, the ADP160/ADP161 do not dissipate
much heat due to their high efficiency. However, in applications
with high ambient temperature and high supply voltage to output
voltage differential, the heat dissipated in the package is large
enough that it can cause the junction temperature of the die to
exceed the maximum junction temperature of 125°C.
When the junction temperature exceeds 150°C, the converter enters
thermal shutdown. It recovers only after the junction temperature
has decreased below 135°C to prevent any permanent damage.
Therefore, thermal analysis for the chosen application is very
important to guarantee reliable performance over all conditions.
The junction temperature of the die is the sum of the ambient
temperature of the environment and the temperature rise of the
package due to the power dissipation, as shown in Equation 2.
To guarantee reliable operation, the junction temperature of the
ADP160/ADP161 must not exceed 125°C. To ensure the junction
temperature stays below this maximum value, the user needs to
be aware of the parameters that contribute to junction temperature
changes. These parameters include ambient temperature, power
dissipation in the power device, and thermal resistances between
the junction and ambient air (θJA). The θJA number is dependent
on the package assembly compounds that are used and the amount
of copper used to solder the package GND pins to the PCB.
Table 8 shows the typical θJA values of the 5-lead TSOT and the
4-ball WLCSP for various PCB copper sizes. Table 9 shows the
typical ΨJB value of the 5-lead TSOT and 4-ball WLCSP.
Table 8. Typical θJA Values
Copper Size (mm2)
01
50
100
300
500
1
TSOT
170
152
146
134
131
θJA (°C/W)
WLCSP
260
159
157
153
151
ΨJB (°C/W)
TSOT
42.8
WLCSP
58.4
The junction temperature of the ADP160/ADP161 can be
calculated from the following equation:
TJ = TA + (PD × θJA)
(2)
where:
TA is the ambient temperature.
PD is the power dissipation in the die, given by
PD = [(VIN − VOUT) × ILOAD] + (VIN × IGND)
(3)
where:
ILOAD is the load current.
IGND is the ground current.
VIN and VOUT are input and output voltages, respectively.
Power dissipation due to ground current is quite small and can be
ignored. Therefore, the junction temperature equation simplifies to
the following:
TJ = TA + {[(VIN − VOUT) × ILOAD] × θJA}
(4)
As shown in Equation 4, for a given ambient temperature, inputto-output voltage differential, and continuous load current, there
exists a minimum copper size requirement for the PCB to ensure
the junction temperature does not rise above 125°C. Figure 37 to
Figure 44 show the junction temperature calculations for the
different ambient temperatures, load currents, VIN-to-VOUT
differentials, and areas of PCB copper.
In the case where the board temperature is known, use the
thermal characterization parameter, ΨJB, to estimate the junction
temperature rise (see Figure 45 and Figure 46). Maximum junction
temperature (TJ) is calculated from the board temperature (TB)
and power dissipation (PD) using the following formula:
TJ = TB + (PD × ΨJB)
(5)
The typical value of ΨJB is 58°C/W for the 4-ball WLCSP package
and 43°C/W for the 5-lead TSOT package.
140
MAXIMUM JUNCTION TEMPERATURE
120
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
Figure 37. 500 mm2 of PCB Copper, WLCSP, TA = 25°C
Device soldered to minimum size pin traces.
Rev. 0 | Page 15 of 20
4.8
08628-039
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For reliable
operation, device power dissipation must be externally limited
so junction temperatures do not exceed 125°C.
Table 9. Typical ΨJB Values
JUNCTION TEMPERATURE, TJ (°C)
Consider the case where a hard short from OUT to ground occurs.
At first, the ADP160/ADP161 current limits so that only 320 mA is
conducted into the short. If self-heating of the junction is great
enough to cause its temperature to rise above 150°C, thermal
shutdown activates, turning off the output and reducing the
output current to zero. As the junction temperature cools and
drops below 135°C, the output turns on and conducts 320 mA
into the short, again causing the junction temperature to rise
above 150°C. This thermal oscillation between 135°C and
150°C causes a current oscillation between 320 mA and 0 mA
that continues as long as the short remains at the output.
ADP160/ADP161
140
140
MAXIMUM JUNCTION TEMPERATURE
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
120
100
80
60
40
20
0
0.3
Figure 38. 100 mm2 of PCB Copper, WLCSP, TA = 50°C
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
140
MAXIMUM JUNCTION TEMPERATURE
MAXIMUM JUNCTION TEMPERATURE
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
120
100
80
60
40
20
0
0.3
Figure 39. 500 mm2 of PCB Copper, WLCSP, TA = 85°C
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
08628-044
JUNCTION TEMPERATURE, TJ (°C)
120
08628-041
Figure 42. 100 mm2 of PCB Copper, TSOT, TA = 25°C
140
140
MAXIMUM JUNCTION TEMPERATURE
MAXIMUM JUNCTION TEMPERATURE
JUNCTION TEMPERATURE, TJ (°C)
120
100
80
60
40
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
08628-042
20
Figure 40. 100 mm2 of PCB Copper,WLCSP, TA = 50°C
120
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
Figure 43. 500 mm2 of PCB Copper, TSOT, TA = 50°C
Rev. 0 | Page 16 of 20
4.8
08628-045
JUNCTION TEMPERATURE, TJ (°C)
1.8
Figure 41. 500 mm2 of PCB Copper, TSOT, TA = 25°C
140
JUNCTION TEMPERATURE, TJ (°C)
1.3
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
08628-043
JUNCTION TEMPERATURE, TJ (°C)
120
08628-040
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
ADP160/ADP161
140
140
MAXIMUM JUNCTION TEMPERATURE
100
80
60
40
20
0
0.3
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
80
60
40
20
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
Figure 46. TSOT, TA = 85°C
140
PCB LAYOUT CONSIDERATIONS
MAXIMUM JUNCTION TEMPERATURE
Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP160/ADP161.
However, as listed in Table 8, a point of diminishing returns is
reached eventually, beyond which an increase in the copper size
does not yield significant heat dissipation benefits.
120
100
80
60
Place the input capacitor as close as possible to the VIN and
GND pins. Place the output capacitor as close as possible to the
VOUT and GND pins. Use of 0402 or 0603 size capacitors and
resistors achieves the smallest possible footprint solution on
boards where area is limited.
40
20
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
0.8
1.3
1.8
ILOAD = 100mA
ILOAD = 150mA
ILOAD = 200mA
2.3
2.8
3.3
VIN – VOUT (V)
3.8
4.3
4.8
08628-047
JUNCTION TEMPERATURE, TJ (°C)
100
0
0.3
Figure 44. 100 mm2 of PCB Copper, TSOT, TA = 50°C
0
0.3
120
08628-048
JUNCTION TEMPERATURE, TJ (°C)
120
08628-046
JUNCTION TEMPERATURE, TJ (°C)
MAXIMUM JUNCTION TEMPERATURE
Figure 45. WLCSP, TA = 85°C
Rev. 0 | Page 17 of 20
08628-049
ADP160/ADP161
08628-050
Figure 47. Example of 5-Lead TSOT PCB Layout
Figure 48. Example of 4-Ball WLCSP PCB Layout
Rev. 0 | Page 18 of 20
ADP160/ADP161
OUTLINE DIMENSIONS
2.90 BSC
5
4
2.80 BSC
1.60 BSC
1
2
3
0.95 BSC
1.90
BSC
*0.90 MAX
0.70 MIN
0.10 MAX
0.50
0.30
0.20
0.08
8°
4°
0°
SEATING
PLANE
0.60
0.45
0.30
100708-A
*1.00 MAX
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 49. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
1.000
0.965 SQ
0.925
0.640
0.595
0.550
0.370
0.355
0.340
SEATING
PLANE
2
1
A
0.340
0.320
0.300
B
0.50
BALL PITCH
TOP VIEW
(BALL SIDE DOWN)
0.270
0.240
0.210
BOTTOM VIEW
(BALL SIDE UP)
0.030 NOM
COPLANARITY
Figure 50.4-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-4-1)
Dimensions shown in millimeters
Rev. 0 | Page 19 of 20
040409-B
BALL A1
IDENTIFIER
ADP160/ADP161
ORDERING GUIDE
Model 1
ADP160ACBZ-1.2-R7
ADP160ACBZ-1.5-R7
ADP160ACBZ-1.8-R7
ADP160ACBZ-2.1-R7
ADP160ACBZ-2.5-R7
ADP160ACBZ-2.75-R7
ADP160ACBZ-2.8-R7
ADP160ACBZ-2.85-R7
ADP160ACBZ-3.0-R7
ADP160ACBZ-3.3-R7
ADP160ACBZ-4.2-R7
ADP160AUJZ-1.2-R7
ADP160AUJZ-1.5-R7
ADP160AUJZ-1.8-R7
ADP160AUJZ-2.5-R7
ADP160AUJZ-2.8-R7
ADP160AUJZ-3.0-R7
ADP160AUJZ-3.3-R7
ADP160AUJZ-4.2-R7
ADP161AUJZ-R7
ADP160UJZ-REDYKIT
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Output Voltage (V)
1.2
1.5
1.8
2.1
2.5
2.75
2.8
2.85
3.0
3.3
4.2
1.2
1.5
1.8
2.5
2.8
3.0
3.3
4.2
Adjustable
Package Description
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
Evaluation board kit
Z = RoHS Compliant Part.
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08628-0-6/10(0)
Rev. 0 | Page 20 of 20
Package Option
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
Branding
5K
5L
5N
5P
5Q
5R
5S
5T
5U
5V
6U
LDQ
LDR
LE0
LFZ
LG0
Y2U
LG1
LGY
LHW